Philips PHB45N03LTA, PHD45N03LTA, PHP45N03LTA Datasheet

1. Description

2. Features

PHP/PHB/PHD45N03LTA

N-channel enhancement mode ﬁeld-effect transistor

Rev. 02 — 02 November 2001 Product data

N-channel logic level ﬁeld-effect power transistor in a plastic package using TrenchMOS™1 technology.

Product availability:

PHP45N03LTA in SOT78 (TO-220AB) PHB45N03LTA in SOT404 (D2-PAK) PHD45N03LTA in SOT428 (D-PAK).

■ Low on-state resistance

■ Fast switching.

3. Applications

■ Computer motherboard high frequency DC to DC converters.

4. Pinning information

Table 1: Pinning - SOT78, SOT404, SOT428 simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 drain (d)

[1]

3 source (s) mb mounting base,

connected to drain (d)

MBK106

12mb3

SOT78 (TO-220AB) SOT404 (D2-PAK) SOT428 (D-PAK)

[1] It is not possible to make connection to pin 2 of the SOT404 and SOT428 packages.

mb

2

13

MBK116

mb

2

13

Top view

MBK091

MBB076

d

g

s

1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

Philips Semiconductors

PHP/PHB/PHD45N03LTA

N-channel enhancement mode ﬁeld-effect transistor

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

V I

D

P T R

DS

tot j DSon

drain-source voltage (DC) Tj=25to175°C - 25 V drain current (DC) Tmb=25°C; VGS=5V - 40 A total power dissipation Tmb=25°C - 65 W junction temperature - 175 °C drain-source on-state resistance VGS= 10 V; ID= 25 A 13 21 mΩ

=5V; ID= 25 A 17.5 24 mΩ

V

GS

= 3.5 V; ID=5.2A 2240mΩ

V

GS

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

V

GSM

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

Avalanche ruggedness

E

AS

drain-source voltage (DC) Tj=25to175°C - 25 V drain-gate voltage (DC) Tj=25to175°C; RGS=20kΩ -25V gate-source voltage (DC) - ±15 V gate-source voltage tp≤ 50 µs; pulsed;

duty cycle 25 %; T

≤ 150 °C

j

- ±20 V

drain current (DC) Tmb=25°C; VGS=5V;Figure 2 and 3 -40A

= 100 °C; VGS=5V;Figure 2 -30A

T

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs; Figure 3 - 160 A total power dissipation Tmb=25°C; Figure 1 -65W storage temperature −55 +175 °C operating junction temperature −55 +175 °C

source (diode forward) current (DC) Tmb=25°C - 40 A peak source (diode forward) current Tmb=25°C; pulsed; tp≤ 10 µs - 160 A

non-repetitive avalanche energy unclamped inductive load;

= 40 A; tp= 0.1 ms; VDD=15V;

I

D

=50Ω; VGS= 5V; starting Tj=25°C;

R

GS

-60mJ

9397 750 09023

Product data Rev. 02 — 02 November 2001 2 of 14

Philips Semiconductors

PHP/PHB/PHD45N03LTA

N-channel enhancement mode ﬁeld-effect transistor

120

P

der

(%)

80

40

0

0 50 100 150 200

P

der

tot

----------------------

P

tot 25 C°()

100%×= I

03aa16

T

(oC)

mb

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

120

I

der

(%)

80

40

0

0 50 100 150 200

I

D

der

------------------ -

I

D25C°()

100%×=

03aa24

T

(oC)

mb

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

03af58

I

D

(A)

R

= V

/ I

DS

D

D.C.

tp = 10 µs

100 µs

1 ms

10 ms

(V)

V

DS

2

10

1

P

t

p

1 10 10

DSon

t

p

δ =

T

t

T

Tmb=25°C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 09023

Product data Rev. 02 — 02 November 2001 3 of 14

Philips Semiconductors

PHP/PHB/PHD45N03LTA

N-channel enhancement mode ﬁeld-effect transistor

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Value Unit

R

th(j-mb)

R

th(j-a)

thermal resistance from junction to mounting base

thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W

7.1 Transient thermal impedance

Figure 4 2.3 K/W

mounted on a printed circuit board; minimum

50 K/W

footprint; SOT404 and SOT428 packages

03af57

t

p

δ =

T

t

T

1

(s)

t

p

Z

th(j-mb)

(K/W)

10

1

10

δ = 0.5

0.2

0.1

0.05

-1

0.02

single pulse

-2 10

-5

10

-4

10

-3

10

-2

10

P

t

p

-1

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

9397 750 09023

Product data Rev. 02 — 02 November 2001 4 of 14

Philips Semiconductors

PHP/PHB/PHD45N03LTA

N-channel enhancement mode ﬁeld-effect transistor

8. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

V

GS(th)

I

DSS

I

GSS

R

DSon

Dynamic characteristics

Q

g(tot)

Q

gs

Q

gd

C

iss

C

oss

C

rss

t

d(on)

t

r

t

d(off)

t

f

Source-drain diode

V

SD

drain-source breakdown voltage ID= 0.25 mA; VGS=0V

=25°C 25--V

T

j

= −55 °C 22--V

T

j

gate-source threshold voltage ID= 1 mA; VDS=VGS; Figure 9

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 - - V

T

j

= −55 °C - - 2.3 V

T

j

drain-source leakage current VDS=25V; VGS=0V

=25°C - 0.05 10 µA

T

j

= 175 °C - - 500 µA

T

j

gate-source leakage current VGS= ±5 V; VDS= 0 V - 10 100 nA drain-source on-state resistance VGS=5V; ID=25A;Figure 7 and 8

=25°C - 17.5 24 mΩ

T

j

= 175 °C - 30 40.8 mΩ

T

j

=10V; ID=25A;Figure 7 and 8

V

GS

=25°C - 13 21 mΩ

T

j

= 3.5 V; ID= 5.2 A; Figure 7 and 8

V

GS

=25°C - 22 40 mΩ

T

j

total gate charge ID= 40 A; VDD=24V; VGS=5V;Figure 13 -19-nC gate-source charge - 5 - nC gate-drain (Miller) charge - 8 11 nC input capacitance VGS=0V; VDS= 25 V; f = 1 MHz; Figure 11 - 700 - pF output capacitance - 290 - pF reverse transfer capacitance - 200 - pF turn-on delay time VDD=15V; ID= 15 A; VGS=10V;

=6Ω; resistive load

R

turn-on rise time - 60 90 ns

G

- 1020ns

turn-off delay time - 35 60 ns turn-off fall time - 4060ns

source-drain (diode forward) voltage IS= 25 A; VGS=0V;Figure 12 - 0.95 1.2 V

9397 750 09023

Product data Rev. 02 — 02 November 2001 5 of 14