Datasheet PHP36N06E Datasheet (Philips)

Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E

GENERAL DESCRIPTION QUICK REFERENCE DATA

N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope. V The device is intended for use in I automotive applications, Switched P Mode Power Supplies (SMPS), T motor control, welding, DC/DC and R
DS
D
tot j
DS(ON)
AC/DC converters, and in general resistance purpose switching applications.

PINNING - TO220AB PIN CONFIGURATION SYMBOL

Drain-source voltage 60 V Drain current (DC) 41 A Total power dissipation 125 W Junction temperature 175 ˚C Drain-source on-state 38 m
PIN DESCRIPTION
tab
d
1 gate 2 drain 3 source
tab drain
123
g
s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
DS
V
DGR
±VGSGate-source voltage - - 30 V I
D
I
D
I
DM
P
tot
T
stg
T
j
Drain-source voltage - - 60 V Drain-gate voltage RGS = 20 k -60V
Drain current (DC) Tmb = 25 ˚C - 41 A Drain current (DC) Tmb = 100 ˚C - 29 A Drain current (pulse peak value) Tmb = 25 ˚C - 164 A Total power dissipation Tmb = 25 ˚C - 125 W Storage temperature - - 55 175 ˚C Junction temperature - - 175 ˚C

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R R
th j-mb
th j-a
Thermal resistance junction to - 1.2 K/W mounting base Thermal resistance junction to 60 - K/W ambient
August 1996 1 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E

STATIC CHARACTERISTICS

Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)

DYNAMIC CHARACTERISTICS

Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
s
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 60 - - V voltage Gate threshold voltage VDS = VGS; ID = 1 mA 2.1 3.0 4.0 V Zero gate voltage drain current VDS = 60 V; VGS = 0 V; Tj = 25 ˚C - 1 10 µA Zero gate voltage drain current VDS = 60 V; VGS = 0 V; Tj = 125 ˚C - 0.1 1.0 mA Gate source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA Drain-source on-state VGS = 10 V; ID = 20 A - 30 38 m resistance
Forward transconductance VDS = 25 V; ID = 20 A 7 14 - S Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 900 1600 pF
Output capacitance - 420 600 pF Feedback capacitance - 160 275 pF
Turn-on delay time VDD = 30 V; ID = 3 A; - 15 30 ns Turn-on rise time VGS = 10 V; RGS = 50 ; - 55 90 ns Turn-off delay time R Turn-off fall time - 60 100 ns
= 50 - 75 125 ns
gen
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
Internal source inductance Measured from source lead - 7.5 - nH
soldering point to source bond pad

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V t
rr
Q
SD
rr
Continuous reverse drain - - - 41 A current Pulsed reverse drain current - - - 164 A Diode forward voltage IF = 41 A ; VGS = 0 V - 0.95 2.0 V
Reverse recovery time IF = 41 A; -dIF/dt = 100 A/µs; - 60 - ns Reverse recovery charge VGS = 0 V; VR = 30 V - 0.30 - µC

AVALANCHE LIMITING VALUE

Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
Drain-source non-repetitive ID = 41 A ; VDD 25 V ; - - 100 mJ unclamped inductive turn-off VGS = 10 V ; RGS = 50 energy
August 1996 2 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
10
1
0.1
0.01
0.001
Zth j-mb / (K/W)
D =
0.5
0.2
0.1
0.05
0.02
0
1E-05 1E-03 1E-01 1E+01
BUK454-60H
P
D
t / s
p
p
t
t
D =
T
T
t
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID / A
80 70 60 50 40 30 20 10
20
15
10
0
0246810
VDS / V
BUK474-60H
VGS / V = 9
8
7
6
5
Fig.5. Typical output characteristics, Tj = 25 ˚C
ID = f(VDS); parameter V
GS
.
8
BUK474-60H
VGS / V =
9
10 20
.
GS
ID / A
1000
100
RDS(ON) = VDS/ID
10
1
1 10 100
BUK454-60H
DC
tp = 100 us
1 ms 10 ms
100 ms
VDS / V
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
RDS(ON) / Ohm
0.2 5
6
0.15
0.1
0.05
0
0 1020304050607080
7
ID / A
Fig.6. Typical on-state resistance, Tj = 25 ˚C
R
p
= f(ID); parameter V
DS(ON)
August 1996 3 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E
ID / A
80
Tj / C =
70 60 50 40 30 20 10
0
024681012
-40 25 150
VGS / V
BUK474-60H
Fig.7. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 15 V; parameter T
gfs / S
20
15
10
BUK474-60H
VGS(TO) / V
4
3
2
1
0
-60 -40 -20 0 20 40 60 80 100 120 140
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage.
V
j
= f(Tj); conditions: ID = 1 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
GS
98 %
5
0
0 1020304050607080
ID / A
Fig.8. Typical transconductance, Tj = 25 ˚C
Tj / C =
-40 25 150
.
gfs = f(ID); conditions: VDS = 15 V
a
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2 0
-60 -20 20 60 100 140 180
Normalised RDS(ON) = f(Tj)
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 20 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
10000
1000
100
0.01 0.1 1 10 100
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
C / pF
VDS / V
BUK474-60H
, C
iss
oss
Ciss
Coss
Crss
, C
GS
rss
.
August 1996 4 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E
VGS / V
12
10
8
6
4
2
0
0 10203040
VDS / V = 12
QG / nC
BUK474-60H
48
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); conditions: ID = 41 A; parameter V
GS
IF / A
80
Tj / C =
70 60 50 40 30 20 10
0
0 0.5 1 1.5 2
-40 25 150
VSDS / V
BUK474-60H
DS
Fig.14. Typical reverse diode current.
IF = f(V
); conditions: V
SDS
= 0 V; parameter T
GS
j
WDSS%
120 110 100
90 80 70 60 50 40 30 20 10
0
20 40 60 80 100 120 140
Tmb / C
Fig.15. Normalised avalanche energy rating.
W
% = f(Tmb); conditions: ID = 41 A
DSS
+
L
VDS
VGS
DSS
T.U.T.
/(BV
0
RGS
Fig.16. Avalanche energy test circuit.
W
= 0.5 LI
DSS
2
D
BV
DSS−VDD
-
R 01
shunt
)
VDD
-ID/100
August 1996 5 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E

MECHANICAL DATA

Dimensions in mm Net Mass: 2 g
10,3 max
1,3
3,7
4,5 max
3,0 max
not tinned
1,3
max
(2x)
123
2,54 2,54
2,8
3,0
13,5
min
0,9 max (3x)
5,9
min
15,8
max
0,6
2,4
Fig.17. TO220AB; pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to mounting instructions for TO220 envelopes.
3. Epoxy meets UL94 V0 at 1/8".
August 1996 6 Rev 1.000
Philips Semiconductors Product specification
PowerMOS transistor PHP36N06E

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
August 1996 7 Rev 1.000
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