Philips PHP225 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
PHP225
Dual P-channel enhancement
mode MOS transistor
Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b
1997 Jun 20
Philips Semiconductors Product specification
Dual P-channel enhancement
mode MOS transistor
FEATURES
• High-speed switching
• No secondary breakdown
• Very low on-resistance.
APPLICATIONS
• Motor and actuator driver
• Power management
• Synchronized rectification.
DESCRIPTION
Two P-channel enhancement mode MOS transistors in an
8-pin plastic SOT96-1 (SO8) package.
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
PINNING - SOT96-1 (SO8)
PIN SYMBOL DESCRIPTION
1s
2g
3s
4g
5d
6d
7d
8d
handbook, halfpage
58
1
4
MAM119
1
1
2
2
2
2
1
1
source 1
gate 1
source 2
gate 2
drain 2
drain 2
drain 1
drain 1
d
d
1
1
gs
1
PHP225
d
2
2
1
d
2
gs
2
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per P-channel
V
V
V
V
I
D
R
P
DS
SD
GSO
GSth
DSon
tot
drain-source voltage (DC) −−30 V
source-drain diode forward voltage IS= −1.25 A −−1.6 V
gate-source voltage (DC) open drain −±20 V
gate-source threshold voltage ID= −1 mA; VDS=V
−1 −2.8 V
GS
drain current (DC) −−2.3 A
drain-source on-state resistance ID= −1 A; VGS= −10 V − 0.25 Ω
total power dissipation Ts=80°C − 2W
1997 Jun 20 2
Philips Semiconductors Product specification
Dual P-channel enhancement
PHP225
mode MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per P-channel
V
DS
V
GSO
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) −−30 V
gate-source voltage (DC) open drain −±20 V
drain current (DC) Ts≤ 80 °C −−2.3 A
peak drain current note 1 −−10 A
total power dissipation Ts=80°C; note 2 − 2W
T
=25°C; note 3 − 2W
amb
T
=25°C; note 4 − 1W
amb
=25°C; note 5 − 1.3 W
T
amb
storage temperature −65 +150 °C
operating junction temperature − 150 °C
source current (DC) Ts≤ 80 °C −−1.25 A
peak pulsed source current note 1 −−5A
Notes
1. Pulse width and duty cycle limited by maximum junction temperature.
2. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
3. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 27.5 K/W.
4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 90 K/W.
5. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an R
(ambient to tie-point) of 90 K/W.
th a-tp
1997 Jun 20 3
Philips Semiconductors Product specification
Dual P-channel enhancement
mode MOS transistor
2.5
handbook, halfpage
P
tot
(W)
2.0
1.5
1.0
0.5
0
0 200
50 100 150
T ( C)
s
MLB836
o
2
10
handbook, halfpage
I
D
(A)
10
1
1
10
2
10
1
10
δ =0.01.
Ts=80°C.
(1) R
DSon
limitation.
PHP225
MBE155
(1)
t
P
t
p
T
p
=
δ
T
DC
t
11010
tp =
10 µs
1 ms
0.1 s
V
(V)
DS
2
Fig.2 Power derating curve.
Fig.3 SOAR.
1997 Jun 20 4
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