Philips PHP225 Datasheet

DISCRETE SEMICONDUCTORS

DATA SH EET

PHP225

Dual P-channel enhancement
mode MOS transistor

Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b

1997 Jun 20

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

FEATURES

• High-speed switching

• No secondary breakdown

• Very low on-resistance.

APPLICATIONS

• Motor and actuator driver

• Power management

• Synchronized rectification.

DESCRIPTION

Two P-channel enhancement mode MOS transistors in an
8-pin plastic SOT96-1 (SO8) package.

CAUTION

The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.

PINNING - SOT96-1 (SO8)

PIN SYMBOL DESCRIPTION

1s
2g
3s
4g
5d
6d
7d
8d

handbook, halfpage

58

1

4

MAM119

1
1
2
2
2
2
1
1

source 1
gate 1
source 2
gate 2
drain 2
drain 2
drain 1
drain 1

d

d

1

1

gs

1

PHP225

d

2

2

1

d

2

gs

2

Fig.1 Simplified outline and symbol.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

Per P-channel

V
V
V
V
I

D

R
P

DS
SD
GSO
GSth

DSon
tot

drain-source voltage (DC) −−30 V
source-drain diode forward voltage IS= −1.25 A −−1.6 V
gate-source voltage (DC) open drain −±20 V
gate-source threshold voltage ID= −1 mA; VDS=V

−1 −2.8 V

GS

drain current (DC) −−2.3 A
drain-source on-state resistance ID= −1 A; VGS= −10 V − 0.25 Ω
total power dissipation Ts=80°C − 2W

1997 Jun 20 2

Philips Semiconductors Product specification

Dual P-channel enhancement

PHP225

mode MOS transistor

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

Per P-channel

V

DS

V

GSO

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

drain-source voltage (DC) −−30 V
gate-source voltage (DC) open drain −±20 V
drain current (DC) Ts≤ 80 °C −−2.3 A
peak drain current note 1 −−10 A
total power dissipation Ts=80°C; note 2 − 2W

T

=25°C; note 3 − 2W

amb

T

=25°C; note 4 − 1W

amb

=25°C; note 5 − 1.3 W

T

amb

storage temperature −65 +150 °C
operating junction temperature − 150 °C

source current (DC) Ts≤ 80 °C −−1.25 A
peak pulsed source current note 1 −−5A

Notes

1. Pulse width and duty cycle limited by maximum junction temperature.

2. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.

3. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R

th a-tp

(ambient to tie-point) of 27.5 K/W.

4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R

th a-tp

(ambient to tie-point) of 90 K/W.

5. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an R

(ambient to tie-point) of 90 K/W.

th a-tp

1997 Jun 20 3

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

2.5

handbook, halfpage

P

tot

(W)

2.0

1.5

1.0

0.5

0

0 200

50 100 150

T ( C)

s

MLB836

o

2

10

handbook, halfpage

I

D

(A)

10

1

1

10

2

10

1

10

δ =0.01.
Ts=80°C.
(1) R

DSon

limitation.

PHP225

MBE155

(1)

t

P

t

p

T

p

=

δ

T

DC

t

11010

tp =

10 µs

1 ms

0.1 s

V

(V)

DS

2

Fig.2 Power derating curve.

Fig.3 SOAR.

1997 Jun 20 4

Philips Semiconductors Product specification

Dual P-channel enhancement

PHP225

mode MOS transistor

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-s

CHARACTERISTICS

=25°C unless otherwise specified.

T

j

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Per P-channel

V

(BR)DSS

V

GSth

I

DSS

I

GSS

I

Don

R

DSon

y

 forward transfer admittance VDS= −20 V; ID= −1A 1 2 − S

fs

C

iss

C

oss

C

rss

Q

G

Q

GS

Q

GD

thermal resistance from junction to soldering point 35 K/W

drain-source breakdown voltage VGS= 0; ID= −10 µA −30 −−V
gate-source threshold voltage VGS=VDS; ID= −1mA −1 −−2.8 V
drain-source leakage current VGS= 0; VDS= −24 V −−−100 nA
gate leakage current VGS= ±20 V; VDS=0 −−±100 nA
on-state drain current VGS= −10 V; VDS= −1V −2.3 −−A

V

= −4.5 V; VDS= −5V −1 −−A

GS

drain-source on-state resistance VGS= −4.5 V; ID= −0.5 A − 0.33 0.4 Ω

V

= −10 V; ID= −1A − 0.22 0.25 Ω

GS

input capacitance VGS= 0; VDS= −20 V; f = 1 MHz − 250 − pF
output capacitance VGS= 0; VDS= −20 V; f = 1 MHz − 140 − pF
reverse transfer capacitance VGS= 0; VDS= −20 V; f = 1 MHz − 50 − pF
total gate charge VGS= −10 V; VDS= −15 V;

− 10 25 nC

ID= −2.3 A

gate-source charge VGS= −10 V; VDS= −15 V;

− 1 − nC

ID= −2.3 A

gate-drain charge VGS= −10 V; VDS= −15 V;

− 3 − nC

ID= −2.3 A

Switching times

t

on

turn-on time VGD=0to−10 V; VDD= −20 V;

ID= −1 A; RL=20Ω

t

off

turn-off time VGS= −10 to 0 V; VDD= −20 V;

ID= −1 A; RL=20Ω

Source-drain diode

V

DS

source drain diode forward

VGD= 0; IS= −1.25 A −−−1.6 V

voltage

t

rr

reverse recovery time IS= −1.25 A; di/dt = 100 A/µs − 150 200 ns

1997 Jun 20 5

− 20 80 ns

− 50 140 ns

Philips Semiconductors Product specification

,g

Dual P-channel enhancement
mode MOS transistor

C

iss

C

oss

C

rss

V (V)

DS

MBE144

600

handbook, halfpage

C

(pF)

400

200

0

0

VGS=0.
Tj=25°C.

10 20 30

Fig.4 Capacitance as a function of drain-source

voltage; typical values.

10

V =

GS

I

D

10 V

(A)

8

6

4

2

0

0 2 10 12

Tj=25°C.

7.5 V

468

V (V)

DS

Fig.5 Output characteristics; typical values.

PHP225

MBE154

6 V

5 V

4.5 V

4 V

3.5 V

3 V

2.5 V

handbook, halfpage

10

I

D

(A)

8

6

4

2

0

024 8

VDS= −10 V.
Tj=25°C.

6

V (V)

GS

Fig.6 Transfer characteristic; typical values.

MBE157

10

handbook, halfpage

V

GS

(V)

8

6

4

2

0

024 108

VDD= −15 V.
ID= −2.3 A.

6

MBE145

Q (nC)

g

Fig.7 Gate-source voltage as a function of total

gate charge.

1997 Jun 20 6

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

handbook, halfpage

6

I

S

(A)

4

2

0

0 0.5 1 21.5

VGD=0.
(1) Tj= 150 °C.
(2) Tj=25°C.
(3) Tj= −55 °C.

(1) (2) (3)

V (V)

MBE156

SD

4

10

handbook, halfpage

R

DSon

(mΩ)

3

10

2

10

−VDS≥−ID×R
= −0.1 A.

(1) I

D

(2) ID= −0.5 A.
(3) ID= −1A.

(1) (4) (5)(2)(3)

−2 −4 −6 −8

; Tj=25°C.

DSon

(4) ID= −2.3 A.
(5) ID= −4.5 A.

PHP225

MDA165

−100

VGS (V)

Fig.8 Source current as a function of source-drain

diode forward voltage.

.

MBE138

o

T ( C)

j

1.2

handbook, halfpage

k

1.1

1.0

0.9

0.8

0.7

0.6

V

GSth

k

=

-------------------------------------­V

GSth

Typical V

GSth

0 50 100 15050

at T

j

at 25°C

at ID= 1 mA; VDS=VGS=V

GSth

Fig.9 Drain-source on-state resistance as a

function of gate-source voltage; typical
values.

1.8

handbook, halfpage

k

1.6

1.4

1.2

1.0

0.8

0.6

R

DSon

k

=

----------------------------------------­R

DSon

Typical R

DSon

(1) ID= −1 A; VGS= −10 V.
(2) ID= −0.5 A; VGS= −4.5 V.

at T

at 25 °C

at:

0 50 100 15050

j

T ( C)

MBE146

j

(1)

(2)

o

Fig.10 Temperature coefficient of gate-source

threshold voltage.

1997 Jun 20 7

Fig.11 Temperature coefficient of drain-source

on-resistance.

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

2

10

R

th j-s

(K/W)

10

10

1

1

6

10

δ =

0.75

0.5

0.33

0.2

0.1

0.05

0.02

0.01

0

5

10

10

PHP225

MBE153

t

tp(s)

p

=

δ

T

t

1

P

t

p

T

4

3

10

2

10

1

10

Fig.12 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.

1997 Jun 20 8

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

PACKAGE OUTLINE

SO8: plastic small outline package; 8 leads; body width 3.9 mm

D

c

y

Z

8

5

PHP225

SOT96-1

E

H

E

A

X

v M

A

A

pin 1 index

1

e

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

mm

inches

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

A

max.

1.75

0.069

A

1

0.25

0.10

0.010

0.004

A2A

1.45

1.25

0.057

0.049

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.019

0.0100

0.014

0.0075

4

w M

b

p

0 2.5 5 mm

scale

(1)E(2)

cD

5.0

4.8

0.20

0.19

eHELLpQZywv θ

4.0

1.27

3.8

0.16

0.050

0.15

2

A

6.2

5.8

0.244

0.228

Q

3

A

θ

0.25 0.10.25

0.010.010.041 0.004

0.7

0.3

0.028

0.012

(1)

o

8

o

0

L

p

L

0.7

0.6

0.028

0.024

(A )

1

detail X

1.0

1.05

0.4

0.039

0.016

OUTLINE
VERSION

SOT96-1

IEC JEDEC EIAJ

076E03S MS-012AA

REFERENCES

1997 Jun 20 9

EUROPEAN

PROJECTION

ISSUE DATE

95-02-04
97-05-22

Philips Semiconductors Product specification

Dual P-channel enhancement

PHP225

mode MOS transistor

DEFINITIONS

Data Sheet Status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1997 Jun 20 10

Philips Semiconductors Product specification

Dual P-channel enhancement
mode MOS transistor

PHP225

NOTES

1997 Jun 20 11

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© Philips Electronics N.V. 1997 SCA54
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Printed in The Netherlands 137107/00/02/pp12 Date of release: 1997 Jun 20 Document order number: 9397 750 02523