Philips PHP206 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
M3D315
PHP206
Dual P-channel enhancement
mode MOS transistor
Objective specification
File under Discrete Semiconductors, SC13b
1998 Feb 05
Philips Semiconductors Objective specification
Dual P-channel enhancement mode
MOS transistor
FEATURES
• High-speed switching
• No secondary breakdown
• Very low on-state resistance.
APPLICATIONS
• Motor driver
• Power management
• DC-DC converters
• General purpose switching.
DESCRIPTION
Two P-channel enhancement mode MOS transistors in an
8-pin plastic SOT96-1 (SO8) package.
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling. For further
information, refer to Philips specs.: SNW-EQ-608,
SNW-FQ-302A and SNW-FQ-302B.
PINNING - SOT96-1 (SO8)
PIN SYMBOL DESCRIPTION
1s
2g
3s
4g
5d
6d
7d
8d
handbook, halfpage
58
1
4
MAM119
1
1
2
2
2
2
1
1
source 1
gate 1
source 2
gate 2
drain 2
drain 2
drain 1
drain 1
d
d
1
1
gs
1
Fig.1 Simplified outline and symbol.
PHP206
d
2
2
1
d
2
gs
2
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per P-channel
V
V
V
V
I
D
R
P
DS
SD
GS
GSth
DSon
tot
drain-source voltage (DC) −−30 V
source-drain diode forward voltage VGD= 0; IS= −1.25 A −−1.3 V
gate-source voltage (DC) −±20 V
gate-source threshold voltage VDS=VGS; ID= −1mA −1 − V
drain current (DC) Ts=80°C −−5.6 A
drain-source on-state resistance VGS= −10 V; ID= −2.8 A − 65 mΩ
total power dissipation Ts=80°C − 3.5 W
1998 Feb 05 2
Philips Semiconductors Objective specification
Dual P-channel enhancement mode
PHP206
MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per P-channel
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) −−30 V
gate-source voltage (DC) −±20 V
drain current (DC) Ts=80°C; note 1 −−5.6 A
peak drain current note 2 −−22.5 A
total power dissipation Ts=80°C; note 3 − 3.5 W
T
=25°C; note 4 − 2.63 W
amb
T
=25°C; note 5 − 1.14 W
amb
=25°C; note 6 − 1.56 W
T
amb
storage temperature −55 +150 °C
operating junction temperature −55 +150 °C
source current (DC) Ts=80°C −−2.7 A
peak pulsed source current note 2 −−10.8 A
Notes
is the temperature at the soldering point of the drain lead.
1. T
s
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 3.5 Watt at the same time.
4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 27.5 K/W.
5. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 90 K/W.
6. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an R
(ambient to tie-point) of 90 K/W.
th a-tp
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-s
thermal resistance from junction to soldering point 20 K/W
1998 Feb 05 3
Loading...