Philips PHP125 Datasheet

DISCRETE SEMICONDUCTORS

DATA SH EET

PHP125

P-channel enhancement mode
MOS transistor

Product specification
Supersedes data of 1996 Apr 02
File under Discrete Semiconductors, SC13b

1997 Jun 18

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

FEATURES

• High-speed switching

• No secondary breakdown

• Very low on-resistance.

APPLICATIONS

• Motor and actuator driver

• Power management

• Synchronized rectification.

PINNING - SO8 (SOT96-1)

PIN SYMBOL DESCRIPTION

1 n.c. not connected
2 s source
3 s source
4 g gate
5 d drain
6 d drain
7 d drain
8 d drain

PHP125

DESCRIPTION

P-channel enhancement mode MOS transistor in an 8-pin
plastic SO8 (SOT96-1) package.

dd

d

handbook, halfpage

58

1

4

MAM115

n.c. gs

Fig.1 Simplified outline and symbol.

CAUTION

The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.

d

s

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V
V
V
I

D

R
P

DS
SD
GS
GSth

DSon
tot

drain-source voltage (DC) −−30 V
source-drain diode forward voltage IS= −1.25 A −−1.6 V
gate-source voltage (DC) −±20 V
gate-source threshold voltage ID= −1 mA; VDS=V

GS

−1 −2.8 V
drain current (DC) Ts=80°C −−2.5 A
drain-source on-state resistance ID= −1 A; VGS= −10 V − 0.25 Ω
total power dissipation Ts=80°C − 2.8 W

1997 Jun 18 2

Philips Semiconductors Product specification

P-channel enhancement mode

PHP125

MOS transistor

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DS

V

GS

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

Notes

1. T

s

2. Pulse width and duty cycle limited by maximum junction temperature.

3. Value based on a printed-circuit board with a R

4. Value based on a printed-circuit board with a R

drain-source voltage (DC) −−30 V
gate-source voltage (DC) −±20 V
drain current (DC) Ts=80°C; note 1 −−2.5 A
peak drain current note 2 −−10 A
total power dissipation Ts=80°C − 2.8 W

T

=25°C; note 3 − 2.4 W

amb

T

=25°C; note 4 − 1.1 W

amb

storage temperature −65 +150 °C
operating junction temperature −65 +150 °C

source current (DC) Ts=80°C −−2A
peak pulsed source current note 2 −−8A

is the temperature at the soldering point of the drain lead.

(ambient to tie-point) of 27.5 K/W.

th a-tp

(ambient to tie-point) of 90 K/W.

th a-tp

150

MBG848

Ts (oC)

P
(W)

6

tot

4

2

0

0

handbook, halfpage

50 100 200

Fig.2 Power derating curve.

1997 Jun 18 3

2

−10

handbook, halfpage

I

D

(A)

−10

−1

−1

−10

−2

−10

−1

−10

δ = 0.01; TS=80°C.

(1) R

DSon limitation

MBG752

(1)

t

P

t

p

T

.

p

=

δ

T

t

−1

DC

−10 −10

tp =

10 µs
100 µs
1 ms

10 ms
100 ms

VDS (V)

2

Fig.3 SOAR.

Philips Semiconductors Product specification

P-channel enhancement mode

PHP125

MOS transistor

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-s

handbook, full pagewidth

R

th j−s

(K/W)

thermal resistance from junction to soldering point 25 K/W

2

10

δ =

0.75

10

1

0.5

0.33

0.2

0.1

0.05

0.02

0.01

P

MBG753

=

δ

t

p

T

0

−1

10

−6

10

−5

10

−4

10

−3

10

−2

10

t

p

T

−1

10

t

1tp (s)

Fig.4 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.

1997 Jun 18 4

Philips Semiconductors Product specification

P-channel enhancement mode

PHP125

MOS transistor

CHARACTERISTICS

T

=25°C unless otherwise specified.

j

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GSth

I

DSS

I

GSS

R

DSon

C

iss

C

oss

C

rss

Q

G

Q

GS

Q

GD

drain-source breakdown voltage VGS= 0; ID= −10 µA −30 −−V
gate-source threshold voltage VGS=VDS; ID= −1mA −1 −−2.8 V
drain-source leakage current VGS= 0; VDS= −24 V −−−100 nA
gate leakage current VGS= ±20 V; VDS=0 −−±100 nA
drain-source on-state resistance VGS= −4.5 V; ID= −0.5 A − 0.33 0.4 Ω

V

= −10 V; ID= −1A − 0.22 0.25 Ω

GS

input capacitance VGS= 0; VDS= −24 V; f = 1 MHz − 250 − pF
output capacitance VGS= 0; VDS= −24 V; f = 1 MHz − 140 − pF
reverse transfer capacitance VGS= 0; VDS= −24 V; f = 1 MHz − 50 − pF
total gate charge VGS= −10 V; VDS= −15 V;

− 10 25 nC

ID= −1A

gate-source charge VGS= −10 V; VDS= −15 V;

− 1 − nC

ID= −1A

gate-drain charge VGS= −10 V; VDS= −15 V;

− 3 − nC

ID= −1A
Switching times (see Fig.11)
t

d(on)

t

f

t

on

t

d(off)

t

r

t

off

turn-on delay time VGS=0to−10 V; VDD= −15 V;
fall time − 3.5 − ns
turn-on switching time − 816ns
turn-off delay time VGS=−10 to 0 V; VDD= −15 V;
rise time − 15 − ns
turn-off switching time − 40 80 ns

Source-drain diode

V

SD

t

rr

source-drain forward voltage VGD= 0; IS= −1.25 A −−−1.6 V
reverse recovery time IS= −1.25 A; di/dt = 100 A/µs − 150 200 ns

ID= −1 A; RL=15Ω; R

ID= −1 A; RL=15Ω; R

gen

gen

− 4.5 − ns

=6Ω

− 25 − ns

=6Ω

1997 Jun 18 5

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

−10

handbook, halfpage

V

GS

(V)

−8

−6

−4

−2

0

0 −2 −4 −8 −10

−6
Qg (nC)

MBG754

−12

handbook, halfpage

I

D

(A)

−10

−8

−6

−4

−2

0

0 −2 −10

VGS =

−10 V

−7.5 V

−6 V

−4 −6 −8

PHP125

MBG756

−5 V

−4.5 V

−4 V

−3.5 V

−3 V

−2.5 V

VDS (V)

VDD= −15 V: ID= −1A.

Fig.5 Gate-source voltage as a function of total

gate charge; typical values.

−6

MBG757

VGS (V)

−10

handbook, halfpage

I

D

(A)

−8

−6

−4

−2

0

0 −2 −4 −8

VDS= −10 V; Tj=25°C.

Fig.7 Transfer characteristics; typical values.

Tj=25°C.

Fig.6 Output characteristics; typical values.

−8

handbook, halfpage

I

S

(A)

−6

−4

−2

0

0 −0.4 −0.8 −1.2 −1.6 −2.4−2

VGD=0.
(1) Tj= 150 °C.
(2) Tj=25°C.
(3) Tj= −65 °C.

(1) (2)

MBG758

(3)

VSD (V)

Fig.8 Source current as a function of source-drain

diode forward voltage; typical values.

1997 Jun 18 6

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

−8
VGS (V)

MBG849

4

10

handbook, halfpage

R

DSon

(mΩ)

3

10

2

10

0

ID= 100 mA
500 mA

1 A
2 A

3.4 A

−2 −4 −6

−10

600

handbook, halfpage

C

(pF)

400

200

0

0

PHP125

MBG850

C

iss

C

oss

C

rss

−8 −16 −24
VDS (V)

VDS≥ ID× R

; Tj=25°C.

DSon

Fig.9 Drain source on-resistance as a function of

gate-source voltage; typical values.

handbook, full pagewidth

V

in

−V

DD

R

L

V

out

VGS= 0; f = 1 MHz; Tj=25°C.

Fig.10 Capacitance as a function of drain-source

voltage; typical values.

0

10 %

V

in

90 %

0

V

out

t

d(on)

10 %

90 %

t

t

r

t

on

d(off)

10 %

90 %

t

f

t

off

MGD391

Fig.11 Switching time test circuit and input and output waveforms.

1997 Jun 18 7

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

1.2

handbook, halfpage

k

1.1

1.0

0.9

0.8

0.7

0.6

V

GSth

k

=

-------------------------------------­V

GSth

= −1 mA; VDS=VGS.

(1) I

D

at T

at 25°C

j

Typical V

25 75 175125−75 −25

at:

GSth

MBG759

Tj (

PHP125

1.8

handbook, halfpage

k

1.6

1.4

1.2

1.0

0.8

0.6

o

C)

R

at T

DSon

k

=

----------------------------------------­R

DSon

= −1 A; VGS= −10 V.

(1) I

D

(2) ID= −0.5 A; VGS= −4.5 V.

j

at 25 °C

25 75 175125−75 −25

Typical R

DSon

at:

MBG760

(1)

(2)

o

C)

Tj (

Fig.12 Temperature coefficient of gate-source

threshold voltage; typical values.

Fig.13 Temperature coefficient of drain-source

on-resistance; typical values.

1997 Jun 18 8

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

PACKAGE OUTLINE

SO8: plastic small outline package; 8 leads; body width 3.9 mm

D

c

y

Z

8

5

PHP125

SOT96-1

E

H

E

A

X

v M

A

A

pin 1 index

1

e

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

1.75

0.069

A

1

0.25

0.10

0.010

0.004

A2A

1.45

1.25

0.057

0.049

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.019

0.0100

0.014

0.0075

UNIT

inches

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

4

w M

b

p

0 2.5 5 mm

scale

(1)E(2)

cD

5.0

4.8

0.20

0.19

eHELLpQZywv θ

4.0

1.27

3.8

0.16

0.050

0.15

2

A

6.2

5.8

0.244

0.228

Q

3

A

θ

0.25 0.10.25

0.010.010.041 0.004

(1)

0.7

0.3

0.028

0.012

o

8

o

0

L

p

L

0.7

0.6

0.028

0.024

(A )

1

detail X

1.0

1.05

0.4

0.039

0.016

OUTLINE

VERSION

SOT96-1

IEC JEDEC EIAJ

076E03S MS-012AA

REFERENCES

1997 Jun 18 9

EUROPEAN

PROJECTION

ISSUE DATE

95-02-04
97-05-22

Philips Semiconductors Product specification

P-channel enhancement mode

PHP125

MOS transistor

DEFINITIONS

Data Sheet Status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1997 Jun 18 10

Philips Semiconductors Product specification

P-channel enhancement mode
MOS transistor

PHP125

NOTES

1997 Jun 18 11

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© Philips Electronics N.V. 1997 SCA54
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Printed in The Netherlands 137107/00/03/pp12 Date of release: 1997 Jun 18 Document order number: 9397 750 02383