1. Description
2. Features
PHN103T
N-channel enhancement mode field-effect transistor
Rev. 01 — 28 August 2000 Product specification
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
PHN103T in SOT96-1 (SO8).
■ TrenchMOS™ technology
■ Fast switching
■ Low on-state resistance
■ Logic level compatible
■ Surface mount package.
3. Applications
c
c
■ Motor and actuator driver
■ Battery management
■ High speed, low resistance switch.
4. Pinning information
Table 1: Pinning - SOT96-1, simplified outline and symbol
Pin Description Simplified outline Symbol
1,2,3 source (s)
4 gate (g)
5,6,7,8 drain (d)
pin 1 index
03ab52
12 34
SOT96-1 (SO8)
1. TrenchMOS is a trademark of Royal Philips Electronics.
5678
d
g
03ab30
s
N-channel MOSFET
Philips Semiconductors
PHN103T
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
V
I
P
T
R
DS
D
tot
j
DSon
drain-source voltage (DC) Tj=25to150°C − 30 V
drain current (DC) Tsp=25°C; VGS= 4.5 V − 8.6 A
total power dissipation Tsp=25°C − 6.25 W
junction temperature − 150 °C
drain-source on-state resistance VGS= 10 V; ID=5A 2030mΩ
= 4.5 V; ID=2.5A 3050mΩ
V
GS
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) Tj=25to150°C − 30 V
drain-gate voltage (DC) Tj=25to150°C; RGS=20kΩ−30 V
gate-source voltage (DC) −±20 V
drain current (DC) Tsp=25°C; VGS= 4.5 V;
− 8.6 A
Figure 2 and 3
T
= 100 °C; VGS= 4.5 V; Figure 2 − 5.4 A
sp
peak drain current Tsp=25°C; pulsed; tp≤ 10 µs;
− 34 A
Figure 3
total power dissipation Tsp=25°C; Figure 1 − 6.25 W
storage temperature −65 +150 °C
operating junction temperature −65 +150 °C
source (diode forward) current (DC) Tsp=25°C − 7A
peak source (diode forward) current Tsp=25°C; pulsed; tp≤ 10 µs − 34 A
9397 750 07304
Product specification Rev. 01 — 28 August 2000 2 of 13
© Philips Electronics N.V. 2000. All rights reserved.
Philips Semiconductors
PHN103T
N-channel enhancement mode field-effect transistor
120
P
der
(%)
100
80
60
40
20
0
0 25 50 75 100 125 150 175
P
P
der
tot
----------------------
P
tot 25 C°()
100%×=
03aa17
Tsp (oC)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
2
10
I
D
(A)
10
P
1
R
DSon=VDS/ID
t
p
δ =
T
120
I
der
(%)
100
80
60
40
20
0
0 25 50 75 100 125 150 175
VGS≥ 4.5 V
I
I
der
D
------------------ -
I
D25C°()
100%×=
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
03ac24
tp=10µs
100 µs
1ms
10 ms
D.C. 100 ms
03aa25
Tsp (oC)
t
p
-1
10
-1
10
t
T
11010
VDS(V)
2
Tsp=25°C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07304
Product specification Rev. 01 — 28 August 2000 3 of 13
© Philips Electronics N.V. 2000. All rights reserved.
Philips Semiconductors
PHN103T
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Value Unit
R
th(j-sp)
R
th(j-a)
thermal resistance from junction to solder
point
thermal resistance from junction to ambient mounted on a printed circuit board;
7.1 Transient thermal impedance
mounted on a metal clad substrate;
Figure 4
minimum footprint
20 K/W
150 K/W
03ac22
t
p
δ =
T
t
T
110
tp(s)
Z
th(j-sp)
(K/W)
10
10
10
10
2
1
-1
-2
10
δ
= 0.5
0.2
0.1
0.05
0.02
single pulse
-5
P
t
p
-4
10
-3
10
-2
10
-1
10
Mounted on a metal clad substrate.
Fig 4. Transient thermal impedance from junction to solder point as a function of
pulse duration.
9397 750 07304
© Philips Electronics N.V. 2000. All rights reserved.
Product specification Rev. 01 — 28 August 2000 4 of 13