Philips PHN103 Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
PHN103
N-channel enhancement mode
MOS transistor
Product specification
Supersedes data of 1996 Nov 12
File under Discrete Semiconductors, SC13b
1997 Jun 20
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor
FEATURES
• High-speed switching
• No secondary breakdown
• Very low on-state resistance.
APPLICATIONS
• Motor and actuator driver
• Power management
• Synchronized rectification.
DESCRIPTION
N-channel enhancement mode MOS transistor in an 8-pin
plastic SOT96-1 (SO8) package.
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
PINNING - SOT96-1 (SO8)
PIN SYMBOL DESCRIPTION
1 n.c not connected
2 s source
3 s source
4 g gate
5 d drain
6 d drain
7 d drain
8 d drain
handbook, halfpage
58
1
4
MAM116
n.c. gs
PHN103
dd
d
d
s
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
V
SD
V
GS
V
GSth
I
D
R
DSon
P
tot
drain-source voltage (DC) − 30 V
source-drain diode forward voltage IS= 1.25 A − 1V
gate-source voltage (DC) −±20 V
gate-source threshold voltage ID= 1 mA; VDS=V
GS
1 2.8 V
drain current (DC) Ts=80°C − 8.5 A
drain-source on-state resistance ID= 5.5 A; VGS=10V − 0.03 Ω
total power dissipation Ts=80°C − 4W
1997 Jun 20 2
Philips Semiconductors Product specification
N-channel enhancement mode
PHN103
MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
Notes
is the temperature at the soldering point of the drain lead.
1. T
s
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Device mounted on printed-circuit board with an R
4. Device mounted on printed-circuit board with an R
drain-source voltage (DC) − 30 V
gate-source voltage (DC) −±20 V
drain current (DC) Ts=80°C; note 1 − 8.5 A
peak drain current note 2 − 35 A
total power dissipation Ts=80°C − 4W
T
=25°C; note 3 − 2.7 W
amb
T
=25°C; note 4 − 1.15 W
amb
storage temperature −65 +150 °C
operating junction temperature −65 +150 °C
source current (DC) Ts=80°C − 5A
peak pulsed source current note 2 − 20 A
(ambient to tie-point) of 27.5 K/W.
th a-tp
(ambient to tie-point) of 90 K/W.
th a-tp
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-s
thermal resistance from junction to soldering point 17.5 K/W
1997 Jun 20 3
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor
handbook, halfpage
8
P
tot
(W)
6
4
2
0
0 50 100 150
MGG329
Ts (°C)
2
10
handbook, halfpage
I
D
(A)
10
P
1
−1
10
−1
10
PHN103
MGG330
tp =
(1)
t
p
δ =
T
t
p
T
t
11010
10 µs
100 µs
1 ms
10 ms
100 ms
DC
(V)
2
V
DS
Fig.2 Power derating curve.
δ =0.01; Ts=80°C.
(1) R
DSon
limitation.
Fig.3 SOAR.
1997 Jun 20 4
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