Philips PHN1013 Datasheet

Philips Semiconductors Product specification

TrenchMOS transistor PHN1013

FEATURES SYMBOL QUICK REFERENCE DATA

• ’Trench’ technology

• Low on-state resistance V

d

DSS

• Fast switching

• Stable off-state characteristics I

• High thermal cycling performance

g

• Low-profile surface mount R

= 10 A

D

≤ 13.5 mΩ

DS(ON)

package

s

GENERAL DESCRIPTION PINNING SOT96 (SO8)

N-channel, enhancement mode PIN DESCRIPTION
field-effect power transistor, using
’trench’technologyto achieve very 1-3 source
low on-resistance in a low-profile,
surface mount package. This 4 gate
device is intended for use in
computer motherboard d.c. to d.c. 5-8 drain
converters and general purpose
switching applications.

pin 1 index

The PHN1013 is supplied in the
SOT96(SO8)8-leaded, low profile,
surface mounting package.

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

= 30 V

5678

1234

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V
±V
I

D

DS
DGR

GS

Drain-source voltage - - 30 V
Drain-gate voltage RGS = 20 kΩ -30V
Gate-source voltage - - 20 V
Drain current (DC) Ta = 25 ˚C, tp ≤ 10 s - 10 A

Ta = 70 ˚C, tp ≤ 10 s - 8 A

I

DM

P

tot

Drain current (pulse peak value) Ta = 25 ˚C - 40 A
Total power dissipation Ta = 25 ˚C - 2.5 W

Ta = 70 ˚C - 1.6 W

T

stg

, T

j

Storage & operating temperature - - 55 150 ˚C

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R

th j-a

Thermal resistance junction to FR4 board, minimum - 50 K/W
ambient footprint, tp ≤ 10 s.

January 1998 1 Rev 1.000

Philips Semiconductors Product specification

TrenchMOS transistor PHN1013

STATIC CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

I

DSS

I

GSS

R

DS(ON)

DYNAMIC CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

g

fs

Q

g(tot)

Q

gs

Q

gd

C

iss

C

oss

C

rss

t

d on

t

r

t

d off

t

f

Drain-source breakdown VGS = 0 V; ID = 250 µA; 30 - - V
voltage
Gate threshold voltage VDS = VGS; ID = 250 µA 1 2.1 - V
Zero gate voltage drain current VDS = 30 V; VGS = 0 V; - 0.05 1 µA

Tj = 55˚C - - 25 µA
Gate source leakage current VGS = ±10 V; VDS = 0 V - 10 100 nA
Drain-source on-state VGS = 10 V; ID = 10 A - 11 13.5 mΩ
resistance VGS = 5 V; ID = 5 A - - 20 mΩ

Forward transconductance VDS = 25 V; ID = 10 A - 18 - S
Total gate charge ID = 10 A; V

= 30 V; VGS = 10 V - 49 - nC

DD

Gate-source charge - 6.6 - nC
Gate-drain (Miller) charge - 19 - nC

Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1400 1700 pF
Output capacitance - 514 620 pF
Feedback capacitance - 218 260 pF

Turn-on delay time VDD = 30 V; ID = 10 A; - 15 - ns
Turn-on rise time VGS = 10 V; RG = 10 Ω -67-ns
Turn-off delay time Resistive load - 77 - ns
Turn-off fall time - 71 - ns

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

DR

I

DRM

V

SD

t

rr

Q

rr

January 1998 2 Rev 1.000

Continuous reverse drain Ta = 25 ˚C, tp ≤ 10 s - - 10 A
current
Pulsed reverse drain current - - 40 A
Diode forward voltage IF = 10 A; VGS = 0 V - 0.8 1.2 V

IF = 40 A; VGS = 0 V - 1.0 - V

Reverse recovery time IF = 10 A; -dIF/dt = 100 A/µs; - 50 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.1 - µC

Philips Semiconductors Product specification

TrenchMOS transistor PHN1013

PD%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Normalised Power Derating

Tamb / C

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

ID%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Tamb / C

= f(Ta)

D 25 ˚C

Normalised Current Derating

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

= f(Ta); conditions: VGS ≥ 10 V

D 25 ˚C

Transient thermal impedance, Zth j-a (K/W)

100

D =

0.5

0.2

10

0.1

0.05

0.02

1

0.1

0.01

0.001
1us 10us 100us 1ms 10ms 100ms 1s 10s

pulse width, tp (s)

P

D

PHN1013

p

D =

t

T

p

t

T

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-a

ID, Drain current (Amps)

20

20 V

10 V

15

10

5

0

0 0.2 0.4 0.6 0.8 1

VDS, Drain-Source voltage (Volts)

6 V

5 V

PHN1013

4.5 V

VGS = 4 V

Tj = 25 C

Fig.5. Typical output characteristics, Tj = 25 ˚C

ID = f(VDS); parameter V

GS

.

ID, Drain current (Amps)

100

10

RDS(ON) = VDS/ID

1

0.1

Ta = 25 C

0.01

0.1 1 10 100

DC

VDS, Drain-source voltage (Volts)

PHN1013

1 ms

10 ms

100 ms

Fig.3. Safe operating area. Ta = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

RDS(on), Drain-Source on resistance (mOhms)

60

50

40

30

20

10

VGS = 4 V

Tj = 25 C

0

0 5 10 15 20

ID, Drain current (Amps)

Fig.6. Typical on-state resistance, Tj = 25 ˚C

R

p

= f(ID); parameter V

DS(ON)

PHN1013

4.5 V

5 V
6 V

10 V
20 V

.

GS

January 1998 3 Rev 1.000