Philips PHK12NQ10T User Manual

PHK12NQ10T

TrenchMOS™ standard level FET

Rev. 01 — 15 September 2003

Product data

M3D315

1.Product profile

1.1Description

N-channel enhancement mode field-effect transistor in a plastic package using

TrenchMOS™ technology.

1.2	Features
	■ Surface mounting package	■ Low on-state resistance.
1.3	Applications
	■ DC-to-DC converter primary side	■ Portable equipment applications.
1.4	Quick reference data
	■ VDS ≤ 100 V	■ ID ≤ 11.6 A
	■ Ptot ≤ 8.9 W	■ RDSon ≤ 28 mΩ

2. Pinning information

Table 1: Pinning - SOT96-1 (SO8), simplified outline and symbol

Pin	Description	Simplified outline	Symbol

1,2,3	source (s)
4	gate (g)
5,6,7,8	drain (d)

8	5		d
		g
1	4
Top view	MBK187	MBB076	s

SOT96-1 (SO8)

Philips Semiconductors			PHK12NQ10T
			TrenchMOS™ standard level FET
3. Ordering information
Table 2: Ordering information
Type number	Package
	Name	Description		Version
PHK12NQ10T	SO8	Plastic small outline package; 8 leads.		SOT96-1

4. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol	Parameter	Conditions		Min	Max	Unit
VDS	drain-source voltage (DC)	25 °C ≤ Tj ≤ 150 °C		-	100	V
VDGR	drain-gate voltage (DC)	25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ		-	100	V
VGS	gate-source voltage (DC)			-	±20	V
ID	drain current (DC)	Tsp = 25 °C; VGS = 10 V; Figure 2 and 3		-	11.6	A
		Tsp = 100 °C; VGS = 10 V; Figure 2		-	7.4	A
IDM	peak drain current	Tsp = 25	°C; pulsed; tp ≤ 10 μs; Figure 3	-	48	A
Ptot	total power dissipation	Tsp = 25	°C; Figure 1	-	8.9	W
Tstg	storage temperature			−55	+150	°C
Tj	junction temperature			−55	+150	°C
Source-drain diode
IS	source (diode forward) current (DC)	Tsp = 25	°C	-	12	A
ISM	peak source (diode forward) current	Tsp = 25	°C; pulsed; tp ≤ 10 μs	-	48	A
Avalanche ruggedness
EDS(AL)S	non-repetitive drain-source	unclamped inductive load; ID = 11.5 A;		-	65	mJ
	avalanche energy	tp = 0.1 ms; VDD ≤ 100 V; VGS = 10 V;
		starting Tj = 25 °C

9397 750 11949

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

Product data

Rev. 01 — 15 September 2003

2 of 12

Philips Semiconductors	PHK12NQ10T
	TrenchMOS™ standard level FET

120							03aa17
Pder
(%)
	80
	40
	0
		0		50	100	150	200
							Tsp (°C)
P		=	Ptot		× 100%
	der		----------------------
			P	°C )
			tot (25

Fig 1. Normalized total power dissipation as a function of solder point temperature.

120					03aa25
Ider
(%)
80
40
0
	0	50	100	150	200
					Tsp (°C)
I der		I D
	= ------------------- × 100%
		I D(25°C )

Fig 2. Normalized continuous drain current as a function of solder point temperature.

102				003aaa509
ID	Limit RDSon = VDS / ID
(A)			tp = 10 μs
10
			100 μs
			1 ms
1			10 ms
		DC
			100 ms
10-1
10-2
10-1	1	10	102	103
			VDS (V)

Tsp = 25 °C; IDM is single pulse

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 11949

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

Product data

Rev. 01 — 15 September 2003

3 of 12

Philips Semiconductors			PHK12NQ10T
			TrenchMOS™ standard level FET
5. Thermal characteristics
Table 4:	Thermal characteristics
Symbol	Parameter	Conditions	Min	Typ	Max	Unit
Rth(j-sp)	thermal resistance from junction to solder point	Figure 4	-	-	15	K/W

5.1 Transient thermal impedance

102						003aaa510
Zth(j-sp)
(K/W)
10	δ = 0.5
	0.2
	0.1
1	0.05						tp
					P	δ =
							T
	0.02
single pulse						tp	t
10-1						T
10-5	10-4	10-3	10-2	10-1	1	tp (s)	10

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.

9397 750 11949

© Koninklijke Philips Electronics N.V. 2003. All rights reserved.

Product data

Rev. 01 — 15 September 2003

4 of 12