Philips PHD3055E, PHP3055E Datasheet

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Philips PHD3055E, PHP3055E Datasheet

Philips Semiconductors

Product specification

 

 

 

 

N-channel TrenchMOStransistor

PHP3055E, PHD3055E

 

 

 

 

FEATURES

SYMBOL

 

 

QUICK REFERENCE DATA

'Trench' technology

 

d

 

VDSS = 55 V

• Low on-state resistance

 

 

 

• Fast switching

 

 

 

ID = 10.3 A

 

 

 

 

 

 

g

 

RDS(ON) 150 mΩ (VGS = 10 V)

 

 

 

 

 

 

s

 

 

 

 

 

 

 

GENERAL DESCRIPTION

N-channel enhancement mode, field-effect power transistor in a plastic envelope using 'trench' technology.

Applications:-

d.c. to d.c. converters

switched mode power supplies

The PHP3055E is supplied in the SOT78 (TO220AB) conventional leaded package.

The PHD3055E is supplied in the SOT428 (DPAK) surface mounting package.

PINNING

 

 

 

SOT78 (TO220AB)

SOT428 (DPAK)

 

 

 

 

 

 

 

 

PIN

DESCRIPTION

tab

 

 

 

 

 

 

 

tab

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1gate

2drain1

3source

 

 

 

2

tab

drain

1

3

 

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

 

 

 

 

 

 

VDSS

Drain-source voltage

Tj = 25 ˚C to 175˚C

-

55

V

VDGR

Drain-gate voltage

Tj = 25 ˚C to 175˚C; RGS = 20 kΩ

-

55

V

VGS

Gate-source voltage

 

-

± 20

V

ID

Continuous drain current

Tmb = 25 ˚C

-

10.3

A

 

 

Tmb = 100 ˚C

-

7.3

A

IDM

Pulsed drain current

Tmb = 25 ˚C

-

41

A

PD

Total power dissipation

Tmb = 25 ˚C

-

33

W

Tj, Tstg

Operating junction and

 

- 55

175

˚C

 

storage temperature

 

 

 

 

1 It is not possible to make connection to pin:2 of the SOT428 package

August 1999

1

Rev 1.200

Philips Semiconductors

Product specification

 

 

N-channel TrenchMOStransistor

PHP3055E PHD3055E

 

 

AVALANCHE ENERGY LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

 

 

 

 

 

 

EAS

Non-repetitive avalanche

Unclamped inductive load, IAS = 3.3 A;

-

25

mJ

 

energy

tp = 220 μs; Tj prior to avalanche = 25˚C;

 

 

 

 

 

VDD 25 V; RGS = 50 Ω; VGS = 10 V; refer

 

 

 

IAS

Peak non-repetitive

to fig:15

-

10.3

A

 

 

avalanche current

 

 

 

 

 

 

 

 

 

 

THERMAL RESISTANCES

SYMBOL

PARAMETER

CONDITIONS

TYP.

MAX.

UNIT

 

 

 

 

 

 

Rth j-mb

Thermal resistance junction

 

-

4.5

K/W

 

to mounting base

 

 

 

 

Rth j-a

Thermal resistance junction

SOT78 package, in free air

60

-

K/W

 

to ambient

SOT428 package, pcb mounted, minimum

50

-

K/W

 

 

footprint

 

 

 

 

 

 

 

 

 

ELECTRICAL CHARACTERISTICS

Tj= 25˚C

unless otherwise specified

 

 

 

 

 

 

SYMBOL

PARAMETER

CONDITIONS

 

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

 

 

V(BR)DSS

 

Drain-source breakdown

VGS = 0 V; ID = 0.25 mA;

 

55

-

-

V

 

 

voltage

Tj = -55˚C

50

-

-

V

VGS(TO)

 

Gate threshold voltage

VDS = VGS; ID = 1 mA

 

2.0

3.0

4.0

V

 

 

 

Tj

= 175˚C

1.0

-

-

V

 

 

 

Tj = -55˚C

-

-

6

V

RDS(ON)

 

Drain-source on-state

VGS = 10 V; ID = 5.5 A

 

-

120

150

mΩ

gfs

 

resistance

Tj

= 175˚C

-

250

315

mΩ

 

Forward transconductance

VDS = 25 V; ID = 5.5 A

 

1.5

3.2

-

S

IGSS

 

Gate source leakage current

VGS = ±10 V; VDS = 0 V

 

-

10

100

nA

IDSS

 

Zero gate voltage drain

VDS = 55 V; VGS = 0 V;

 

-

0.05

10

μA

 

 

current

Tj

= 175˚C

-

-

500

μA

Qg(tot)

 

Total gate charge

ID = 10 A; VDD = 44 V; VGS = 10 V

 

-

5.8

-

nC

Qgs

 

Gate-source charge

 

 

-

1.5

-

nC

Qgd

 

Gate-drain (Miller) charge

 

 

-

3.2

-

nC

td on

 

Turn-on delay time

VDD = 30 V; RD = 2.7 Ω;

 

-

3

10

ns

tr

 

Turn-on rise time

RG = 5.6 Ω; VGS = 10 V

 

-

26

35

ns

td off

 

Turn-off delay time

Resistive load

 

-

8

15

ns

tf

 

Turn-off fall time

 

 

-

10

20

ns

Ld

 

Internal drain inductance

Measured from tab to centre of die

-

3.5

-

nH

Ld

 

Internal drain inductance

Measured from drain lead to centre of die

-

4.5

-

nH

 

 

 

(SOT78 package only)

 

 

 

 

 

Ls

 

Internal source inductance

Measured from source lead to source

-

7.5

-

nH

 

 

 

bond pad

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ciss

 

Input capacitance

VGS = 0 V; VDS = 25 V; f = 1 MHz

 

-

190

250

pF

Coss

 

Output capacitance

 

 

-

55

80

pF

Crss

 

Feedback capacitance

 

 

-

40

50

pF

August 1999

2

Rev 1.200

Philips Semiconductors

Product specification

 

 

N-channel TrenchMOStransistor

PHP3055E PHD3055E

 

 

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

 

 

 

 

 

 

 

 

IS

Continuous source current

 

 

-

-

10.3

A

 

(body diode)

 

 

 

 

 

 

ISM

Pulsed source current (body

 

 

-

-

41

A

 

diode)

 

 

 

 

 

 

VSD

Diode forward voltage

IF = 10

A; VGS = 0 V

-

1.1

1.5

V

trr

Reverse recovery time

IF = 10

A; -dIF/dt = 100 A/μs;

-

32

-

ns

Qrr

Reverse recovery charge

VGS = 0 V; VR = 30 V

-

50

-

nC

August 1999

3

Rev 1.200

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