Philips PHD12N10E Datasheet

Philips Semiconductors Product Specification
PowerMOS transistor PHD12N10E
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope suitable for surface V mounting. The device is intended for I use in Switched Mode Power P Supplies (SMPS), motor control, T welding, DC/DC and AC/DC R
DS
D
tot j
DS(ON)
converters, and in general purpose switching applications.
PINNING - SOT428 PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V Drain current (DC) 14 A Total power dissipation 75 W Junction temperature 175 ˚C Drain-source on-state resistance 0.16
PIN DESCRIPTION
tab
d
1 gate 2 drain
g
3 source
tab drain
2
1
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V V ±V I
D
I
D
I
DM
P T T
DS DGR
GS
tot stg j
Drain-source voltage - - 100 V Drain-gate voltage RGS = 20 k - 100 V Gate-source voltage - - 30 V Drain current (DC) Tmb = 25 ˚C - 14 A Drain current (DC) Tmb = 100 ˚C - 10 A Drain current (pulse peak value) Tmb = 25 ˚C - 56 A Total power dissipation Tmb = 25 ˚C - 75 W Storage temperature - - 55 175 ˚C Junction Temperature - - 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R R
th j-mb
th j-a
Thermal resistance junction to - 2 K/W mounting base Thermal resistance junction to pcb mounted, minimum 50 - K/W ambient footprint
September 1997 1 Rev 1.000
Philips Semiconductors Product Specification
PowerMOS transistor PHD12N10E
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
s
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 100 - - V voltage Gate threshold voltage VDS = VGS; ID = 1 mA 2.1 3.0 4.0 V Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 25 ˚C - 1 10 µA Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 125 ˚C - 0.1 1.0 mA Gate source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA Drain-source on-state VGS = 10 V; ID = 5 A - 0.15 0.16 resistance
Forward transconductance VDS = 25 V; ID = 5 A 4.0 5.5 - S Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 660 825 pF
Output capacitance - 140 200 pF Feedback capacitance - 60 100 pF
Turn-on delay time VDD = 30 V; ID = 3 A; - 10 20 ns Turn-on rise time VGS = 10 V; RGS = 50 ; - 25 40 ns Turn-off delay time R Turn-off fall time - 40 55 ns
= 50 - 6090ns
gen
Internal drain inductance Measured from tab to centre of die - 3.5 - nH Internal source inductance Measured from source lead solder - 7.5 - nH
point to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V t
rr
Q
SD
rr
Continuous reverse drain - - - 14 A current Pulsed reverse drain current - - - 56 A Diode forward voltage IF = 14 A ; VGS = 0 V - 1.2 1.5 V
Reverse recovery time IF = 14 A; -dIF/dt = 100 A/µs; - 90 - ns Reverse recovery charge VGS = 0 V; VR = 30 V - 0.6 - µC
AVALANCHE LIMITING VALUE
Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
Drain-source non-repetitive ID = 14 A; VDD 50 V; VGS = 10 V; - - 70 mJ unclamped inductive turn-off RGS = 50 energy
September 1997 2 Rev 1.000
Philips Semiconductors Product Specification
PowerMOS transistor PHD12N10E
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
Zth j-mb / (K/W)
1E+01
1E+00
1E-01
1E-02
0.5
0.2
0.1
0.05
t / s
P
D
0.02
0
1E-07 1E-05 1E-03 1E-01 1E+01
ZTHX53
p
t
p
t
D =
T
t
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID / A
28 24 20 16 12
8 4 0
0 2 4 6 8 10
VGS / V =
20
15
VDS / V
BUK453-100A
10
8
7
6
5
4
Fig.5. Typical output characteristics, Tj = 25 ˚C
ID = f(VDS); parameter V
GS
.
ID / A
100
10
1
0.1
RDS(ON) = VDS/ID
1 100
10
A
B
DC
VDS / V
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
BUK453-100
tp = 10 us
100 us
1 ms 10 ms
100 ms
VGS / V =
7
BUK453-100A
7.5 8
10
20
GS
.
RDS(ON) / Ohm
1.0
0.8
0.6
0.4
0.2
0
5 5.5 6
4.5
0 4 8 12 16 20 24 28
6.5
ID / A
Fig.6. Typical on-state resistance, Tj = 25 ˚C
R
p
= f(ID); parameter V
DS(ON)
September 1997 3 Rev 1.000
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