Philips PHB83N03LT, PHP83N03LT Datasheet
1. Description
2. Features
PHP83N03LT; PHB83N03LT;
PHE83N03LT
N-channel TrenchMOS transistor
Rev. 01 — 23 January 2001 Product specification
N-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
PHP83N03LT in a SOT78 (TO-220AB)
PHB83N03LT in a SOT404 (D2-PAK)
PHE83N03LT in a SOT226 (I2-PAK).
■ Low on-state resistance
■ Fast switching.
3. Applications
■ High frequency computer motherboard DC to DC converters
c
c
4. Pinning information
Table 1: Pinning - SOT78, SOT404, SOT226 simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
2 drain (d)
3 source (s)
mb mounting base,
connected to
drain (d)
[1]
MBK106
12mb3
SOT78 (TO-220AB) SOT404 (D
mb
2
13
MBK116
2
-PAK) SOT226 (I2-PAK)
123
MBK112
MBB076
d
g
s
[1] It is not possible to make connection to pin 2 of the SOT404 package.
1. TrenchMOS is a trademark of Royal Phillips Electronics.
Philips Semiconductors
PHP83N03LT series
N-channel TrenchMOS transistor
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
V
I
P
T
R
DS
D
tot
j
DSon
drain-source voltage (DC) Tj=25to175°C − 25 V
drain current (DC) Tmb=25°C; VGS=5V − 75 A
total power dissipation Tmb=25°C − 115 W
junction temperature − 175 °C
drain-source on-state resistance VGS= 10 V; ID= 25 A; Tj=25°C 6.5 9 mΩ
=5V; ID= 25 A; Tj=25°C 1012mΩ
V
GS
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
Avalanche ruggedness
E
AS
I
AS
drain-source voltage (DC) Tj=25to175°C − 25 V
drain-gate voltage (DC) Tj=25to175°C; RGS=20kΩ−25 V
gate-source voltage (DC) −±15 V
gate-source voltage tp≤ 50 µs; pulsed;
duty cycle 25%; T
≤ 150 °C
j
−±20 V
drain current (DC) Tmb=25°C; VGS=5V;Figure 2 and 3 − 75 A
= 100 °C; VGS=5V;Figure 2 − 61 A
T
mb
peak drain current Tmb=25°C; pulsed; tp≤ 10 µs; Figure 3 − 240 A
total power dissipation Tmb=25°C; Figure 1 − 115 W
storage temperature −55 +175 °C
operating junction temperature −55 +175 °C
source (diode forward) current (DC) Tmb=25°C − 75 A
peak source (diode forward) current Tmb=25°C; pulsed; tp≤ 10 µs − 240 A
non-repetitive avalanche energy unclamped inductive load;
=75A;tp= 0.1 ms; VDD=15V;
I
D
=50Ω; VGS= 5V; starting Tj=25°C
R
GS
non-repetitive avalanche current unclamped inductive load;
=15V;RGS=50Ω; VGS=5V;
V
DD
starting T
=25°C
j
− 120 mJ
− 75 A
9397 750 07815
Product specification Rev. 01 — 23 January 2001 2 of 15
© Philips Electronics N.V. 2001. All rights reserved.
Philips Semiconductors
PHP83N03LT series
N-channel TrenchMOS transistor
120
P
110
der
(%)
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
P
P
der
tot
----------------------
P
tot 25 C°()
100%×= I
03ac97
Tmb (oC)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
3
10
I
D
R
DSon
(A)
2
10
= V
T
03ad95
mb
(ºC)
der
120
I
der
(%)
100
80
60
40
20
0
0 60 120 180
I
D
------------------ -
I
D25C°()
100%×=
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03ad86
/ I
DS
D
tp = 10 µs
100 µs
1 ms
10
1
1 10 10
D.C.
t
P
p
δ
=
T
t
t
p
T
10 ms
100 ms
V
DS
(V)
2
Tmb=25°C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07815
© Philips Electronics N.V. 2001. All rights reserved.
Product specification Rev. 01 — 23 January 2001 3 of 15
Philips Semiconductors
PHP83N03LT series
N-channel TrenchMOS transistor
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Value Unit
R
th(j-mb)
R
th(j-a)
thermal resistance from junction to mounting
base
thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W
7.1 Transient thermal impedance
Figure 4 1.3 K/W
vertical in still air; SOT226 package 65 K/W
mounted on a printed circuit board; minimum
50 K/W
footprint; SOT404 and SOT226 packages
10
Z
th(j-sp)
(K/W)
1
10
10
10
-1
-2
-3
10
δ = 0.5
0.2
0.1
0.05
0.02
single pulse
-5
P
-4
10
-3
10
-2
10
-1
10
1 10
03ad85
t
p
δ
=
T
t
p
t
T
tp (s)
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 07815
© Philips Electronics N.V. 2001. All rights reserved.
Product specification Rev. 01 — 23 January 2001 4 of 15
Philips Semiconductors
PHP83N03LT series
N-channel TrenchMOS transistor
8. Characteristics
Table 5: Characteristics
Tj=25°C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
R
DSon
Dynamic characteristics
g
fs
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Source-drain diode
V
SD
drain-source breakdown voltage ID= 0.25 mA; VGS=0V
=25°C25−−V
T
j
= −55 °C22−−V
T
j
gate-source threshold voltage ID= 1 mA; VDS=VGS; Figure 9
=25°C 1 1.5 2 V
T
j
= 175 °C 0.5 −−V
T
j
= −55 °C −−2.3 V
T
j
drain-source leakage current VDS=25V; VGS=0V
=25°C − 0.05 10 µA
T
j
= 175 °C −−500 µA
T
j
gate-source leakage current VGS= ±5 V; VDS=0V − 10 100 nA
drain-source on-state resistance VGS=5V; ID=25A;Figure 7 and 8
=25°C − 10 12 mΩ
T
j
= 175 °C − 17 20.5 mΩ
T
j
= 10 V; ID=25A
V
GS
=25°C − 6.5 9 mΩ
T
j
forward transconductance VDS=25V; ID=30A;Figure 11 − 55 − S
total gate charge ID= 30 A; VDD=15V; VGS=5V;Figure 14 − 33 − nC
gate-source charge − 7 − nC
gate-drain (Miller) charge − 12.5 − nC
input capacitance VGS=0V; VDS= 25 V; f = 1 MHz; Figure 12 − 1660 − pF
output capacitance − 590 − pF
reverse transfer capacitance − 380 − pF
turn-on delay time VDD=15V; ID= 1 A; VGS=10V; RG=6Ω;
turn-on rise time − 14 30 ns
resistive load
− 920ns
turn-off delay time − 75 95 ns
turn-off fall time − 60 80 ns
source-drain (diode forward) voltage IS= 25 A; VGS=0V;Figure 13 − 0.9 1.2 V
=40A;VGS=0V − 0.95 − V
I
S
9397 750 07815
Product specification Rev. 01 — 23 January 2001 5 of 15
© Philips Electronics N.V. 2001. All rights reserved.
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