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PHP/PHB/PHD45N03LTA
N-channel enhancement mode field-effect transistor
Rev. 02 — 02 November 2001 |
Product data |
1. Description
N-channel logic level field-effect power transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
PHP45N03LTA in SOT78 (TO-220AB)
PHB45N03LTA in SOT404 (D2-PAK)
PHD45N03LTA in SOT428 (D-PAK).
2. Features
■Low on-state resistance
■Fast switching.
3. Applications
■Computer motherboard high frequency DC to DC converters.
4.Pinning information
Table 1: Pinning - SOT78, SOT404, SOT428 simplified outline and symbol
Pin |
Description |
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Simplified outline |
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1 |
gate (g) |
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mb |
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mb |
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mb |
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d |
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2 |
drain (d) |
[1] |
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3 |
source (s) |
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g |
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mb |
mounting base, |
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connected to drain (d) |
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MBB076 |
s |
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2 |
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1 |
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2 |
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3 MBK116 |
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3 |
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MBK106 |
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Top view |
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MBK091 |
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SOT78 (TO-220AB) |
SOT404 (D2-PAK) |
SOT428 (D-PAK) |
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[1]It is not possible to make connection to pin 2 of the SOT404 and SOT428 packages.
1.TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors |
PHP/PHB/PHD45N03LTA |
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N-channel enhancement mode field-effect transistor |
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5. Quick reference data |
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Table 2: Quick reference data |
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Symbol |
Parameter |
Conditions |
Typ |
Max |
Unit |
VDS |
drain-source voltage (DC) |
Tj = 25 to 175 °C |
- |
25 |
V |
ID |
drain current (DC) |
Tmb = 25 °C; VGS = 5 V |
- |
40 |
A |
Ptot |
total power dissipation |
Tmb = 25 °C |
- |
65 |
W |
Tj |
junction temperature |
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175 |
°C |
RDSon |
drain-source on-state resistance |
VGS = 10 V; ID = 25 A |
13 |
21 |
mΩ |
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VGS = 5 V; ID = 25 A |
17.5 |
24 |
mΩ |
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VGS = 3.5 V; ID = 5.2 A |
22 |
40 |
mΩ |
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol |
Parameter |
Conditions |
Min |
Max |
Unit |
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VDS |
drain-source voltage (DC) |
Tj = 25 to 175 °C |
- |
25 |
V |
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VDGR |
drain-gate voltage (DC) |
Tj = 25 to 175 °C; RGS = 20 kΩ |
- |
25 |
V |
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VGS |
gate-source voltage (DC) |
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- |
±15 |
V |
VGSM |
gate-source voltage |
tp ≤ 50 μs; pulsed; |
- |
±20 |
V |
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duty cycle 25 %; Tj ≤ 150 °C |
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ID |
drain current (DC) |
Tmb = 25 °C; VGS = 5 V; Figure 2 and 3 |
- |
40 |
A |
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Tmb = 100 °C; VGS = 5 V; Figure 2 |
- |
30 |
A |
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IDM |
peak drain current |
Tmb = 25 |
°C; pulsed; tp ≤ 10 μs; Figure 3 |
- |
160 |
A |
Ptot |
total power dissipation |
Tmb = 25 |
°C; Figure 1 |
- |
65 |
W |
Tstg |
storage temperature |
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−55 |
+175 |
°C |
Tj |
operating junction temperature |
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−55 |
+175 |
°C |
Source-drain diode |
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IS |
source (diode forward) current (DC) |
Tmb = 25 |
°C |
- |
40 |
A |
ISM |
peak source (diode forward) current |
Tmb = 25 |
°C; pulsed; tp ≤ 10 μs |
- |
160 |
A |
Avalanche ruggedness |
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EAS |
non-repetitive avalanche energy |
unclamped inductive load; |
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60 |
mJ |
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ID = 40 A; tp = 0.1 ms; VDD = 15 V; |
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RGS = 50 Ω; VGS = 5V; starting Tj = 25 °C; |
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9397 750 09023 |
© Koninklijke Philips Electronics N.V. 2001. All rights reserved. |
Product data |
Rev. 02 — 02 November 2001 |
2 of 14 |
Philips Semiconductors |
PHP/PHB/PHD45N03LTA |
|
N-channel enhancement mode field-effect transistor |
|
120 |
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03aa16 |
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Pder |
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(%) |
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80 |
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40 |
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0 |
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0 |
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50 |
100 |
150 |
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200 |
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T |
mb |
(oC) |
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P |
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= |
Ptot |
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× 100% |
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der |
---------------------- |
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P |
°C ) |
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tot (25 |
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Fig 1. Normalized total power dissipation as a function of mounting base temperature.
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120 |
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03aa24 |
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I der |
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(%) |
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80 |
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40 |
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0 |
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0 |
50 |
100 |
150 |
200 |
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Tmb (oC) |
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I der |
I D |
× 100% |
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= ------------------ |
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I D(25°C ) |
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Fig 2. Normalized continuous drain current as a function of mounting base temperature.
103 |
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03af58 |
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ID |
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(A) |
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RDSon = VDS / ID |
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tp = 10 µs |
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102 |
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100 µs |
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10 |
tp |
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P |
δ = T |
D.C. |
1 ms |
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10 ms |
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tp |
t |
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T |
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1 |
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1 |
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10 |
VDS (V) |
102 |
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Tmb = 25 °C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09023 |
© Koninklijke Philips Electronics N.V. 2001. All rights reserved. |
Product data |
Rev. 02 — 02 November 2001 |
3 of 14 |
Philips Semiconductors |
PHP/PHB/PHD45N03LTA |
|||
|
|
N-channel enhancement mode field-effect transistor |
||
7. Thermal characteristics |
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Table 4: |
Thermal characteristics |
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Symbol |
Parameter |
Conditions |
Value |
Unit |
Rth(j-mb) |
thermal resistance from junction to mounting |
Figure 4 |
2.3 |
K/W |
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base |
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Rth(j-a) |
thermal resistance from junction to ambient |
vertical in still air; SOT78 package |
60 |
K/W |
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mounted on a printed circuit board; minimum |
50 |
K/W |
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footprint; SOT404 and SOT428 packages |
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7.1 Transient thermal impedance
10 |
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03af57 |
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Zth(j-mb) |
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(K/W) |
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1 |
δ = 0.5 |
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0.2 |
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0.1 |
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0.05 |
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10-1 |
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P |
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tp |
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0.02 |
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δ = T |
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single pulse |
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tp |
T |
t |
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10-2 |
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10-5 |
10-4 |
10-3 |
10-2 |
10-1 |
tp (s) |
1 |
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Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09023 |
© Koninklijke Philips Electronics N.V. 2001. All rights reserved. |
Product data |
Rev. 02 — 02 November 2001 |
4 of 14 |
Philips Semiconductors |
PHP/PHB/PHD45N03LTA |
|
N-channel enhancement mode field-effect transistor |
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
Static characteristics |
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V(BR)DSS |
drain-source breakdown voltage |
ID = 0.25 mA; VGS = 0 V |
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Tj = 25 °C |
25 |
- |
- |
V |
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Tj = −55 °C |
22 |
- |
- |
V |
VGS(th) |
gate-source threshold voltage |
ID = 1 mA; VDS = VGS; Figure 9 |
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Tj = 25 °C |
1 |
1.5 |
2 |
V |
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Tj = 175 °C |
0.5 |
- |
- |
V |
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Tj = −55 °C |
- |
- |
2.3 |
V |
IDSS |
drain-source leakage current |
VDS = 25 V; VGS = 0 V |
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Tj = 25 °C |
- |
0.05 |
10 |
μA |
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Tj = 175 °C |
- |
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500 |
μA |
IGSS |
gate-source leakage current |
VGS = ±5 V; VDS = 0 V |
- |
10 |
100 |
nA |
RDSon |
drain-source on-state resistance |
VGS = 5 V; ID = 25 A; Figure 7 and 8 |
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Tj = 25 °C |
- |
17.5 |
24 |
mΩ |
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Tj = 175 °C |
- |
30 |
40.8 |
mΩ |
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VGS = 10 V; ID = 25 A; Figure 7 and 8 |
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Tj = 25 °C |
- |
13 |
21 |
mΩ |
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VGS = 3.5 V; ID = 5.2 A; Figure 7 and 8 |
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Tj = 25 °C |
- |
22 |
40 |
mΩ |
Dynamic characteristics |
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Qg(tot) |
total gate charge |
ID = 40 A; VDD = 24 V; VGS = 5 V; Figure 13 |
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19 |
- |
nC |
Qgs |
gate-source charge |
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5 |
- |
nC |
Qgd |
gate-drain (Miller) charge |
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8 |
11 |
nC |
Ciss |
input capacitance |
VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 11 |
- |
700 |
- |
pF |
Coss |
output capacitance |
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290 |
- |
pF |
Crss |
reverse transfer capacitance |
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200 |
- |
pF |
td(on) |
turn-on delay time |
VDD = 15 V; ID = 15 A; VGS = 10 V; |
- |
10 |
20 |
ns |
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RG = 6 Ω; resistive load |
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tr |
turn-on rise time |
- |
60 |
90 |
ns |
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td(off) |
turn-off delay time |
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- |
35 |
60 |
ns |
tf |
turn-off fall time |
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40 |
60 |
ns |
Source-drain diode |
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VSD |
source-drain (diode forward) voltage |
IS = 25 A; VGS = 0 V; Figure 12 |
- |
0.95 |
1.2 |
V |
9397 750 09023 |
© Koninklijke Philips Electronics N.V. 2001. All rights reserved. |
Product data |
Rev. 02 — 02 November 2001 |
5 of 14 |
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