Philips phb3055e DATASHEETS

Philips Semiconductors Preliminary specification

TrenchMOS transistor PHP3055E, PHB3055E, PHD3055E

FEATURES SYMBOL QUICK REFERENCE DATA

• ’Trench’ technology

• Very low on-state resistance V

d

= 55 V

DSS

• Fast switching

• High thermal cycling performance I

• Low thermal resistance

g

R

DS(ON)

s

= 10.5 A

D

≤ 150 mΩ (VGS = 10 V)

GENERAL DESCRIPTION

N-channelenhancementmode,field-effect power transistor inaplastic envelope using ’trench’technology. The device
hasverylowon-stateresistance.Itisintendedforuseindctodcconvertersandgeneralpurposeswitchingapplications.

The PHP3055E is supplied in the SOT78 (TO220AB) conventional leaded package.
The PHB3055E is supplied in the SOT404 surface mounting package.
The PHD3055E is supplied in the SOT428 surface mounting package.

PINNING SOT78 (TO220AB) SOT404 SOT428

PIN DESCRIPTION

1 gate
2 drain

1

3 source

tab drain

tab

123

tab

2

13

tab

123

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DSS

V

DGR

V

GS

I

D

I

DM

P

D

Tj, T

1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages.

May 1999 1 Rev 1.100

Drain-source voltage Tj = 25 ˚C to 175˚C - 55 V
Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 kΩ -55V
Gate-source voltage - ± 20 V
Continuous drain current Tmb = 25 ˚C - 10.5 A

Tmb = 100 ˚C - 7.6 A
Pulsed drain current Tmb = 25 ˚C - 42 A
Total power dissipation Tmb = 25 ˚C - 36 W
Operating junction and - 55 175 ˚C

stg

storage temperature

Philips Semiconductors Preliminary specification

TrenchMOS transistor PHP3055E, PHB3055E, PHD3055E

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R

th j-mb

R

th j-a

ELECTRICAL CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

R

DS(ON)

g

fs

I

GSS

I

DSS

Q

g(tot)

Q

gs

Q

gd

t

d on

t

r

t

d off

t

f

L

d

L

d

L

s

C

iss

C

oss

C

rss

Thermal resistance junction - 4.17 K/W
to mounting base
Thermal resistance junction SOT78 package, in free air 60 - K/W
to ambient SOT428 and SOT404 package, pcb 50 - K/W

mounted, minimum footprint

Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 55 - - V
voltage Tj = -55˚C 50 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V

Tj = 175˚C 1.0 - - V

Tj = -55˚C - - 4.4 V
Drain-source on-state VGS = 10 V; ID = 5.5 A - 120 150 mΩ
resistance Tj = 175˚C - 250 315 mΩ
Forward transconductance VDS = 25 V; ID = 5.5 A 4 10 - S
Gate source leakage current VGS = ±10 V; VDS = 0 V - 10 100 nA
Zero gate voltage drain VDS = 55 V; VGS = 0 V; - 0.05 10 µA
current Tj = 175˚C - - 500 µA

Total gate charge ID = 5 A; V

= 44 V; VGS = 10 V - 6 - nC

DD

Gate-source charge - 1.6 - nC
Gate-drain (Miller) charge - 2.4 - nC

Turn-on delay time VDD = 30 V; ID = 5 A; - 6 16 ns
Turn-on rise time VGS = 10 V; RG = 10 Ω -2335ns
Turn-off delay time Resistive load - 18 30 ns
Turn-off fall time - 18 30 ns

Internal drain inductance Measured from tab to centre of die - 3.5 - nH
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH

(SOT78 package only)

Internal source inductance Measured from source lead to source - 7.5 - nH

bond pad

Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 190 250 pF
Output capacitance - 65 80 pF
Feedback capacitance - 32 45 pF

May 1999 2 Rev 1.100

Philips Semiconductors Preliminary specification

TrenchMOS transistor PHP3055E, PHB3055E, PHD3055E

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

S

I

SM

V

SD

t

rr

Q

rr

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

W

DSS

Continuous source current - - 11 A
(body diode)
Pulsed source current (body - - 44 A
diode)
Diode forward voltage IF = 11 A; VGS = 0 V - 0.95 1.2 V

Reverse recovery time IF = 11 A; -dIF/dt = 100 A/µs; - 34 - ns
Reverse recovery charge VGS = 0 V; VR = 30 V - 57 - nC

Drain-source non-repetitive ID ≤ 10 A; VDD ≤ 25 V; VGS = 10 V; - 10 mJ
unclamped inductive turn-off RGS = 50 Ω; Tmb = 25 ˚C
energy

May 1999 3 Rev 1.100

Philips Semiconductors Preliminary specification

TrenchMOS transistor PHP3055E, PHB3055E, PHD3055E

PD%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Normalised Power Derating

Tmb / C

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

ID%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140

Tmb / C

= f(Tsp)

D 25 ˚C

Normalised Current Derating

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

= f(Tsp); conditions: VGS ≥ 10 V

D 25 ˚C

Zth j-mb / K/W

10

D =

0.5

1

0.2

0.1

0.01

0.1

0.05

0.02

0

1.0E-06

0.0001

0.01

p

t

P

D

t/s

t

D =

T

T

1 100

p

t

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-sp

25

ID/A

20

15

10

5

0

0246810

VGS/V =

VDS/V

Fig.5. Typical output characteristics, Tj = 25 ˚C

ID = f(VDS); parameter V

GS

16
12
10

9.5

9.0

8.5

8.0

7.5

7.0

6.5

6.0

5.5

5.0

4.5

4.0

.

100

ID/A

RDS(ON) = VDS/ID

10

1

0.1
1 10 100

DC

VDS/V

Fig.3. Safe operating area. Tsp = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

tp =
1us

10us

100us

1ms
10ms

100ms

p

RDS(ON)mOhm

400

300

200

100

0

01234567891011

5.55

6

6.5
7

8

10

ID/A

Fig.6. Typical on-state resistance, Tj = 25 ˚C

R

= f(ID); parameter V

DS(ON)

GS

.

May 1999 4 Rev 1.100