Philips PHB100N03LT Datasheet

M3D166

1. Description

2. Features

PHB100N03LT

N-channel enhancement mode field-effect transistor

Rev. 01 — 07 September 2000 Product specification

N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™1 technology.

Product availability:

PHB100N03LT in SOT404 (D2-PAK).

■ TrenchMOS™ technology

■ Low on-state resistance

■ Avalanche ruggedness rated

■ Logic level compatible

■ Surface mount package.

3. Applications

c

c

■ DC to DC converters

■ Synchronous rectification.

4. Pinning information

Table 1: Pinning - SOT404, simplified outline and symbol

Pin Description Simplified outline Symbol

1 gate (g)
2 drain (d)

[1]

3 source (s)
mb connected to drain (d)

[1] It is not possible to make connection to pin 2 of the SOT404 package.

1. TrenchMOS is a trademark of Royal Philips Electronics.

mb

2

13

SOT404 (D

2

MBK116

-PAK)

g

MBB076

d

s

Philips Semiconductors

PHB100N03LT

N-channel enhancement mode field-effect transistor

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

V
I
P
T
R

DS

D

tot
j
DSon

drain-source voltage (DC) Tj=25to175°C − 25 V
drain current (DC) Tmb=25°C; VGS=5V − 75 A
total power dissipation Tmb=25°C − 125 W
junction temperature − 175 °C
drain-source on-state resistance VGS= 10 V; ID= 25 A 5.0 5.8 mΩ

=5V; ID= 25 A 6.2 7.5 mΩ

V

GS

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

V

GSM

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

S

I

SM

Avalanche ruggedness

E

AS

I

AS

drain-source voltage (DC) Tj=25to175°C − 25 V
drain-gate voltage (DC) Tj=25to175°C; RGS=20kΩ−25 V
gate-source voltage (DC) −±15 V
peak gate-source voltage tp≤ 50 µs; pulsed; duty cycle = 25% −±20 V
drain current (DC) Tmb=25°C; VGS=5V;

− 75 A

Figure 2 and 3

T

= 100 °C; VGS=5V;Figure 2 − 67 A

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;

− 240 A

Figure 3

total power dissipation Tmb=25°C; Figure 1 − 125 W
storage temperature −55 +175 °C
operating junction temperature −55 +175 °C

source (diode forward) current (DC) Tmb=25°C − 75 A
peak source (diode forward) current Tmb=25°C; pulsed; tp≤ 10 µs − 240 A

non-repetitive avalanche energy unclamped inductive load; ID=75A;

= 0.2 ms; VDD≤ 15 V; RGS=50Ω;

t

p

= 5 V; starting Tj=25°C; Figure 4

V

GS

non-repetitive avalanche current unclamped inductiveload; VDD≤ 15 V;

=50Ω; VGS=5V;Figure 4

R

GS

− 240 mJ

− 75 A

9397 750 07309

Product specification Rev. 01 — 07 September 2000 2 of 13

© Philips Electronics N.V. 2000. All rights reserved.

Philips Semiconductors

PHB100N03LT

N-channel enhancement mode field-effect transistor

120

P

der

(%)

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

P

P

der

tot

----------------------

P

tot 25 C°()

100%×=

03aa16

Tmb (oC)

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

3

10

I

D

(A)

2

10

10

R

DSon=VDS/ID

P

D.C.

t

p

δ

=

T

03ab18

tp=10µs

100µs

1ms

10 ms

100 ms

120

I

der

(%)

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

03ac83

Tmb(oC)

VGS≥ 5V

I

I

der

D

------------------ -

I

D25C°()

100%×=

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

2

10

I

AS

(A)

10

Tjprior to avalanche = 150oC

03ab29

25oC

t

p

1

-1

10

t

T

11010

VDS(V)

2

1

-3

10

-2

10

-1

10

110

tp(ms)

Tmb=25°C; IDM is single pulse. Unclamped inductive load; VDD≤ 15 V; RGS=50Ω;

VGS= 5 V; starting Tj=25°C and 150°C.

Fig 3. Safe operating area; continuous and peak drain

currents as a function of drain-source voltage.

9397 750 07309

Fig 4. Non-repetitive avalanche ruggedness current

as a function of pulse duration.

© Philips Electronics N.V. 2000. All rights reserved.

Product specification Rev. 01 — 07 September 2000 3 of 13

Philips Semiconductors

PHB100N03LT

N-channel enhancement mode field-effect transistor

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Value Unit

R

th(j-mb)

R

th(j-a)

thermal resistance from junction to mounting
base

thermal resistance from junction to ambient mounted on a printed circuit board;

7.1 Transient thermal impedance

Figure 5 1.2 K/W

50 K/W

minimum footprint

03ab19

t

p

δ =

T

t

T

-1
tp (s)

1

Z

th(j-mb)

K/W

10

δ = 0.5

1

0.2

0.1

-1

10

0.05

0.02

-2

10

single pulse

-3

10

-6

10

-5

10

-4

10

-3

10

P

t

p

-2

10

10

Fig 5. Transient thermal impedance from junction to mounting base as a function of

pulse duration.

9397 750 07309

© Philips Electronics N.V. 2000. All rights reserved.

Product specification Rev. 01 — 07 September 2000 4 of 13