Philips PESD3V3L5UV, PESD5V0L5UV Technical data

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DATA SH EET

M3D744

PESD3V3L5UV; PESD5V0L5UV

Low capacitance 5-fold ESD
protection diode arrays in SOT666
package

Product specification 2004 Mar 23

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

FEATURES

• Uni-directional ESD protection of up to five lines

• Bi-directional ESD protection of up to four lines

• Low diode capacitance

• Maximum peak pulse power: Ppp= 25 W at tp= 8/20µs

• Low clamping voltage: V

• Ultra low leakage current: IRM= 8 nA at V

• ESD protection > 20 kV

• IEC 61000-4-2; level 4 (ESD)

• IEC 61000-4-5 (surge); Ipp= 2.5 A at Tp= 8/20 µs.

APPLICATIONS

• Cellular handsets and accessories

• Portable electronics

• Computers and peripherals

• Communications systems

• Audio and video equipment.

DESCRIPTION

= 12 V at Ipp= 2.5 A

CL(R)

RWM

=5V

PESD3V3L5UV;

PESD5V0L5UV

QUICK REFERENCE DATA

SYMBOL PARAMETER VALUE UNIT

V

RWM

C

d

PINNING

PIN DESCRIPTION

reverse standoff voltage

PESD3V3L5UV 3.3 V
PESD5V0L5UV 5 V

diode capacitance

PESD3V3L5UV 22 pF
PESD5V0L5UV 16 pF

number of protected lines 5

1 cathode 1
2 common anode
3 cathode 2
4 cathode 3
5 cathode 4
6 cathode 5

Low capacitance 5-fold ESD protection array in the ultra
small SOT666 plastic package designed to protect up to
five transmissionor data lines from the damage caused by
Electrostatic Discharge (ESD).

MARKING

TYPE NUMBER MARKING CODE

(1)

456

1
3
42
5
6

PESD3V3L5UV *E1
PESD5V0L5UV *E2

132

001aaa213

sym011

Note

1. * = p: Made in Hong Kong.
* = t: Made in Malaysia.

Fig.1 Simplified outline (SOT666) and symbol.

* = W: Made in China.

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME DESCRIPTION VERSION

PESD3V3L5UV − plastic surface mounted package; 6 leads SOT666
PESD5V0L5UV − plastic surface mounted package; 6 leads SOT666

2004 Mar 23 2

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

Per diode

P

pp

I

pp

T

j

T

amb

T

stg

Notes

1. Non-repetitive current pulse 8/20 µs exponentially decaying waveform; see Fig.2.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

ESD maximum ratings

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Per diode

ESD electrostatic discharge capability IEC 61000-4-2 (contact

peak pulse power 8/20 µs pulse; notes 1 and 2 − 25 W
peak pulse current 8/20 µs pulse; notes 1 and 2 − 2.5 A
junction temperature − 150 °C
operation ambient temperature −65 +150 °C
storage temperature −65 +150 °C

discharge); notes 1 and 2
HBM MIL-Std 883 10 kV

PESD3V3L5UV;

PESD5V0L5UV

20 kV

Notes

1. Device stressed with ten non-repetitive Electrostatic Discharge (ESD) pulses; see Fig.3.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

ESD standards compliance

ESD STANDARD CONDITIONS

IEC 61000-4-2, level 4 (ESD) > 15 kV (air); > 8 kV (contact)
HBM MIL-Std 883, class 3 > 4 kV

2004 Mar 23 3

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

120

handbook, halfpage

I

pp

(%)

80

40

0

010

100 % Ipp; 8 µs

−t

e

20

50 % Ipp; 20 µs

MLE218

t (µs)

40

30

100 %

90 %

10 %

PESD3V3L5UV;

PESD5V0L5UV

001aaa191

I

pp

tr = 0.7 to 1 ns

30 ns

60 ns

t

Fig.2 8/20 µs pulse waveform according to

IEC 61000-4-5.

Fig.3 Electrostatic Discharge (ESD) pulse

waveform according to IEC 61000-4-2.

2004 Mar 23 4

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

CHARACTERISTICS

Tj=25°C unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Per diode

V

I

V

C

V

r

RM

diff

RWM

BR

d

CL(R)

reverse stand-off voltage

PESD3V3L5UV −−3.3 V
PESD5V0L5UV −−5V

reverse leakage current

PESD3V3L5UV V
PESD5V0L5UV V

breakdown voltage IR=1mA

PESD3V3L5UV 5.3 5.6 5.9 V
PESD5V0L5UV 6.4 6.8 7.2 V

diode capacitance f = 1 MHz; VR=0V;

PESD3V3L5UV − 22 28 pF
PESD5V0L5UV − 16 19 pF

clamping voltage notes 1 and 2

PESD3V3L5UV Ipp=1A −−10 V

PESD5V0L5UV Ipp=1A −−10 V

differential resistance IR=1mA

PESD3V3L5UV −−200 Ω
PESD5V0L5UV −−100 Ω

= 3.3 V − 75 300 nA

RWM

=5V − 525nA

RWM

see Fig.5

Ipp= 2.5 A −−12 V

Ipp= 2.5 A −−12 V

PESD3V3L5UV;

PESD5V0L5UV

Notes

1. Non-repetitive current pulse 8/20 µs exponentially decaying waveform; see Fig.2.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

2004 Mar 23 5

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

GRAPHICAL DATA

10

001aaa208

3

tp (µs)

4

2

10

P

pp

(W)

10

1

110

T

=25°C.

amb

Ipp= 8/20 µs exponentially decaying waveform; see Fig.2.

10 10

2

Fig.4 Peak pulse power dissipation as a function

of pulse time; typical values.

PESD3V3L5UV;

PESD5V0L5UV

P

pp(Tj)

P

pp(Tj=25°C)

1.0

0.8

0.6

0.4

0.2

0

0 15010050

Fig.5 Relative variation ofpeak pulse power as a

function of junction temperature; typical
values.

001aaa209

T

(°C)

j

25

C

d

(pF)

20

15

10

5

0

054231

(1) PESD3V3L5UV.
(2) PESD5V0L5UV.
f = 1 MHz; T

amb

=25°C.

(1)

(2)

001aaa210

VR (V)

Fig.6 Diode capacitance as a function of reverse

voltage; typical values.

10

I

R(Tj)

I

R(Tj=25°C)

1

−1

10

−75 −25 17512525 75

001aaa211

Tj (°C)

Fig.7 Relative variation of reverse leakage

current as a function of junction
temperature; typical values.

2004 Mar 23 6

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

ESD TESTER 4 GHz DIGITAL

R

Z

C

Z

IEC 61000-4-2 network
C

= 150 pF; RZ = 330 Ω

Z

vertical scale = 200 V/div
horizontal scale = 50 ns/div

450 Ω

D.U.T.: PESDxL5UV

RG 223/U
50 Ω coax

GND1

PESD3V3L5UV;

PESD5V0L5UV

OSCILLOSCOPE

10×

ATTENUATOR

note 1

Note 1: Attenuator is only used for open

socket high voltage measurements

vertical scale = 5 V/div
horizontal scale = 50 ns/div

PESD5V0L5UV

50 Ω

GND

unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)

GND

unclamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)

vertical scale = 200 V/div
horizontal scale = 50 ns/div

GND2

clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)

GND

clamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)

PESD3V3L5UV

vertical scale = 5 V/div
horizontal scale = 50 ns/div

001aaa219

Fig.8 ESD clamping test setup and waveforms.

2004 Mar 23 7

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

PESD3V3L5UV;

PESD5V0L5UV

APPLICATION INFORMATION

The PESDxL5UV is designed for the uni-directional protection of up to five lines or bi-directional protection of four lines
from the damage caused by Electrostatic Discharge (ESD) and surge pulses. The PESDxL5UV may be used on lines
where thesignal polarities areabove or belowground. PESDxL5UV canwithstand and providesprotection from asurge
of 25 watts peak pulse power per line for a 8/20 µs waveform.

Typical application

high speed data lines

PESDxL5UV

GND

001aaa217

high speed data lines

PESDxL5UV

GND

001aaa215

Fig.9 Typical application for uni-directional

protection of five lines.

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD,
Electrical Fast Transient (EFT) and surge transients. The
following guidelines are recommended:

1. The protection device should be placed as closely as
possible to the input terminal or connector.

2. Thepath lengthbetween theprotection device andthe
protected line should be as short as possible.

3. Parallel signal paths should be kept to a minimum.

4. Running protection conductors in parallel with
unprotected conductor should be avoided.

5. All printed-circuit board conductive loops (including
power and group loops) should be kept to a minimum.

6. The length of the transient return path to ground
should be kept to a minimum.

7. The useof shared transient return paths to acommon
ground point should be avoided.

8. Ground planes should be used whenever possible.

9. For multilayer printed-circuit boards, ground vias
should be used.

Fig.10 Typical application for bi-directional

protection of four lines.

2004 Mar 23 8

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

PESD3V3L5UV;

PESD5V0L5UV

PACKAGE OUTLINE

Plastic surface mounted package; 6 leads SOT666

D

S

YS

A

E

H

E

X

pin 1 index

123

e

DIMENSIONS (mm are the original dimensions)

UNIT b

mm

A

0.6

0.5

p

0.27

0.17

cD

0.18

0.08

b

1

1.7

1.5

p

e

E

1.3

1.1

456

A

w

M

A

0 1 2 mm

scale

1.0

e1H

e

0.5

1.7

1.5

L

w

p

E

0.3

0.1y0.1

0.1

detail X

c

L

p

OUTLINE
VERSION

SOT666

IEC JEDEC EIAJ

REFERENCES

2004 Mar 23 9

EUROPEAN

PROJECTION

ISSUE DATE

01-01-04
01-08-27

Philips Semiconductors Product specification

Low capacitance 5-fold ESD protection
diode arrays in SOT666 package

DATA SHEET STATUS

LEVEL

I Objective data Development This data sheet contains data from the objective specification for product

II Preliminary data Qualification This data sheet contains data from the preliminary specification.

III Product data Production This data sheet contains data from the product specification. Philips

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

3. For datasheets describingmultiple type numbers, the highest-levelproduct statusdetermines the datasheet status.

DATA SHEET

STATUS

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

(1)

PRODUCT

STATUS

(2)(3)

development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).

DEFINITION

PESD3V3L5UV;

PESD5V0L5UV

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting valuesdefinition Limiting values givenare in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
atthese oratany otherconditions above thosegiven inthe
Characteristics sectionsof the specification isnot implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentation orwarrantythat such applicationswillbe
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomers usingorsellingthese products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes in the products ­including circuits, standard cells, and/or software ­described or contained herein in order to improve design
and/or performance. When theproduct isin fullproduction
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.

2004 Mar 23 10

Philips Semiconductors – a w orldwide compan y

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: [phone]
For sales offices addresses send e-mail to: [e-mail].

© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotationor contract, is believed to be accurate andreliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands R76/01/pp11 Date of release: 2004 Mar 23 Document order number: 9397 750 12254

SCA76