Philips PCF8831 Technical data

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PCF8831

STN RGB - 160 output row driver

Preliminary speciﬁcation 2002 Aug 14

Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

CONTENTS

1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION

7.1 Row driver

7.2 80-bit shift register

7.3 Row control

7.4 Frame control 8 LIMITING VALUES 9 HANDLING 10 DC CHARACTERISTICS 11 AC CHARACTERISTICS

11.1 Power-up and power-down sequences 12 APPLICATION INFORMATION 13 INTERNAL PROTECTION CIRCUITS 14 BONDING PAD LOCATION 15 TRAY INFORMATION 16 DATA SHEET STATUS 17 DEFINITIONS 18 DISCLAIMERS

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

1 FEATURES

• Row driver for LCD dot matrix

• 160 row outputs

• Selectable scan direction

• Support of display off function

• Support of N-line inversion

• Programmable connection to display module

• Logic supply voltage: 2.4 to 3.5 V

• Display supply voltage range: 15 to 40 V

• Low power consumption; suitable for battery operated

systems

• CMOS compatible inputs

• Manufactured in silicon gate CMOS process.

4 ORDERING INFORMATION

TYPE NUMBER

NAME DESCRIPTION VERSION

PCF8831U − chip with bumps in tray −

2 APPLICATIONS

• Mobile phones

• Personal Digital Assistant (PDA)

• Automotive information systems

• Point-of-sale terminals

• Instrumentation.

3 GENERAL DESCRIPTION

The PCF8831 is a row driver for driving colour STN displays. It is designed to operate with the PCF8832 column driver IC.

PACKAGE

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

5 BLOCK DIAGRAM

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ROWRES1

RCLK

R0 to R159

160

SHIFT REGISTER 1

.....

ROW DRIVERS

.....

SHIFT REGISTER 2

PCF8831

ROW CONTROL

SW1SVM

T1ROWRES2 T2 T3 T4 T5SW2 R1F

MGW629

Fig.1 Block diagram.

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

6 PINNING

SYMBOL PAD

(1)

TYPE DESCRIPTION

R159 to R0 2 to 161 O LCD row outputs RCLK 187 I clock input to the shift register; data is transmitted with the positive clock

edge; connect RCLK to the RCLK output of the PCF8832 column driver RP 188 I row pulse input; driven by the RP output of the PCF8832 column driver FI 189 I frame inversion input; controls frame and N-line inversion; FI is synchronized

internally by the rising edge of RCLK; FI can change only when RP changes;

connect FI to the FI output of the PCF8832 column driver SVM 190 I input that switches the non-selected level (V

or VSS, depending on

ROWRES2) to all row outputs; connect SVM to the SVM output of the

PCF8832 column driver ROWRES1 191 I external reset input 1; when LOW, the shift register is reset at the next rising

edge of RCLK and all outputs (R0 to R159) go to their non-selected level;

connect ROWRES1 to the RESROW output of the PCF8832 column driver ROWRES2 192 I external reset input 2; when LOW, the non-selected level goes to VSS; when

HIGH, the non-selected level goes to VM; connect ROWREST to the

RESROW output of the PCF8832 column driver R1F 193 I inputs R1F (row block 1 ﬁrst), SW1 (swap row block 1) and SW2 (swap row SW1 194 I SW2 195 I

block 2) control the shift direction through the register and the order of the

PCF8832 column driver, or connect directly to V

or VSS as required by the

display module configuration T1 to T5 196 to 200 I test inputs; connect to V V

201 to 207 PS logic power supply, negative; normally connected to system ground 208 to 214 PS logic power supply, positive; 2.4 to 3.5 V referred to V 215 to 221 PS MID-level LCD driving voltage; level is between VH and VL; output at rows for

for normal operation

non-selecting periods when ROWRES2 is HIGH; 1.25 to 2.0 V referred to V V V

MH H

222 to 228 PS auxiliary supply voltage for row switch; higher than VM; limited at VL+40V 229 to 235 PS HIGH-levelLCD driving voltage;top level of the positiveselecting pulse of row

outputs V

236 to 242 PS LOW-levelLCD driving voltage; bottom levelof the negative selecting pulse of

row outputs

Note

1. Dummy pads are located at positions 1 (slanted), 162 to 186 and 243 to 272.

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

7 FUNCTIONAL DESCRIPTION

7.1 Row driver

The row driver comprises high voltage outputs, level shifters and logic circuits.

The row driver power supplies are:

• VH for the top level of selecting pulses

• VL for the bottom level of selecting pulses

• VMforthenon-selectinglevelwhenROWRES2 = HIGH;

the non-selecting level goes to VSS when ROWRES2 = LOW (active)

• VMH is an intermediate auxiliary supply

• VDDand VSS for the logic circuits.

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LCD ROW OUTPUTS

.....

R79

7.2 80-bit shift register

Two shift registers of 80 bits each are contained in the PCF8831 row driver. With ROWRES1, the complete shift register will be reset at the next rising edge of RCLK. The two shift registers can be configured for different applications by row control signals R1F, SW1 and SW2.

7.3 Row control

Row control signals SW1, SW2 and R1F control the shift direction through the register and the order of the register (see Fig.2). Some switching combinations require the order of one or both shift registers to be swapped as shown by the example in Fig.3. All row control combinations are shown in Table 1, thesecan be software controlled when connected to the corresponding row control signals of the PCF8832 column driver.

LCD ROW OUTPUTS

R80

.....

R159

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SW1 SW2

R1F

SW2 SHIFT DIRECTION

00 10 01 11

SHIFT REGISTER 1

Fig.2 Shift directions; R1F = 1.

LCD ROW OUTPUTS

R79

SW1 SW2

R1F

.....

SHIFT REGISTER 1

SW1 SW2

R1F

SW1 SW2

R1F

SHIFT REGISTER 2

SHIFT DIRECTIONSW1

LCD ROW OUTPUTS

R159

SHIFT REGISTER 2

.....

MGW630

R80

MGW631

Fig.3 Row swapping; SW1 = SW2 = 1.

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

Table 1 Row control switching

ROW CONTROL SIGNALS

R1F SW1 SW2

1 0 0 R0 to R79 R80 to R159 1 0 1 R0 to R79 R159 to R80 1 1 0 R79 to R0 R80 to R159 1 1 1 R79 to R0 R159 to R80 0 0 0 R80 to R159 R0 to R79 0 0 1 R159 to R80 R0 to R79 0 1 0 R80 to R159 R79 to R0 0 1 1 R159 to R80 R79 to R0

FIRST REGISTER

SELECTED

SECOND REGISTER

SELECTED

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Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

7.4 Frame control

The signal FI controls frame inversion (Fig.4) and N-line inversion (Fig.5). Software control of FI is performed via the PCF8832 column driver.

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Frame n Frame n + 1

R159

Fig.4 Frame inversion.

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MGW632

Philips Semiconductors Preliminary speciﬁcation

STN RGB - 160 output row driver PCF8831

handbook, full pagewidth

Fig.5 N-line inversion; N = 2.

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MGW633

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