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ook, halfpage
PBSS5160T
60 V, 1 A
PNP low V
CEsat
M3D088
(BISS) transistor
Product specification
Supersedes data of 2003 Jun 23
2004 May 27
Philips Semiconductors Product specification
60 V, 1 A
PNP low V
CEsat
FEATURES
• Low collector-emitter saturation voltage V
• High collector current capability: IC and I
• High efficiency, reduces heat generation
• Reduces printed-circuit board area required
• Cost effective replacement for medium power
transistors BCP52 and BCX52.
APPLICATIONS
• Major application segments:
– Automotive
– Telecom infrastructure
– Industrial.
• Power management:
– DC-to-DC conversion
– Supply line switching.
• Peripheral driver:
– Driver in low supply voltage applications (e.g. lamps
and LEDs)
– Inductive load driver (e.g. relays,
buzzers and motors).
DESCRIPTION
PNP low V
transistor in a SOT23 plastic package.
CEsat
NPN complement: PBSS4160T.
(BISS) transistor
CEsat
CM
PBSS5160T
QUICK REFERENCE DATA
SYMBOL PARAMETER MAX. UNIT
V
CEO
I
C
I
CM
R
CEsat
PINNING
1 base
2 emitter
3 collector
handbook, halfpage
collector-emitter voltage −60 V
collector current (DC) −1A
peak collector current −2A
equivalent on-resistance 330 mΩ
PIN DESCRIPTION
Top view
3
1
21
MAM256
3
2
Fig.1 Simplified outline (SOT23) and symbol.
MARKING
TYPE NUMBER MARKING CODE
(1)
PBSS5160T U6*
Note
1. * = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
PBSS5160T − plastic surface mounted package; 3 leads SOT23
2004 May 27 2
Philips Semiconductors Product specification
60 V, 1 A
PBSS5160T
PNP low V
CEsat
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
V
I
I
I
I
P
T
T
T
CBO
CEO
EBO
C
CM
B
BM
tot
stg
j
amb
collector-base voltage open emitter −−80 V
collector-emitter voltage open base −−60 V
emitter-base voltage open collector −−5V
collector current (DC) note 1 −−0.9 A
peak collector current t = 1 ms or limited by T
base current (DC) −−300 mA
peak base current tp≤ 300 µs; δ≤0.02 −−1A
total power dissipation T
storage temperature −65 +150 °C
junction temperature − 150 °C
operating ambient temperature −65 +150 °C
(BISS) transistor
note 2 −−1A
−−2A
amb
j(max)
≤ 25 °C;
note 1 − 270 mW
note 2 − 400 mW
notes 1 and 3 − 1.25 W
Notes
1. Device mounted on an FR4 printed-circuit board, single-sided copper, tin-plated and standard footprint.
2. Device mounted on an FR4 printed-circuit board, single-sided copper, tin-plated and 1 cm2 collector mounting pad.
3. Operated under pulsed conditions: duty cycle δ≤20 %, pulse width tp≤ 10 ms.
120
T
amb
MLE128
(°C)
500
handbook, halfpage
P
tot
(mW)
400
300
200
100
0
0 40 80 160
(1)
(2)
(1) Device mounted with 1 cm2 collector tab.
(2) Device mounted on standard footprint.
Fig.2 Power derating curves.
2004 May 27 3