Philips N74F154N, N74F154D Datasheet
INTEGRATED CIRCUITS
74F154
1-of-16 decoder/demultiplexer
Product specification
IC15 Data Handbook
1990 Jan 08
Philips Semiconductors Product specification
Decoder/demultiplexer
FEA TURES
•16-line demultiplexing capability
•Mutually exclusive outputs
•2-input enable gate for strobing or expansion
DESCRIPTION
The 74F154 decoder accepts four active High binary address inputs
and provides 16 mutually exclusive active Low outputs. The 2-input
Enable (E
the normal decoding “glitches” on the outputs, or it can be used for
expansion of the decoder. The enable gate has two AND’ed inputs
which must be Low to enable the outputs.
The 74F154 can be used as 1-of-16 demultiplexer by using one of
the Enable inputs as the multiplexed data input. When the other
Enable is Low, the addressed output will follow the state of the
applied data.
0, E1) gate can be used to strobe the decoder to eliminate
TYPE
TYPICAL
PROPAGATION
DELA Y
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F154 5.5 ns 26mA
74F154
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
24-pin plastic Slim
DIP (300mil)
24-pin plastic SOL N74F154D SOT137-1
PIN CONFIGURATION
Q0
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
VCC = 5V ±10%,
= 0°C to +70°C
T
amb
N74F154N SOT222-1
1
1
2
3
2
4
3
4
5
5
6
6
7
8
7
9
8
10
9
10
11
12 13
PKG DWG #
V
24
CC
A0
23
A1
22
A2
21
A3
20
0
E
19
1
E
18
17
15
Q
Q
16
14
15
13
Q
12
14
Q
Q
11GND
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
A0 – A3 Data inputs 1.0/1.0 20µA/0.6mA
E0, E1 Enable inputs 1.0/1.0 20µA/0.6mA
Q0 – Q15 Data outputs 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
23
22
21
20
18
19
V
=Pin 24
CC
GND=Pin 12
A0
A1
A2
A3
E1
E0
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Q15
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
SF00680
LOGIC SYMBOL (IEEE/IEC)
23
22
21
20
18
19
SF00681
DX
0
0
G
16
3
1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
SF00682
1990 Jan 08 853–1 155 98493
2
Philips Semiconductors Product specification
74F154Decoder/demultiplexer
LOGIC DIAGRAM
VCC = Pin 24
GND = Pin 12
E0 E1
A0 A1 A2 A3
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q13 Q14 Q15Q12
SF00683
FUNCTION TABLE
INPUTS OUTPUTS OUTPUTS
E0 E1 A0 A1 A2 A3 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 Q15
L H X X X X H H H H H H H H H H H H H H H H
H L X X X X H H H H H H H H H H H H H H H H
H H X X X X H H H H H H H H H H H H H H H H
L L L L L L L H H H H H H H H H H H H H H H
L L H L L L H L H H H H H H H H H H H H H H
L L L H L L H H L H H H H H H H H H H H H H
L L H H L L H H H L H H H H H H H H H H H H
L L L L H L H H H H L H H H H H H H H H H H
L L H L H L H H H H H L H H H H H H H H H H
L L L H H L H H H H H H L H H H H H H H H H
L L H H H L H H H H H H H L H H H H H H H H
L L L L L H H H H H H H H H L H H H H H H H
L L H L L H H H H H H H H H H L H H H H H H
L L L H L H H H H H H H H H H H L H H H H H
L L H H L H H H H H H H H H H H H L H H H H
L L L L H H H H H H H H H H H H H H L H H H
L L H L H H H H H H H H H H H H H H H L H H
L L L H H H H H H H H H H H H H H H H H L H
L L H H H H H H H H H H H H H H H H H H H L
H = High voltage level
L = Low voltage level
X = Don’t care
1990 Jan 08
3
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