Philips msp34x2g Service Manual

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MSP 34x2G Multistandard Sound Processor Family

Edition March 5, 2001 6251-520-2PD

PRELIMINARY DATA SHEET

MICRONAS

with Dolby Surround Pro Logic

MSP 34x2G PRELIMINARY DATA SHEET

Contents

Page Section Title

6 1. Introduction

6 1.1. Features 7 1.2. Features of the MSP 34x2G Family 7 1.3. MSP 34x2G Version List 8 1.4. MSP 34x2G Versions and their Application Fields

9 2. Functional Description

11 2.1. Architecture of the MSP 34x2G Family 11 2.2. Sound IF Processing 11 2.2.1. Analog Sound IF Input 11 2.2.2. Demodulator: Standards and Features 12 2.2.3. Preprocessing of Demodulator Signals 12 2.2.4. Automatic Sound Select 12 2.2.5. Manual Mode 14 2.3. Preprocessing for SCART and I 14 2.4. Source Selection and Output Channel Matrix 14 2.5. Audio Baseband Processing 14 2.5.1. Automatic Volume Correction (AVC) 14 2.5.2. Loudspeaker and Headphone Outputs 14 2.5.3. Subwoofer Output 14 2.5.4. Quasi-Peak Detector 15 2.5.5. Micronas Dynamic Bass (MDB) 15 2.5.5.1. Dynamic Amplification 15 2.5.5.2. Adding Harmonics 15 2.5.5.3. MDB Parameters 16 2.6. Surround Processing 16 2.6.1. Output Configuration 16 2.6.1.1. HP/CS Switch 16 2.6.1.2. Channel Configuration 16 2.6.2. Surround Processing Mode 16 2.6.2.1. Decoder Matrix 17 2.6.2.2. Surround Reproduction 17 2.6.2.3. Center Modes 17 2.6.2.4. Useful Combinations of Surround Processing Modes 18 2.6.3. Examples 19 2.6.4. Application Tips for using 3D-PANORAMA 19 2.6.4.1. Sweet Spot 19 2.6.4.2. Clipping 19 2.6.4.3. Loudspeaker Requirem ents 19 2.6.4.4. Cabinet Requirements 19 2.6.5. Input and Output Levels in Dolby Surround Pro Logic Mode 20 2.6.6. Subwoofer in Surround Mode 20 2.6.7. Equalizer in Surround Mode 20 2.7. SCART Signal Routing 20 2.7.1. SCART DSP In and SCART Out Select 20 2.7.2. Stand-by Mode 20 2.8. I

S Bus Interface

S Input Signals

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PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

21 2.9. ADR Bus Interface 21 2.10. Digital Control I/O Pins and Status Change Indication 21 2.11. Clock PLL Oscillator and Crystal Specifications

22 3. Control Interface

22 3.1. Device and Subaddresses 22 3.1.1. Internal Hardware Error Handling 23 3.1.2. Description of CONTROL Register 23 3.1.3. Protocol Description 24 3.1.4. Proposals for General MSP 34x2G I

C Telegrams 24 3.1.4.1. Symbols 24 3.1.4.2. Write Telegrams 24 3.1.4.3. Read Telegrams 24 3.1.4.4. Examples

24 3.2. Start-Up Sequence: Power-Up and I

C Controlling 24 3.3. MSP 34x2G Programming Interface 24 3.3.1. User Registers Overview 28 3.3.2. Description of User Registers 29 3.3.2.1. STANDARD SELECT Register 29 3.3.2.2. Refresh of STANDARD SELECT Register 29 3.3.2.3. STANDARD RESULT Register

31 3.3.2.4. Write Registers on I 33 3.3.2.5. Read Registers on I2C Subaddress 11 34 3.3.2.6. Write Registers on I2C Subaddress 12 51 3.3.2.7. Read Registers on I2C Subaddress 13

C Subaddress 10

hex hex hex hex

52 3.4. Programming Tips 52 3.5. Examples of Minimum Initialization Codes 52 3.5.1. SCART1 Input to Loudspeaker in Stereo Sound 52 3.5.2. B/G-FM (A2 or NICAM) 52 3.5.3. BTSC-Stereo 53 3.5.4. BTSC-SAP with SAP at Loudspeaker Channel 53 3.5.5. FM-Stereo Radio 53 3.5.6. Automatic Standard Detection 53 3.5.7. Dolby Surround Pro Logic Example 53 3.5.8. Virtual Dolby Surround Example 53 3.5.9. Noise Sequencer for Dolby Pro Logic 53 3.5.10. Software Flow for Interrupt driven STATUS Check

MSP 34x2G

55 4. Specifications

55 4.1. Outline Dimensions 56 4.2. Pin Connections and Short Descriptions 59 4.3. P in Des cripti ons 62 4.4. Pin Configurations 65 4.5. Pin Circuits 67 4.6. Electrical Characteristics 67 4.6.1. Absolute Maximum Ratings 68 4.6.2. Recommended Operating Conditions

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MSP 34x2G PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

68 4.6.2.1. General Recommended Operating Conditions 68 4.6.2.2. Analog Input and Output Recommendations 69 4.6.2.3. Recommendations for Analog Sound IF Input Signal 70 4.6.2.4. Crystal Recommendations 71 4.6.3. Characteristics 71 4.6.3.1. General Characteristics 72 4.6.3.2. Digital Inputs, Digital Outputs 73 4.6.3.3. Reset Input and Power-Up 74 4.6.3.4. I 75 4.6.3.5. I 77 4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC 79 4.6.3.7. Sound IF Inputs 79 4.6.3.8. Power Supply Rejection 80 4.6.3.9. Analog Performance 83 4.6.3.10. Sound Standard Dependent Characteristics

C-Bus Characteristic s

S-Bus Characteristics

87 5. Appendix A: Overview of TV-Sound Standards

87 5.1. NICAM 728 88 5.2. A2-Systems 89 5.3. BTSC-Sound System 89 5.4. Japanese FM Stereo System (EIA-J) 90 5.5. FM Satellite Sound 90 5.6. FM-Stereo Radio

91 6. Appendix B: Manual/Compatibility Mode

92 6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode 93 6.2. DSP Write and Read Registers for Manual/Compatibility Mode 93 6.3. Manual/Compatibility Mode: Description of Demodulator Write Registers 93 6.3.1. Automatic Switching between NICAM and Analog Sound 93 6.3.1.1. Function in Automatic Sound Select Mode 94 6.3.1.2. Function in Manual Mode 95 6.3.2. A2 Threshold 95 6.3.3. Carrier-Mute Threshold 96 6.3.4. Register AD_CV 97 6.3.5. Register MODE_REG 99 6.3.6. FIR-Parameter, Registers FIR1 and FIR2 99 6.3.7. DCO-Registers 101 6.4. Manual/Compatibility Mode: Description of Demodulator Read Registers 101 6.4.1. NICAM Mode Control/Additional Data Bits Register 101 6.4.2. Additional Data Bits Register 101 6.4.3. CIB Bits Register 102 6.4.4. NICAM Error Rate Register 102 6.4.5. PLL_CAPS Readback Register 102 6.4.6 . AGC_G AIN Read bac k Regis ter 102 6.4.7. Automatic Search Function for FM-Carrier Detection in Satellite Mode 103 6.5. Manual/Compatibility Mode: Description of DSP Write Registers 103 6.5.1. Additional Channel Matrix Modes

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PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

103 6.5.2. Volume Modes of SCART1/2 Outputs 103 6.5. 3. FM Fixed Deemp hasi s 103 6.5.4. FM Adaptive Deemphasis 104 6.5.5. NICAM Deemphasis 104 6.5.6. Identification Mode for A2 Stereo Systems 104 6.5. 7. FM DC Notch 104 6.6. Manual/Compatibility Mode: Description of DSP Read Registers 104 6.6.1. Stereo Detection Register for A2 Stereo Systems 104 6.6. 2. DC Level Register 105 6.7. Demodulator Source Channels in Manual Mode 105 6.7.1. Terrestric Sound Standards 105 6.7.2. SAT Sound Standards 105 6.8. Exclusions of Audio Baseband Features 105 6.9. Compatibility Restrictions to MSP 34x0D

MSP 34x2G

107 7. Appendix D: Application Information

107 7.1. Phase Relationship of Analog Outputs 108 7.2. Application Circuit

110 8. Appendix E: MSP 34x2G Version History

110 9. Data Sheet History

License Notice:

“Dolby”, “Virtual Dolby Surround”, and the double-D Symbol are trademarks of Dolby Laboratories.

Supply of this impl ementat ion of Do lby Technology does not convey a license nor i mply a r i ght unde r any paten t, or any other industrial or intellectual property r ight of Dolby Laboratories, to use this implementation in any finished end-user or read y-to-use final produc t. Companies plannin g to use this implem entation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products.

Micronas 5

MSP 34x2G PRELIMINARY DATA SHEET

Multistandard Sound Processor Family with Dolby Surround Pro Logic

Release Note: Revision bars indicate significant changes to the previous edition. The hardware and software description in this document is valid for the MSP 34x2G version A2 and following versions.

1. Introduction

The MSP 34x2G family of single-chip Multistandard Sound Processors covers the sou nd processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The ful l TV sou nd proc es s ing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip.

The family’s latest member, the MSP 34x2G has all functions of the MSP 34x0G with the addition of Dolby Surround Pro Lo gic a nd Vi rtual Dolby Sur round s ound processing (See License Notice on page 5). The MSP 34x2G forms a superset of the functions of the MSP 34x1G, which contains the vir tualizer algorithms but does not contain any multi-channel processing.

Additional output pins DACM_C and DACM_S have been defined which deliver the Dolby Surround Pro Logic processed Center and Surround channels. When DACM_C and DACM_S are active, the headphone outputs DACA_L and DACA_R are muted and vice versa. Simultaneous processing of Headphone signals and Dolby Surround Pro Logic is not possible.

Surround sound can be repr oduc ed to a certain extent with only two loud speakers. The MSP 34x2G includes a Micronas virtualizer algorithm which has been approved by the Dolby

Laboratories for compliance with the "Virtual Dolby Surround" technology. This algorithm is called “3D-PANORAMA” and enables con- vincing acoustic al sensations. Virtual Do lby Surround can be processed together with headphone signals.

The ICs are produced in submicron CMOS technology. The MSP 34x2G is available in the following packages: PQFP80, PLQFP64, and PSDIP64.

1.1. Features

– All MSP 34x0G features – All MSP 34x1G features as there are

- the 3D-PANORAMA virtualizer algorithm

- the PANORAMA virtualizer algorithm

- Noise Generator

– Dolby Surround Pro Logic processing – Various other multich anne l sou nd mode s – Additional pins for Center and Surround channels – Virtualizer able to work with 2 or 3 front loudspeak-

ers

– Pin and software compatible to MSP 34x0G

Sound IF1

Sound IF2

I2S1 I2S2

SCART1 SCART2 SCART3 SCART4

MONO

ADC

SCART

DSP

Input

Select

De-

modulator

ADC

Fig. 1–1: Block diagram of the MSP 34x2G

Pre-

processing

Prescale

Loud-

speaker

Sound

Processing

Headphone/

Surround

Sound

Processing

Source Select

DAC

SCART Output Select

Loudspeaker

Subwoofer

Center Surround

Headphone I2S

SCART1

SCART2

6 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

1.2. Features of the MSP 34x2G Family

Feature 3402 3412 3422 3442 3452

Dolby Surround Pro Logic and MSS (Micronas Surround Sound) X X X X X 3D-PANORAMA virtualizer (approved by Dolby Laboratories) with noise generator X X X X X PANORAMA virtualizer algorithm X X X X X Standard Selection with single I Automatic Standard Detection of terrestrial TV standards/Automatic Carrier Mute function X X X X X Automatic Sound Selection (mono/stereo/bilingual) X X X X X Two selectable sound IF (SIF) inputs X X X X X Interrupt output programmable (indicating status change) X X X X X Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness X X X X X AVC: Automatic Volume Correction X X X X X Subwoofer output with programmable low-pass and complementary high-pass filter X X X X X MDB (Micronas Dynamic Bass) and 5-band graphic equalizer for loudspeaker channel X X X X X

C transmission X X X X X

Spatial effect for loudspeaker channel X X X X X Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs X X X X X Complete SCART in/out switching matrix X X X X X

Two I

S inputs; one I2S output XXXXX All analog Mono sound carriers including AM-SECAM L X X X X X All analog FM-Stereo A2 and satellite standards X X x x X Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM X X Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) X X X ASTRA Digital Radio (ADR) together with DRP 3510A X X X All NICAM standards XX Demodulation of the BTSC multiplex signal and the SAP channel X X X Alignment free digital DBX noise reduction for BTSC Stereo and SAP X X Alignment free digital Micronas Noise Reduction (MNR) for BTSC Stereo and SAP X BTSC stereo separation (MSP 3422/42G also EIA-J) significantly better than spec. X X X SAP and stereo detection for BTSC system XXX Korean FM-Stereo A2 standard X X X X X Alignment-free Japanese standard EIA-J XXX Demodulation of the FM-Radio multiplex signal X X X

1.3. MSP 34x2G Version List

Version Status Description

MSP 3402G not confirmed FM Stereo (A2) Version MSP 3412G available NICAM and FM Stereo (A2) Version MSP 3422G not confirmed NTSC Version (A2 Korea, BTSC with Micronas Noise Reduction (MNR), and Japanese EIA-J system) MSP 3442G not confirmed NTSC Version (A2 Korea, BTSC with DBX noise reduction, and Japanese EIA-J system) MSP 3452G available Global Version (all sound standards)

Micronas 7

MSP 34x2G PRELIMINARY DATA SHEET

1.4. MSP 34x2G Versions and their Application Fields

Table 1–1 provides an overview of TV sound standards that can be processed by the MSP 34x2G family. In addition, the MSP 34x2G is able to handle the FMRadio standard. With the MSP 34x2G, a complete

multimedia receiver covering all TV sound standards together with terr estr ial/cable an d satellit e radio soun d can be built; even ASTRA Digital Radio can be processed (with a DRP 3510A coprocessor).

Table 1–1: TV Stereo Sound Standards covered by the MSP 34x2G IC Family (details see Appendix A)

MSP Version TV-

3402

3412

System

B/G

L 6.5/5.85 AM-Mono/NICAM SECAM-L France I 6.0/6.552 FM-Mono/NICAM PAL UK, Hong Kong

D/K

3452

Satellite

Position of Sound Carrier /MHz

5.5/5.7421875 FM-Stereo (A2) PAL Germany

5.5/5.85 FM-Mono/NICAM PAL Scandinavia, Spain

6.5/6.2578125 FM-Stereo (A2, D/K1) SECAM-East Slovak. Rep.

6.5/6.7421875 FM-Stereo (A2, D/K2) PAL currently no broadcast

6.5/5.7421875 FM-Stereo (A2, D/K3) SECAM-East Poland

6.5/5.85 FM-Mono/NICAM (D/K, NICAM) PAL China, Hungary

6.5

7.02/7.2

7.38/7.56 etc.

Sound Modulation

FM-Mono FM-Stereo

ASTRA Digital Radio (ADR) with DRP 3510A

Color System

PAL Europe Sat.

Broadcast e.g. in:

ASTRA

3422, 3442

Tuner

4.5/4.724212 FM-Stereo (A2) NTSC Korea

M/N

FM-Radio 10.7 FM-Stereo Radio USA, Europe

SAW Filter

Composite Video

4.5 FM-FM (EIA-J) NTSC Japan

4.5 BTSC-Stereo

33 34 39 MHz 4.5 9 MHz

Sound IF Mixer

Mono

Vision Demodulator

SCART Inputs

SCART1 SCART2 SCART3

SCART4

+ SAP NTSC, PAL USA, Argentina

MSP 34x2G

I2S2ADR

SCART1 SCART2

Loudspeaker

Subwoofer

Center

Surround

Headphone

SCART Outputs

ADR Decoder DRP 3510A

Fig. 1–2: Typical MSP 34x2G application

8 Micronas

Micronas 9

FM/AM

Prescale

(0E

NICAM

Prescale

(10

I2C

Read

I2S

Sound Select

Stereo or A/B

)

hex

)

hex

Automatic

FM/AM

Stereo or A

Stereo or B

I2S1

Prescale

(16

I2S2

Prescale

(12

(16

SCART

Prescale

(0D

Configurable Output Section

Loudspeaker Channel

Matrix

(08

)

Source Select

)(16

)

hex

)

hex

)

hex

Headphone

Channel

Matrix

(09

I2S

Channel

Matrix

(0B

Quasi-Peak

Channel

Matrix

(0C

SCART1

Channel

Matrix

(0A

hex

SCART2 Channel

Matrix

(41

hex

)

hex

)

hex

)

hex

)

AVC

(29

)

hex

I2S

Interface

Quasi-Peak

Detector

Volume

(07

hex

Volume

(40

hex

Bass/

Treble

Equalize

(02 (03

Bass/

Treble

(31/32

)

hex hex

hex

) )

Beeper

)

I2C

Read

(14

hex

Loudness

(04

)

Loudness

(33

(19

hex

(1A

hex

)

hex

)

hex

) )

SCART1_L/R

SCART2_L/R

0.5

Complementary

Highpass

(2D

Lowpass

(2D

Balance

)

(01

hex

Level

Adjust

)

(2C

hex

Balance

(30

I2S_DA_OUT

SC1_OUT_L

SC1_OUT_R

Volume

)

hex

Acoustical Compens.

(26/27/28

)

hex

MDB

)

(68...6C

(00

)

hex

Volume

)

(06

hex

)

hex

)

hex

Acoustical Compens.

(34/35/36

)

hex

DACM_L

DACM_R

DACM_SUB

DACA_C DACA_S

DACA_L

DACA_R

Standard Selection

AGC

ANA_IN1+

ANA_IN2+

ADR-Bus

Interface

DEMODULATOR

(incl. Carrier Mute)

Decoded Standards:

−

NICAM

−

BTSC

−

EIA-J

−

SAT

−

FM-Radio

I2S_DA_IN1

I2S_DA_IN2

Deemphasis: 50/75

s, J17 DBX/MNR, Panda1

Deemphasis: J17

Standard

and Sound

Detection

Interface

SCART DSP Input Select

)

(13

SC1_IN_L

hex

2. Functional Description

PRELIMINARY DATA SHEET MSP 34x2G

SC1_IN_R SC2_IN_L SC2_IN_R SC3_IN_L SC3_IN_R

SCART Output Select

SC2_OUT_L

SC2_OUT_R SC4_IN_L SC4_IN_R MONO_IN

(13

)

hex

Fig. 2–1: Signal flow block diagram of the MSP 34x2G

MSP 34x2G PRELIMINARY DATA SHEET

Configurable Output Section

Loudspeaker Channel

Matrix

(08

hex

Headphone

Channel

Matrix

(09

hex

)

Virtualizer

Noise

Generator

AVC

(29

Bass/

Treble

Equal.

(02

)

hex

(03

hex

Loudness

) )

(04

)

hex

Beeper

)

(14

hex

0.5

Complementary

Highpass

Lowpass

(2D

Balance

)

hex

)

hex

(01

Level

Adjust

(2C

Volume

)(2D

hex

(00

)

hex

)

hex

Volume

Bass/

Treble

(31/32

hex

Loudness

)

(33

)

hex

Balance

(30

)

(06

hex

)

hex

Fig. 2–2: Output section in virtual mode: Output Configuration (register 48

Configurable Output Section

Loud-

speaker

Channel

Matrix

(08

Noise

Generator

hex

)

Dolby

Pro Logic

and

optional

Virtualizer

AVC

(29

Bass/

Treble

Equal.

(02 (03

)

hex

)

hex

Loudness

(04

)

hex

Beeper

)

(14

hex

Equal.

Bass/

Treble

)

hex

)(33

hex

Loudness

)

hex

0.5

Complementary

Highpass

Lowpass

(2D

Comple-

mentary

Highpass

Balance

)

hex

)

hex

(01

Level

Adjust

(2C

Volume

)(2D

hex

(00

)

hex

)

hex

Volume

Balance

)(31/32

(06

(30

hex

)

hex

MDB

(68...6C

hex

MDB

(68...6C

)

hex

) = 0100

)

hex

Acoustical Compens.

(26/27/28

Acoustical Compens.

(34/35/36

Acoustical Compens.

(26/27/28

Acoustical Compens.

(34/35/36

DACM_L

DACM_R

)

hex

DACM_SUB

DACA_C DACA_S

DACA_L

)

hex

DACA_R

DACM_L

DACM_R

)

hex

DACM_SUB

DACA_L DACA_R

DACA_C

)

hex

DACA_S

Fig. 2–3: Output section with multi-channel surround: Output Configuration (register 48

) = 8200

hex

10 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

2.1. Architecture of the MSP 34x2G Family

The block diagrams in Fig. 2–1, Fig. 2–2, and Fig. 2–3 show the signal flow in the MSP 34x2G in three modes that can be set in the Output Configuration register.

– Standard mode (see Fig. 2–1).

The IC is compatible to the MSP 34x0G family.

– Virtual mode (see Fig. 2–2).

The IC is compatible to the Virtual Dolby MSP 34x1G family.

– Multi-channel mode (see Fig. 2–3). The three block diagrams show the features of the

MSP 3452G family member. Other members of the MSP 34x2G family do not have

the complete set of features: The demodulator handles only a subset of the standards presented in the demodulator block; NICAM processin g is onl y p os sible in the MSP 3412G and MSP 3452G.

2.2. Sound IF Processing

2.2.1. Analog Sound IF Input

The input pins ANA_IN1+, ANA_IN2+, and ANA_IN offer the possibility to connect two different sound IF (SIF) sources to the MSP 34x2G. The analog-to-digital conversion of the preselected sound IF sign al is done by an A/D-converter. An analog automatic gain ci rcuit (AGC) allows a wide range of input levels. The highpass filters formed by the coupling capacitors at pins ANA_IN1+ and ANA_I N2+ see Section 7.2. “Applica- tion Circuit” on page 108 are sufficient in most cases to suppress video components. Some combinations of SAW filters and sound IF mixer ICs, however, show large picture components on their outputs. In this case, further filtering is recommended.

2.2.2. Demodulator: Standards and Features

BTSC-Stereo: Detection and FM demo dulation of the

aural carrier resul ting in the MTS/MPX signal. De tection and evaluation of the pilot carrier, AM demodula tion of the (L carrier. Processing of DBX noise reduction or Micronas Noise Reduction (MNR).

BTSC-Mono + SAP: Detection and FM demodulation of the aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot car rier, detection and FM demodulation of the SAP s ubcarrie r. Processing of DBX n oise reducti on or Micr onas Noise Reduction (MNR).

Japan Stereo: Detection and FM demodulation of the aural carrier resulting in the MPX signal. Demodulation and evaluation of the identification signal and FM demodulation of the (L

FM-Satellite Sound: Demodulation of one or two FM carriers. Processi ng of high-deviation mono or na rrow bandwidth mono, stereo, or bilingual satellite sound according to the ASTRA specification.

FM-Stereo-Radio: Detection and FM d emodulati on of the aural carrier resu lting in the MPX si gnal. Detecti on and evaluation of the pilot carrier and AM demodula-

−

tion of the (L The demodulator blocks of all MSP 34x2G versions

have identical user interfaces. Even completely different systems like the BTSC and NICAM systems are controlled the same way. Standards are selected by means of MSP Standard Cod es. Automatic processes handle standard detection and identification without controller interaction. The key features of the MSP 34x2G demodulator blocks are:

Standard Selection: The controlling of the demodulator is minimized: All parameters, such as tuning frequencies or filter bandwidth, are adjusted automatically by transmitting one single value to the STANDARD SELECT reg ister. For all standards, specific MSP standard codes are defined.

−R)-carrier and dete ction o f the SAP sub -

−R)-carrier.

The MSP 34x2G is able to demodulate all TV-sound standards worldwid e including the digital NICAM system. Depending on the MSP 34x2G version, the following demodulation modes can be performed:

A2 Systems: Detection and demodulation of two separate FM carriers ( FM1 and FM2), demodulation and evaluation of the identification signal of carrier FM2.

NICAM Systems: Demodulati on and decoding of t he NICAM carrier, detection and demodulation of the analog (FM or AM) carrier. For D/K-NICAM, the FM carrier may have a maximum deviation of 384 kHz.

Very high deviation FM-Mono: Detection and robust demodulation of on e FM carr ier with a maximum deviation of 540 kHz.

Micronas 11

Automatic Standar d Detecti on: If the TV sound standard is unknown, the MSP 34x2G can automatically detect the actual standard, switch to that standard, and respond the actual MSP standard code.

Automatic Carrier Mute: To prevent noise effects or FM identification problems in the absence of an FM carrier, the MSP 34x2G offers a configurable carrier mute feature, which is activated automatically if th e T V sound standard is selected by means of the STANDARD SELECT register. If no FM carrier is detected at one of the two MSP demodulator channels, the corresponding demodulator output is muted. This is indicated in the STATUS register.

MSP 34x2G PRELIMINARY DATA SHEET

2.2.3. Preprocessing of Demodulator Signals

The NICAM signals must be processed by a deemphasis filter and adjusted in level. The analog demodulated signals must b e processed by a deemphas is filter, adjusted in level, and dematrixed. The correct deemphasis filters are already selected by setting th e standard in the STANDARD SELECT register. The level adjustment has to be done by means of the FM/ AM and NICAM prescale registers. The necessary dematrix function depends on the selected sound standard and the actual broadcasted sound mode (mono, stereo, or bilingual). It can be manually set by the FM Matrix Mode register or automatically set by the Automatic Sound Selection.

2.2.4. Automatic Sound Select

In the Automatic Sound Select mode, the dematrix function i s aut om a t ica l ly s el ec t ed ba se d on th e id ent if i cation information in the ST ATUS register. No I

C interaction is necessary when the broadcasted sound mode changes (e.g. from mono to stereo).

The demodulator sup ports the identification ch eck by switching between mono comp atible standards (standards that have the same FM mono c arrier) aut omatically and non-audible. If B/G-FM or B/G-NICAM is selected, the MSP will switch between these standards. The same action is performed for the standards: D/K1-FM, D/K2-FM, D/K3-FM and D/K-NICAM. Switching is only d one in th e abse nce of a ny ste reo or bilingual identification. If identification is found, the MSP keeps the detected standard.

In case of high bit-error rates, the MSP 34x2G automatically falls back from digital NI CAM sound to analog FM or AM mono.

– “Stereo or A” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broadcast, it contains language A (on left and right).

– “Stereo or B” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broadcast, it contains language B (on left and right).

Fig. 2–4 and Table 2–2 show the source channel assignment of the demodulated signals in case of Automatic Sound Select mode for all sound standards.

Note: The analog primar y input channel contains the signal of the mono FM/AM c arrie r or the L+R sig nal of the MPX carrier. The secondary input channel contains the signal of the seco nd FM carr ier, the L

−R sig-

nal of the MPX carrier, or the SAP signal.

Source Select

LS Ch. Matrix

Output-Ch. Matrices must be set once to stereo

SC2 Ch. Matrix

primary channel

secondary channel

NICAM A

NICAM

FM/AM

Prescale

NICAM

Prescale

Automatic

Sound Select

FM/AM

Stereo or A/B

Stereo or A

Stereo or B

Fig. 2–4: Source channel assignment of demodulated signals in Automatic Sound Select Mode

2.2.5. Manual Mode

Fig. 2–5 shows the source channel assignment of demodulated signals in ca se of manual mode. If manual mode is required, more information can be found in Section 6.7. “Demodulator Source Channels in Manual Mode” on page 105.

Table 2–1 summarizes all actions that take place when Automatic Sound Select is switched on.

To provide more fl exibility, the Automatic Sound Select block prepares four different source channels of demodulated sound (see Fig. 2–4). By choosing one of the four demodulator channels, the preferred sound mode can be selected for each of the output channels (loudspeaker, headphone, etc.). This is done by means of the Source Select registers.

The following source chan nels of demodulated sound are defined:

primary channel

secondary channel

NICAM A

NICAM

FM/AM

Prescale

NICAM

Prescale

FM-Matrix

FM/AM

NICAM

(Stereo or A/B)

Fig. 2–5: Source channel assignment of demodulated signals in Manual Mode

Source Select

LS Ch. Matrix

Output-Ch. Matrices must be set according the standard

SC2 Ch. Matrix

– “FM/AM” channel: Analog mono sound, stereo if

available. In case of NICAM, analog mono only (FM or AM mono).

– “Stereo or A/B” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broadcast, it contains both languages A (left) and B (right).

12 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 2–1: Performed actions of the Automatic Sound Selection

Selected TV Sound Standard Performed Actions

B/G-FM, D/K-FM, M-Korea, and M-Japan

B/G-NICAM, L-NICAM, I-NICAM, and D/K-NICAM

Evaluation of the identification signal and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 2–2.

Evaluation of NICAM-C-bits and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 2–2.

In case of bad or no NICAM reception, the MSP switches automatically to FM/AM mono and switches back to NICAM if possible. A hys teresis prevents periodical switching.

B/G-FM, B/G-NICAM or D/K1-FM, D/K2-FM, D/K3-FM,

and D/K-NICAM

Automatic searching for stereo/bilingual-identification in case of mono transmission. Automatic and nonaudible changes between Dual-FM and FM-NICAM standards while listening to the basic FM-Mono sound carrier. Example: If starting with B/G-FM-Stereo, there will be a periodical alternation to B/G-NICAM in the absence of FM-Stereo/Bilingual or NICAM-identification. Once an identification is detected, the MSP keeps the corresponding standard.

BTSC-STEREO, FM Radio Evaluation of the pilot signal and automatic switching to mono or stereo. Preparing four demodulator

source channels according to Table 2–2. Detection of the SAP carrier.

BTSC-SAP In the absence of SAP, the MSP switches to BTSC-Stereo if available. If SAP is detected, the MSP

switches automatically to SAP (see Table 2–2).

Table 2–2: Sound modes for the demodulator source channels with Automatic Sound Select

Source Channels in Automatic Sound Select Mode

Broadcasted Sound Standard

Selected MSP Standard

Code

Broadcasted Sound Mode

FM/AM

(source select: 0)

Stereo or A/B

(source select: 1)

Stereo or A

(source select: 3)

Stereo or B

(source select: 4)

M-Korea B/G-FM D/K-FM M-Japan

B/G-NICAM L-NICAM I-NICAM D/K-NICAM D/K-NICAM

(with high deviation FM)

03, 08 04, 05, 07, 0B 30

08, 03 09 0A

, 05

0B, 04 0C, OD

MONO Mono Mono Mono Mono

STEREO Stereo Stereo Stereo Stereo BILINGUAL:

Languages A and B NICAM not available or

Left = A Right = B

analog Mono analog Mono analog Mo no analog Mono

error rate too high MONO analog Mono NICAM Mono NICAM Mono NICAM Mono STEREO analog Mono NICAM Stereo NICAM Stereo NICAM Stereo BILINGUAL:

Languages A and B

analog Mono Left = NICAM A

Right = NICAM B

NICAM A NICAM B

BTSC 20, 21 MONO Mono Mono Mono Mono

STEREO Stereo Stereo Stereo Stereo

20 MONO+SAP Mono Mono Mono Mono

STEREO+SAP Stereo Stereo Stereo Stereo

21 MONO+SAP Left = Mono

Right = SAP

STEREO+SAP Left = Mono

Right = SAP

Left = Mono Right = SAP

Mono SAP

FM Radio 40 MONO Mono Mono Mono Mono

STEREO Stereo Stereo Stereo Stereo

The Automatic Sound Select process will automatically switch to the mono compatible analog standard.

The Automatic Sound Select process will automatically switch to the mono compatible digital standard.

The MSP Standard Codes are defined in Table 3–7 on page 28.

Micronas 13

MSP 34x2G PRELIMINARY DATA SHEET

2.3. Preprocessing for SCART and

S Input Signals

The SCART and I level by means of the SCART and I

S inputs need only be a djusted in

S prescale re gis-

ters.

2.4. Source Selection and Output Channel Matrix

The Source Selec tor makes it possible to di stribute all source signals (o ne of the demodulator source ch annels, SCART, or I

S input) to the desir ed output ch annels (loudspeaker, headphone, etc.). Al l inpu t and o utput signals can be processed simultaneously. Each source channel is identified by a unique source address.

For each output channel, the soun d mode can be set to sound A, sound B, stereo, or mono by means of the output channel matrix.

If Automatic Sound Select is on, the output channel matrix can stay fixed to stereo (transparent) for demodulated signals.

output level [dBr]

−18

−24

input level

−30 −24 −18 −12 −6

[dBr]

Fig. 2–6: Simplified AVC characteristics

2.5.2. Loudspeaker and Headphone Outputs

The following baseband features are implemented in the loudspeaker and headphone output channels: bass/treble, loudness, balan ce, and volume. A square wave beeper can be added to the loudspeaker and headphone channel. The loudspeaker channel additionally performs: equalizer (not simultaneously with bass/treble), spatial effects, and a subwoofer crossover filter.

2.5. Audio Baseband Processing

2.5.1. Automatic Volume Correction (AVC)

Different sound sources (e.g. terrestr ial chann els, SAT channels, or SCART) fairly often do not have the same volume level. Advertisements during movies usually have a higher volume level than the movie itself. This results in annoying volume ch anges. The AVC solves this problem by equalizing the volume level.

To prevent clipping, the AVC’s gain decreases quickly in dynamic boost conditions. To suppress oscillation effects, the gain increases rather slowly for low-level inputs. The decay time is programmable by means of the AVC register (see page page 38).

For input signals ranging from AVC maintains a fixed output level of

−24 dBr to 0 dBr, the

−18 dBr. Fig. 2–6

shows the AVC output level versus its input level. For prescale and volume r egisters set to 0 dB, a level o f 0 dBr corresponds to full scale input/output. This is

– SCART input/output 0 dBr = 2.0 V – Loudspeaker and Aux output 0 dBr = 1.4 V

rms

2.5.3. Subwoofer Output

The subwoofer signal is cre ated by combining the le ft and right ch annels directly behind the loudness block using the formula (L+R)/2. Due to the division by 2, the D/A converter will not be overloaded, even with full scale input signals. The sub woofer signal is filtered by a third-order low-pass with programmable corner frequency followed by a level adjustment. At the loudspeaker channels, a complementary high-pass filter can be switched on. Subwoofer and loudspeaker output use the same volume (Loudspeaker Volume Register).

2.5.4. Quasi-Peak Detector

The quasi-peak r eadout register can be used to read out the quasi-peak level of any input source. The feature is based on following filter time constants:

attack time: 1.3 ms decay time: 37 ms

14 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

2.5.5. Micronas Dynamic Bass (MDB)

The Micronas Dynamic Bass system (MDB) extends the frequency range of loudspeakers or headphones.

After the adaption of MDB to the loudspeakers and the cabinet, fur ther customizing of MDB a llows individual fine tuning of the sound.

The MDB is placed in the subwoofer path. For applications without a subwoofer, the enhanced bass signal can be added back onto the Left/Right chan nels (see Fig. 2–1 on page 9). Micronas Dynamic Bass combines two effects: dynamic amplification and adding harmonics.

2.5.5.1. Dynamic Amplification

Low frequency signals can be boosted while the output signal amplitude is measu red. If the amplitude comes close to a definable limit, the gain is reduced automatically in dynamic Volume mode. Therefore, the system adapts to the signal amplitu de which is really present at the output of the MSP device. Clipping effects are avoided.

2.5.5.2. Adding Harmonics

MDB exploits the psychoa coustic phenomenon of the ‘missing fundamental’. Adding harmonics of the frequency componen ts below the cutoff frequency gives the impression of actually hearing the low frequency fundamental. In other words: The listener has the impression that a lo uds pe aker system seems to reproduce frequencies although physically not possible.

Amplitude (db)

MDB_HP

Frequency

Fig. 2–8: Adding harmonics

2.5.5.3. MDB Parameters

(db)

Amplitude

MDB_LIMIT

MDB_HP MDB_LP

SUBW_FREQ

Fig. 2–7: Dynamic amplification

Several parameters allow tuning the characteri stics of MDB according to the TV loudspeaker, the cabinet, and personal preferences (see Table 3–11 on page 34). For more detailed information on how to set up MDB, please refer to the corr esponding applicati on note on the Micronas homepage.

Signal Level

Frequency

Micronas 15

MSP 34x2G PRELIMINARY DATA SHEET

2.6. Surround Processing

2.6.1. Output Configuration

Like the MSP 34x1G ICs, the MSP 34x2G can be used for virtual surround sound on the left and right loudspeaker outputs. For multichannel outpu ts (more than 2 channels), extra output pins have been defined (DACM_C and D ACM_S pins). For processing of these output channels, internal resources are shared with the headphone processing. As a result, headphone output is not pos sible together with multi- channel surround processing. When headphone output pins are active, the surround outputs are muted and vice versa. There are two options: the HP/CS switch and the channel configuration . T he o utpu t configuration is controlled by means of registe r 48 12

hex

on I2C subaddress

hex

2.6.1.1. HP/CS Switch

This switch defines which output p in pair is driven by the D/A converters that are used for headphone or surround processing. The unselected pins are muted. This makes it convenient to connect the center/surround amplifiers or outputs to the MSP 34x2 without external switches.

Mute the Headphone/Surround channel by setting register 06

to 0000

hex

before switching. Allow at least

hex

2 s for settling to avoid audible plops.

2.6.1.2. Channel Configuration

The channel configuration defines whether surround processing is switched on and what resources of the IC are to be used for surround sound processing. There are 3 options:

– STEREO:

The IC is in the normal stereo processing mode. No surround processing takes place. In this mode, the IC is compatible to the MSP 34x0G.

– TWO_CHANNEL:

Surround sound processing is switched on, but only left and right loudspeaker channels are used for output. This mode is used for virtual surround sound.

– MULTI_CHANNEL:

Surround sound processing is switched on, left and right loudspeaker channels together with left and right headphone channels are used for output. The following relationship applies: Center corresponds to the left headphone channel; Surround corresponds to the right headphone channel.

2.6.2. Surround Processing Mode

Surround sound processing is controlled by three functions:

The "Decoder Matrix" defines which method should be used to create a mu ltich ann el si gna l ( L, C, R, S) out of a stereo input.

The "Surround Reprodu ction" deter mines whether the surround signal “S” i s fed to surround speakers. If no surround speaker is actuall y connected, it defines the method that should be used to create surround effects.

The “Center Mode ” determines how the center signal “C” is to be proce ssed. It can be left un modified, distributed to left and right, discarded or high pass filtered, whereby the low pass signals are distr ibuted to left and right.

The surround proces s ing mode is controlled by means of register 4B

on I2C subaddress 12

hex

2.6.2.1. Decoder Matrix

The Decoder Matrix allows three settings:

– ADAPTIVE:

The adaptive matrix is used for Dolby Surround Pro Logic. Even sound material not encoded in Dolby Surround will produce good surround effects in this mode. The use of the adaptive matrix requires a license from Dolby Laboratories (See License Notice on page 5).

– PASSIVE:

A simple fixed matrix is used for surround sound.

– EFFECT:

A fixed matrix that is used for mono sound and special effects. In adaptive or passive mode no surround signal is present in case of mono, moreover in adaptive mode even the left and right output channels carry no signal (or just low frequency signals in case of Center Mode = NORMAL). If surround sound is still required for mono signals, the effect mode can be used. This forces the surround channel to be active. The effect mode can be used together with 3D-PANORAMA. The result will be a pseudo stereo effect or a broadened stereo image respectively.

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PRELIMINARY DATA SHEET MSP 34x2G

2.6.2.2. Surround Reproduction

Surround sound can be reproduced with four choices:

– REAR_SPEAKER:

If there are any surround speakers connected to the system, this mode should be used. Useful loudspeaker combinations are: (L, C, R, S) or (L, R, S).

– FRONT_SPEAKER:

If there is no surround speaker connected, this mode can be used. Surround information is mixed to left and right output but without creating the illusion of a virtual speaker. It is similar to stereo but an additional center speaker can be used. This mode should be used with the adaptive decoder matrix only . Useful loudspeaker combinations are: (L, C, R) (Note: the surround output channel is muted).

– PANORAMA:

The surround information is mixed to left and right in order to create the illusion of a virtual surround speaker. Useful loudspeaker combinations are: (L, C, R) or (L, R) (Note: the surround output channel is muted).

– 3D-PANORAMA:

Like PANORAMA with improved effect. This algorithm has been approved by the Dolby Laboratories for compliance with the "Virtual Dolby Surround" technology. Useful loudspeaker combinations are: (L, C, R) or (L, R) (Note: the surround output channel is muted).

2.6.2.4. Useful Combinations of Surround Processing Modes

In principle, "Decoder Matrix", "Surround Reproduction", and "Center Modes" are independent settings (all "Decoder Matrix" settings can be used with all "Surround Reproduction" and "Center Modes") but there are some combinations that do not create "good" sound. Useful combina tio ns ar e

Surround Reproduction and Center Modes

– REAR_SPEAKER:

This mode is used if surround speakers are available. Useful center modes are NORMAL, WIDE, PHANTOM, and OFF.

– FRONT_SPEAKER:

This mode can be used if no surround speaker but a center speaker is connected. Useful center modes are NORMAL and WIDE.

– PANORAMA or 3D-PANORAMA:

No surround speaker used. Two (L and R) or three (L, R, and C) loudspeakers can be used. Useful center modes are NORMAL, WIDE, PHANTOM, and OFF.

Center Modes and Decoder Matrix

– PHANTOM:

Should only be used together with ADAPTIVE Decoder Matrix.

2.6.2.3. Center Modes

Four center modes are supported: – NORMAL:

small center speaker connected, L and R speakers have better bass capability.

– WIDE:

L,R, and C speakers all have good bass capability.

– PHANTOM:

No center speaker used. Center signal is distributed to L and R (Note: the center output channel C is muted).

– OFF:

No center speaker used. Center signal C is discarded (Note: the center output channel C is muted).

– NORMAL and WIDE:

Can be used together with any Surround Decoder Matrix.

– OFF:

In special cases, this mode can be used together with the PASSIVE and EFFECT Decoder Matrix (no center speaker connected).

Micronas 17

MSP 34x2G PRELIMINARY DATA SHEET

2.6.3. Examples

Table 2–3 sh ows some examples of how these modes can be used to configure the IC. The list is not intended to be complete, more modes are possible.

Table 2–3: Examples of Surround Configurations

Configurations

Speaker Configuration

Output Configuration

HP/CS Switch [15]

Stereo IC is compatible to the MSP34x0G.

Stereo

(L,R) HP STEREO −− −

Surround Modes as defined by Dolby Laboratories

Dolby Surround Pro Logic

Dolby 3 Stereo

Virtual Dolby Surround

(L,C,R,S) CS MUL TI_CHANNEL ADAPTIVE REAR_

(L,R,S) CS MULTI_CHANNEL ADAPTIVE REAR_

(L,C,R) CS MULTI_CHANNEL ADAPTIVE FRONT_

(L,R) HP TWO_CHANNEL ADAPTIVE 3D_PANORAMA PHANTOM

Surround Modes that use the Dolby Pr o Logic Matrix

3-Channel Virtual Surround

(L,C,R) CS MULTI_CHANNEL ADAPTIVE 3D_PANORAMA NORMAL

Passive Matrix Surround Sound

Surround Processing Mode

)

hex

Channel Configuration [14:8]

Decoder Matrix [15:8]

)

hex

Surround Reproduction [7:4]

SPEAKER

Center Mode [3:0]

NORMAL WIDE

PHANTOM

NORMAL WIDE

WIDE

Micronas Surround Sou nd Multi-chan nel (4-channel configuration)

Micronas Surround Sou nd Multi-chan nel (3-channel configuration)

Micronas Surround Sound Virtual

(L,C,R,S) CS MULTI_CHANNEL PASSIVE REAR_

SPEAKER

(L,R,S) CS MULTI_CHANNEL PASSIVE REAR_

SPEAKER

(L,R) HP TWO_CHANNEL PASSIVE 3D_PANORAMA OFF

NORMAL WIDE

OFF

(2-channel configuration) Micronas Surround Sound Virtual

(3-channel configuration)

(L,C,R) CS MULTI_CHANNEL PASS IVE 3D_PANORAMA NORMAL

WIDE

Special Effects Surround Sound

Micronas Surround Sound for mono (4-channel configuration)

Micronas Surround Sound Virtual

(L,C,R,S) CS MULTI_CHANNEL EFFECT REAR_

SPEAKER

(L,R) HP TWO_CHANNEL EFFECT 3D_PANORAMA OFF

NORMAL WIDE

for mono (2-channel configuration)

Micronas Surround Sound Virtual for mono

(L,C,R) CS MULTI_CHANNEL EFFECT 3D_PANORAMA NORMAL

WIDE

(3-channel configuration)

Speakers not in use are muted automatically.

The implementation in products requires a license from Dolby Laboratories Licensing Corporation (see note on page 5).

18 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

2.6.4. Application Tips for using 3D-PANORAMA

2.6.4.1. Sweet Spot

Good results are on ly obtained in a rather close area along the middle axis between the two loudspeakers: the sweet spot. Moving away from this position degrades the effect.

2.6.4.2. Clipping

For the test at Dolby Labs, it is very impor tant to h ave no clipping effects even with worst case signals. That is, 2 Vrms input sig nal must not clip. The SCART input prescale register has to be set to values of max 19 (25

). This is sufficient in terms of clipping.

dec

hex

However, it was found, that by reducing the prescale to a value lower than 25

more convincing effects are

dec

generated in case of very high dynamic signals. A value of 18

is a good compromise between overall

dec

volume and additional headroom. Test signals : sine sweep with 2 V

; L only, R only,

RMS

L&R equal phase, L&R anti phase. Listening tests: Dolby Trailers (train trailer, city trailer,

canyon trailer...)

Great care has to be taken with sys tems that us e one common subwoofer: A single loudspeaker cannot reproduce vir tual sound locations. The cros sove r frequency must be lower than 120 Hz.

2.6.4.4. Cabinet Requirements

During listeni ng tests at Dolby Laboratories, no resonances in the cabinet should occur.

Good material to check for resonances are the Dolby Trailers or other dynamic sound tracks.

2.6.5. Input and Output Levels in Dolby Surround

Pro Logic Mode

The analog inputs are able to accept 2 Vrms input level without overloading any stage before the volume control. The nominal input level (input sensitivity) is 350 m V. This gives 15 dB headroom. The scar t prescale value should be set to max 0 dB (max 25

S-Inputs should have the same headroom (15 dB)

dec

when entering the MSP 3452G. The h ighest possible input level of 0 dBF S is ac ce pted without interna l overflow. The I (16

dec

S-prescale value should be set to 0 dB

2.6.4.3. Loudspeaker Requirements

The loudspeakers used and their positioning inside the TV set will greatly influence the performance of the virtualizer. The algorithm works with the direct sound path. Reflected sound waves reduce the effect. So it’s most important to have as much direct sound as possible, compared to indirect sound.

To obtain the approval for a TV set, Dolby Laboratories require mounting the loudspeakers at the front of t he set. Loudspeakers radiat ing to the side of the TV set will not produce co nvincing effects. Good d irect ional ity of the loudspeakers towards the listener is optimal.

The virt ualizer was specially developed for implementation in TV sets. Even for rather small stereo TV's, sufficient sound effects can be obtained. For small set s, the loudspeaker placement should be to the side of the CRT; for large screen sets (or 16:9 sets), mounting the loudspeakers below the CRT is a ccep table (larg e separation is preferred, low frequency sp eakers shoul d be outmost to avoid cancellation effects). Using externa l loudspeakers with a la rge stereo base will not create optimal effects.

The loudspeakers should be able to reproduce a wi de frequency range. The most impor tant fr equency range starts from 160 Hz and ranges up to 5 kHz.

With higher prescale values lower input sensitivities can be accommodated. A higher input sensitivity is not possible, because at least 15 dB headroom is required for every input according to the Dolby specifications.

A full-scale left only input (2 Vrms) will produc e a fullscale left only output (at 0 dB volume). The typical output level is 1.37 Vrms for DACM_L. The same holds true for right only signa ls (1.37 Vrms for DACM_R). A full-scale in put level on both inputs ( Lin=Rin=2 Vrms) will give a center only output with maximum level. The typical output level is 1.37 Vrms for DACM_C. A fullscale input level on both input s (but Lin and Rin with inverted phases) wil l give a surround-only s ignal with maximum level (1.37 Vrms for DACM_S).

For reproducing Dolby Pro Logic accordi ng to it s sp ec ifications, the center and surround outputs must be amplified by 3 dB with respect to the L and R output signals. This can be done in two ways:

1. By implementing 3 dB more amplification for center

and surround loudspeaker outputs.

2. By always selecting volume for L and R 3 dB lower

than center and surround. Method 1 is preferable, as method 2 lowers the achievable SNR for left and right signals by 3 dB.

Micronas 19

MSP 34x2G PRELIMINARY DATA SHEET

2.6.6. Subwoofer in Surround Mode

If the channel configuration is set to OFF or TWO_CHANNEL, the subwoofer signal is created by combining the left and right channels directly behind the loudness block using the formula (L+R)/2.

Note: This is identical to the MSP 34x0G. If the channel configuration is MULTI_CHANNEL, the

subwoofer signal is created by combini ng the left and right channels of the loudspeaker channel and the center signal (= headphone left) directly behind the loudness block using the formula (L+R+C)/2. Due to the fact, that the subwoofer is formed behind al l bass/ treble/loudness filters, it is strongly recommended to have exactly the same setting for these filters in both, the loudspeaker and center/surround channels when using the subwoofer output. Any mismatch in these settings will result i n an unbala nced mix of L , C and R for the subwoofer signal.

2.6.7. Equalizer in Surround Mode

In the MULTI_CHANNEL Surround mode, the equalizer can be used with on e common set ting for the left, right, and center channels, but the equalizer cannot be used for the surround channel (see Fig. 2–3 on page 10).

mitting the ACB register first, the reset state can be redefined.

S Bus Interface

2.8. I

The MSP 34x2G has a synchronous master/slave input/output interface running on 32 kHz.

The interface accepts two formats:

S_WS changes at the word boundary

1. I

2. I

S_WS changes one I2S-clock period before the

word boundaries.

S options are set by means of the MODUS and

All I the I2S_CONFIG registers.

The I

S bus interface consists of five pins:

– I 2S _ D A _ I N 1 , I 2 S _ DA _ I N 2 :

S serial data input: 16, 18....32 bits per sample

– I2S_DA_OUT:

S serial data output: 16, 18...32 bits per sample

– I2S_CL:

S serial clock

– I2S_WS:

S word strobe signal defines the left and right

sample

2.7. SCART Signal Routing

2.7.1. SCART DSP In and SCART Out Select

The SCART DSP Input Select and SCART Output Select blocks include full matr ix switching facilities. To design a TV set with four pairs of SCART-inputs and two pairs of SCART-outputs, no external switching hardware is required. The switches are controlled by the ACB user register (see Table 3–11 on page 47).

2.7.2. Stand-by Mode

If the MSP 34x2G is switched off by first pulling STANDBYQ low and th en ( aft er >1

µs delay) switching

off DVSUP and AVSUP, but keeping AHVSUP (‘Stand-by’-mode), the SCART switches maintain their position and function. This allows the copying from SCART-input to SCART-output in the TV set’s stand-by mode.

In case of power on or s tart ing from stand-by (switching on the DVSUP and AVSUP, RESETQ going high 2 ms later), all internal registers except the ACB register (see page 47) are rese t to the d efault configuration (see Table 3–5 on page 25). The reset p osition of the ACB register becomes act ive after the first I

C trans-

mission into the Baseban d Processing par t. By trans-

If the MSP 34x2G serves as the master on the I

interface, the clock and word strobe lines are driven by the IC. In this mode, only 16 or 32 bits per sample can be selected. In slave mode, these lines are input to the IC and the MSP clock is synchronized to 576 times the I2S_WS rate (32 kH z). NICAM operation is no t possible in slave mode.

S timing diagram is shown in Fig. 4–22 on

An I page 76.

20 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

2.9. ADR Bus Interface

For the ASTRA Digital Radio System (ADR), the MSP 3402G, MSP 3412G, and MSP 3452G perform s preprocessing such as carrier selection and filtering. Via the 3-line ADR-bus, the resulting signals are transferred to the DRP 3510A coprocessor, where the source decoding is per formed. To be prepared for an upgrade to ADR with an additional DRP board, the following lines of MSP 34x2G should be provided on a feature connector:

– AUD_CL_OUT – I2S_DA_IN1 or I2S_DA_IN2 – I2S_DA_OUT – I2S_WS – I2S_CL – ADR_CL, ADR_WS, ADR_DA

For more details, please refer to the DRP 3510A data sheet.

2.10. Digital Control I/O Pins and Status Change Indication

2.11. Clock PLL Oscillator and Crystal Specifications

The MSP 34x2G derives all internal system clocks from the 18.432 MHz oscillator. In NICAM or in I

SSlave mode, the clock is phase-locked to the corresponding source. Therefore, it is not possible to use NICAM and I

S-Slave mode at the same time.

For proper performance, the on-chip clock oscillator requires a 18.432 MHz crystal. Note that for the phase-locked modes (NICAM, I

S-Slave), crystals with

tighter tolerance ar e required.

The static level of the digital input/output pins D_CTR_I/O_0/1 is switchable between HIGH and LOW via the I (see page 47). This enables the c ontroll ing of exter nal hardware switch es or other devices via I

C-bus by means of the ACB register

C-bus.

The digital input/outpu t pins can be set to high imp edance by means of the MODUS register (see page 31). In this mode, the pi ns can be used as input. The current state can be read o ut o f the STATUS register (see page 33).

Optionally, the pin D_CTR_I/O_1 can be used as an interrupt requ est si gnal to t he contro ller, indicating any changes in the read register STATUS. This makes polling unnecessary, I

C bus interactions are reduced t o a minimum (see STATUS register on page 33 and MODUS register on page 31).

Micronas 21

MSP 34x2G PRELIMINARY DATA SHEET

3. Control Interface

3.1. Device and Subaddresses

The MSP 34x2G is controlled via the I

C bus slave

interface. The IC is selected by transmitting one of the

MSP 34x2G device addresses. In order to allow up to three MSP ICs to be connected to a single bus, an address select pin (ADR_SEL) has been implemented. With ADR_SEL pulled to high, low, or left open, the MSP 34x2G responds to different device addresses. A device address pair is defined as a write address and a read address (see Table 3–1).

Writing is done by sending the write device address, followed by the subaddress byte, two address bytes, and two data bytes.

Reading is done by sending the writ e device address, followed by the subaddress byte and two address bytes. Without sending a stop condi tio n, r ead in g of th e addressed data is completed by sending the device read address and reading two bytes of data.

Refer to Section 3.1.3 . for the I Section 3.4. “Programming Tips” on page 52 for proposals of MSP 34x2G I

C telegrams. See Table 3–2

C bus protocol and to

for a list of available subaddresses.

response time is about 0.3 ms. If the MSP cannot accept another byte of data (e.g. while servicing an internal inte rru pt), it holds the clock line I2C_CL low to force the transmitter into a wait state. The I Master must read back the clock line to detect whe n the MSP is ready to rec eive the next I

C transmission.

C Bus

The positions within a transmission where this may happen are indicated by “Wait” in Section 3.1.3. The maximum wait period of the MSP during normal operation mode is less than 1 ms.

3.1.1. Internal Hardware Error Handling

In case of any har dware problems (e.g. interr uption of the power supply of the MSP), the MSP’s wait period is extended to 1.8 m s. After this time per iod elaps es, the MSP releases data and clock lines.

Indicating and solving the error status:

To indicate the error status, the remaining acknowledge bits of the actual I Additionally, bit[14] of CONTROL is set to one. The MSP can then be reset via the I

C-protocol will be left high.

C bus by transmitting

the reset condition to CONTROL.

Indication of reset:

Besides the possibility of hardware reset, the MSP can also be reset by means of the RE SET bit in the CO NTROL register by the controller via I

Due to the architecture o f the MSP 34x2G, the IC cannot react immediately to an I

Table 3–1: I

ADR_SEL Low

Mode Write Read Write Read Write Read

MSP device address 80

C Bus Device Addresses

C bus.

C request. The typical

(connected to DVSS)

hex

Any reset, even caused by an unstable reset line etc., is indicated in bit[15] of CONTROL.

A general timing diagram of the I

C bus is shown in

Fig. 4–21 on page 74.

(connected to DVSUP)

hex

High

hex

Left Open

Table 3–2: I2C Bus Subaddresses

Name Binary Value Hex Value Mode Function

CONTROL 0000 0000 00 Read/Write Write: Software reset of MSP (see Table 3–3)

WR_DEM 0001 0000 10 Write write address demodulator

Read: Hardware error status of MSP

hex

RD_DEM 0001 0001 11 Write read address demodulator WR_DSP 0001 0010 12 Write write address DSP RD_DSP 0001 0011 13 Write read address DSP

22 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.1.2. Description of CONTROL Register

Table 3–3: CONTROL as a Write Register

Name Subaddress Bit[15] (MSB) Bits[14:0]

CONTROL 00 hex 1 : RESET

0 : normal

Table 3–4: CONTROL as a Read Register (only MSP 34x2G-versions from A2 on)

Name Subaddress %LW>@06% Bit>@ BitV>@

CONTROL 00 hex Reset status after last reading of CONTROL:

0 : no reset occured 1 : reset occured

Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on,

Internal hardware status:

not of interest 0 : no error occured 1 : internal error occured

bit[15] of CONTROL will be set; it must be

read once to be resetted.

3.1.3. Protocol Description

Write to DSP or Demodulator

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK data-byte-

high

ACK data-byte

low

ACK P

Read from DSP or Demodulator

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK S read

device

address

Wait

ACK data-byte-

high

ACK data-byte

Write to Control Registers

Swrite

device

address

Wait

ACK sub-addr ACK data-byte

high

ACK data-byte

low

ACK P

Read from Control Register

Swrite

device

address

Wait

Note: S = I

P = I

ACK 00hex ACK S read

C-Bus Start Condition from master

C-Bus Stop Condition from master

device

address

Wait

ACK data-byte-

high

ACK data-byte

low

NAK P

ACK = Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller dark gray) NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’

or from MSP indicating internal error state

Wait = I

C-Clock line is held low, while the MSP is processing the I2C command.

This waiting time is max. 1 ms

NAK P

low

Micronas 23

MSP 34x2G PRELIMINARY DATA SHEET

I2C_DA

1 0

S P

I2C_CL

Fig. 3–1: I2C bus protocol (MSB first; data must be stable while clock is high)

3.1.4. Proposals for General MSP 34x2G

C Telegrams

3.1.4.1. Symbols

3.2. Start-Up Sequence: Po wer-Up and I

After POWER ON or RESET (see Fi g. 4–20), the IC is in an inactive state. All registers are in the Reset posi-

daw write device address (80 dar read device address (81

< Start Condition

hex

, 84

, 85

hex hex

or 88

or 89

hex

)

tion (see Table 3–5 and Table 3 –6), the anal og ou tputs are muted. The controll er has to initialize all registers for which a non-default setting is necessary.

> Stop Condition aa Address Byte dd Data Byte

3.3. MSP 34x2G Programming Interface

3.3.1. User Registers Overview

3.1.4.2. Write Telegrams

The MSP 34x2G is controlled by means of user regis-

<daw 00 d0 00> write to CONTROL register <daw 10 aa aa dd dd> write data into demodulator <daw 12 aa aa dd dd> write data into DSP

ters. The complete list of all user registers is given in Table 3–5 and Table 3–6. The registers are partitioned into the Demodulator section (Subaddress 10 writing, 11

for reading) and the Baseband Proc ess-

hex

ing sections (Subaddress 12

3.1.4.3. Read Telegrams

reading).

C Controlling

hex

for writing, 13

hex

for for

<daw 00 <dar dd dd> read data from

CONTROL register

<daw 11 aa aa <dar dd dd> read data from demodulator <daw 13 aa aa <dar dd dd> read data from DSP

3.1.4.4. Examples

<80 00 80 00> RESET MSP statically <80 00 00 00> Clear RESET <80 10 00 20 00 03> Set demodulator to stand. 03 <80 11 02 00 <81 dd dd> Read STATUS <80 12 00 08 01 20> Set loudspeaker channel

source to NICAM and Matrix to STEREO

hex

More examples of typical application protocols are listed in Section 3.4. “Programming Tips” on page 52.

Write and read regis ters are 16-bit wide, whereby the MSB is denoted bit[15]. Transmissions via I

C bus have to take place in 16-bit words (two byte transfers, with the most significant byte transferred first). All write registers, except the demodulator write registers, are readable.

Unused parts of the 16-bit write registers must be zero.

Addresses not given in this table must not be accessed.

For reasons of software compatibility to the MSP 34xxD, a Manual/C omp a tibil it y Mo de i s available. More read and wr ite registers to gether with a detaile d description can be found in the “Appendix B: Manual / Compatibility Mode” on page 91.

24 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–5: List of MSP 34x2G Write Registers

Write Register Address

(hex)

I2C Subaddress = 10

; Registers are not readable

hex

Bits Description and Adjustable Range Reset See

Page

STANDARD SELECT 00 20 [15:0] Initial Programming of complete Demodulator 00 00 29

MODUS 00 30 [15:0] Demodulator, Automatic and I

I2S CONFIGURATION 00 40 [15:0] Configuration of I

I2C Subaddress = 12

; Registers are all readable by using I2C Subaddress = 13

hex

S format 00 00 32

hex

S options 00 00 31

Volume loudspeaker channel 00 00 [15:8] [+12 dB ... −114 dB, MUTE] MUTE 37 Volume / Mode loudspeaker channel [7:0] 1/8 dB Steps,

Reduce Volume / Tone Control / Compromise/

hex

Dynamic

Balance loudspeaker channel [L/R] 00 01 [15:8] [0...100 / 100% and 100 / 0...100%]

[

−127...0 / 0 and 0 / −127...0 dB]

100%/100% 38

Balance mode loudspeaker [7:0] [Linear / logarithmic mode] linear mode Bass loudspeaker channel 00 02 [15:8] [ Treble loudspeaker channel 00 03 [15:8] [ Loudness loudspeaker channel 00 04 [15:8] [0 dB ...

+20 dB ... −12 dB] 0 dB 39 +15 dB ... −12 dB] 0 dB 40

+17 dB] 0 dB 41

Loudness filter characteristic [7:0] [NORMAL, SUPER_BASS] NORMAL Spatial effect strength loudspeaker ch. 00 05 [15:8] [

−100%...OFF...+100%] OFF 42

Spatial effect mode/customize [7:0] [SBE, SBE

Volume headphone Volume / Mode headphone

channel 00 06 [15:8] [+12 dB ... −114 dB, MUTE] MUTE 37

channel [7:0] 1/8 dB Steps, Reduce Volume / Tone Control 00

+PSE] SBE+PSE

hex

Volume SCAR T1 output channel 00 07 [15:8] [+12dB ... −114 dB, MUTE] MUTE 46

Loudspeaker source select 00 08 [15:8] [FM/AM, NICAM, SCART, I

S1, I2S2] FM/AM 36 Loudspeaker channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO.. .] SOUNDA 36 Headphone Headphone SCART1 source select 00 0a [15:8] [FM/AM, NICAM, SCART, I

source select 00 09 [15:8] [FM/AM, NICAM, SCART, I2S1, I2S2] FM/AM 36

channel matrix [7:0] [SOUNDA , SOUNDB , STEREO, MONO...] SOUNDA 36

S1, I2S2] FM/AM 36 SCART1 channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO.. .] SOUNDA 36

S source select 00 0b [15:8] [FM/AM, NICAM, SCART, I2S1, I2S2] FM/AM 36

S channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO ...] SOUNDA 36

Quasi-peak detector source select 00 0c [15:8] [FM/AM, NICAM, SCART, I

S1, I2S2] FM /A M 36 Quasi-peak detector matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO ...] SOUNDA 36 Prescale SCART input 00 0d [15:8] [00 Prescale FM/AM 00 0e [15:8] [00

hex

... 7F ... 7F

]00

hex

]00

hex

34 FM matrix [7:0] [NO_MAT, GSTERERO, KSTERE O] NO_MAT 35 Prescale NICAM 00 10 [15:8] [00

Prescale I

S2 00 12 [15:8] [00

hex

... 7F

... 7F ACB : SCART Switches a. D_CTR_I/O 00 13 [15:0] Bits [15..0] 00 Beeper 00 14 [15:0] [00 Prescale I

S1 00 16 [15:8] [00

hex

... 7F

] (MSP 3412G, MSP 3452G only) 00

hex

]10

hex

]/[00

hex

... 7F

hex

]10

]0/047

hex

35 35 47

Micronas 25

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–5: List of MSP 34x2G Write Registers, continued

Write Register Address

(hex)

Bits Description and Adjustable Range Reset See

Page

Mode tone control 00 20 [15:8] [BASS/TREBLE, EQUALIZER] BASS/T REB 39 Equalizer loudspeaker ch. band 1 00 21 [15:8] [ Equalizer loudspeaker ch. band 2 00 22 [15:8] [ Equalizer loudspeaker ch. band 3 00 23 [15:8] [ Equalizer loudspeaker ch. band 4 00 24 [15:8] [ Equalizer loudspeaker ch. band 5 00 25 [15:8] [

+12 dB ... −12 dB] 0 dB 40 +12 dB ... −12 dB] 0 dB 40 +12 dB ... −12 dB] 0 dB 40 +12 dB ... −12 dB] 0 dB 40 +12 dB ... −12 dB] 0 dB 40

Acoustical Compensation loudspeaker 00 26 [15:0] C0_Main 0 Acoustical Compensation loudspeaker 00 27 [15:0] C1_Main 0 Acoustical Compensation loudspeaker 00 28 [15:0] C2_Main 0 Automatic Volume Correction 00 29 [15:8] [off, on, decay time] off 38 loudspeaker channel mute and invert 00 2B [7:0] [on, invert, mute] on 44 Subwoofer level adjust 00 2C [15:8] [+12 dB ... Subwoofer corner frequency 00 2D [15:8] [50 Hz ... 400 Hz] 00

−30 dB, mute] 0 dB 44

hex

Subwoofer complementary high-pass [7:0] [off, on, MDB to Main] off 44

Balance headphone

Balance mode headphone Bass headphone Treble headphone Loudness headphone

channel [L/R] 00 30 [15:8] [0...100 / 100% and 100 / 0...100%]

channel 00 31 [15:8] [+20 dB ... −12 dB] 0 dB 39

channel 00 32 [15:8] [+15 dB ... −12 dB] 0 dB 40

channel 00 33 [15:8] [0 dB ... +17 dB] 0 dB 41

Loudness filter characteristic

[

−127...0 / 0 and 0 / −127...0 dB]

[7:0] [Linear mode / logarithmic mode] linear mode

[7:0] [NORMAL, SUPER_BASS] NORMAL

100 %/100 % 38

Acoustical Compensation center 00 34 [15:0] C0_Center 0 Acoustical Compensation center 00 35 [15:0] C1_Center 0 Acoustical Compensation center 00 36 [15:0] C2_Center 0 Volume SCART2 output channel 00 40 [15:8] [

+12 dB ... −114 dB, MUTE] 00

SCART2 source select 00 41 [15:8] [FM, NICAM, SCART, I

hex

S1, I2S2] FM 36

SCART2 channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 36 AUX/CS switch 00 48 [15] [AUX, CS] 0 Channel configuration [14:8] [STEREO/TWO_CHANNEL/MUL TI_CHANNEL] 00 Spatial effect for surround processing 00 49 [15:8] [0% - 100%] 00 Virtual surround effect strength 00 4A [15:8] [0% - 100%] 00 Decoder matrix 00 4B [15:8] [ADAPTIVE/PASSIVE/EFFECT] 00 Surround reproduction [ 7:4] [REAR_SPEAKER/FRONT_SPEAKER/PANORAMA/

3D_PANORAMA] Center mode [3:0] [PHANTOM/NORMAL/WIDE/OFF] 0 Surround delay 00 4C [15:0] [5..31ms] 00 Noise Generator 00 4D [15:0] [NOISEL, NOISEC, NOISER, NOISES] 00

hex

48 48 49 49 50 50

50 50 50

26 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–5: List of MSP 34x2G Write Registers, continued

Write Register Address

Bits Description and Adjustable Range Reset See

(hex)

MDB Effect Strength 00 68 [15:8] [0 dB ... 127 dB, off] off 44 MDB Amplitude Limit 00 69 [15:8] [0 dB FS... -32 dB FS] 0 dB FS 44 MDB Harmonic Content 00 6A [15:8] [0% ... 100%] 0% 45 MDB Low Pass Corner Frequency 00 6B [15:8] [50 Hz ... 300 Hz] 0 Hz 45 MDB High Pass Corner Frequency 00 6C [15:8] [20 Hz ... 300 Hz] 0 Hz 45

In Multi Channel Mode, these registers are used for controlling baseband functions of the center and surround channels. Following relationship applies: Center

corresponds to the left headphone channel, Surround corresponds to the right headphone channel.

Table 3–6: List of MSP 34x2G Read Registers

Read Register Address

(hex)

I2C Subaddress = 11

; Registers are not writable

hex

STANDARD RESULT 00 7E [15:0] Result of Automatic Standard Detection

STATUS 02 00 [15:0] Monitoring of inter nal settings e.g. Stereo, Mono, Mute etc. . 33

Bits Description and Adjustable Range See

(MSP 3412G, MSP 3442G, MSP 3452G only)

Page

I2C Subaddress = 13

; Registers are not writable

hex

Quasi peak readout left 00 19 [15:0] [0 0 Quasi peak readout right 00 1A [15:0] [00 MSP hardware version code 00 1E [15:8] [00 MSP major revision code [7:0] [00 MSP product code 00 1F [15:8] [00 MSP ROM version code [7:0] [00

... 7FFF

hex

... 7FFF

hex

... FF

hex

... FF

hex

... FF

hex

... FF

hex

] 16 bit two’s complement 51

hex

] 16 bit two’s compleme nt 51

hex

]51

hex

]51

hex

]51

hex

]51

hex

Micronas 27

MSP 34x2G PRELIMINARY DATA SHEET

3.3.2. Description of User Registers

Table 3–7: Standard Codes for STANDARD SELECT register

MSP Standard Code (Data in hex)

TV Sound Standard Sound Carrier

Frequencies in MHz

MSP 34x2G Version

Automatic Standard Detection

00 01 Start Automatic Standard Detection and

all

set to detected standard

Standard Selection

00 02 M-Dual FM-Stereo 4.5/4.724212 3402, -12, -22, -42, -52 00 03 B/G -Dual FM -Stereo 00 04 D/K1-Dual FM-Stereo 00 05 D/K2-Dual FM-Stereo 00 06 D/K -FM-Mono with HDEV3

Standard Detection,

HDEV3

SAT-Mono (i.e. Eutelsat, see Table 6–18)

, not detectable by Automatic

5.5/5.7421875 3402, -12, -52

6.5/6.2578125

6.5/6.7421875

6.5

00 07 D/K3-Dual FM-Stereo 6.5/5.7421875 00 08 B/G -NICAM-FM

5.5/5.85 3412, -52 00 09 L -NICAM-AM 6.5/5.85 00 0A I -NICAM-FM 6.0/6.552 00 0B D/K -NICAM-FM

00 0C D/K -NICAM-FM with HDEV2

, not detectable by Automatic

6.5/5.85

Standard Detection, for China

00 0D D/K -NICAM-FM with HDEV3

, not detectable by Automatic

6.5/5.85

Standard Detection, for China 00 20 BT SC-S ter eo 4.5 3422, -42, -52 00 21 BTSC-Mono

+ SAP

00 30 M-EIA-J Japan Stereo 4.5 3422, -42, -52 00 40 FM-Stereo Radio with 75

µs Deemphasis 10.7 3422, -42, -52

00 50 SAT-Mono (see Table 6–18) 6.5 3402, -12, -52 00 51 SAT-Stereo (see Table6–18) 7.02/7.20 00 60 SAT ADR (Astra Digital Radio) 6.12

In case of Automatic Sound Select, the B/G-codes 3

In case of Automatic Sound Select, the D/K-codes 4

HDEV3: Max. FM deviation must not exceed 540 kHz

HDEV2: Max. FM deviation must not exceed 360 kHz

hex hex

and 8 , 5

hex

are equivalent.

hex

, 7

, and B

hex

are equivalent.

hex

28 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.3.2.1. STANDARD SELECT Register

The TV sound standard of the MSP 34x2G demodulator is determined by the STANDARD SELECT regis ter. There are two ways to use the STANDARD SELECT register:

– Setting up the demodulator for a TV sound standard

by sending the corresponding standard code with a single I

C-Bus transmission.

– Starting the Automatic Standard Detection for ter-

restrial TV standards. This is the most comfortable way to set up the demodulator. Within 0.5 s, the detection and set-up of the actual TV sound standard is performed. The detected standard can be read out of the STANDARD RESULT register by the control processor. This feature is recommended for the primary set-up of a TV set. Outputs should be

muted during Automatic Standard Detection. The Standard Codes are listed in Table 3–7. Selecting a TV sound standard via the STANDARD

SELECT register initializes the demodulator. This includes: AGC-settings and carrier mute, tuning frequencies, FIR-filter se ttings, demodulation mode ( FM, AM, NICAM), deemphasis and identification mode.

TV stereo sound standards that are unavailable for a specific MSP version are processed in analog mono sound of the standard. In that case, stereo or bil ingual processing will not be possible.

For a complete setup of the TV sound processing from analog IF input to the source selection, the transmi ssions as shown in Section 3.5. are necessary.

3.3.2.2. Refresh of STANDARD SELECT Register

A general refresh o f t he ST A NDAR D S EL ECT r e gi ste r is not allowed. However, the following method enables watching the MSP 34x2G “alive” status and detection of accidental resets (only versions A2 and later):

– After Power-on, bit[15] of CONTROL will be set; it

must be read once to enable the reset-detection feature.

– Reading of the CONTROL register and checking

the reset indicator bit[15] .

– If bit[15] is “0”, any refresh of the STANDARD

SELECT register is not allowed.

– If bit[15] is “1”, indicating a reset, a refresh of the

STANDARD SELECT register and all other MSPG registers is required.

3.3.2.3. STANDARD RESULT Register

If Automatic Standard Detection is selected in the STANDARD SELECT reg ister, status and result of the Automatic Standard Detection process can be read out of the STANDARD RESULT register. The possible results are based on the mentioned Standard Code and are listed in Table 3–8.

In cases where no sound standard h as been detected (no standard present, too much noise, strong interferers, etc.) the ST AND ARD RESULT register contains 00

. In that case, the con troller has to start fur ther

hex

actions (for example, set the standard according to a preference list or by manual input).

For reasons of software compatibility to the MSP 34x0D, a Manual/Compatibility mode is available. A detailed description of this mode can be found on page 91.

As long as the STANDARD RESULT register contain s a value greater than 07 FF

, the Automatic Standard

hex

Detection is still active. During this period, the MODUS and STANDARD SELECT registe r must not be written. The STATUS register will be updated when the Automatic Standard Detection has finished.

If a present sound standard is unavailable for a specific MSP version, it detects and switches to the analog mono sound of this standard.

Example: The MSP 3442G will detect a B/G-NICAM signal as standard 3 and will switch to the analog FM-Mono sound.

Micronas 29

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–8: Results of the Automatic Standard Detection

Broadcasted Sound Standard

Automatic Stan dard

STANDARD RESULT Register

Read 007E

0000 Detection could not find a sound standard

B/G-FM 0003 B/G-NICAM 0008 I 000A FM-Radio 0040 M-Korea

0002 M-Japan M-BTSC

0020

0030 L-AM

0009 D/K1 D/K2

0004 D/K3

L-NICAM

0009 D/K-NICAM

000B

hex

(if MODUS[14,13]=00)

hex

(if MODUS[14,13]=01)

hex

(if MODUS[14,13]=10)

hex

(if MODUS[12]=0)

hex

(if MODUS[12]=1)

hex

(if MODUS[12]=0)

hex

(if MODUS[12]=1)

hex

Automatic Stan dard Detection still active

>07FF

hex

30 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.3.2.4. Write Registers on I2C Subaddress 10 Table 3–9: Write Registers on I2C Subaddress 10

Function Name

Address

00 20

hex

STANDARD SELECTION Register

Defines TV Sound or FM-Radio Standard bit[15:0] 00 01

00 02

start Automatic Standard Detection

hex

Standard Codes (see Table 3–7)

hex

...

hex

00 30

hex

00 60

MODUS Register

Preference in Automatic Standard Detection: bit[15] 0 undefined, must be 0 bit[14:13] detected 4.5 MHz carrier is interpreted as:

0 standard M (Korea) 1 standard M (BTSC) 2 standard M (Japan) 3 chroma carrier (M/N standards are ignored)

bit[12] detected 6.5 MHz carrier is interpreted as:

0 standard L (SECAM) 1 standard D/K1, D/K2, D/K3, or D/K NICAM

hex

STANDARD_SEL

MODUS

General MSP 34x2G Options bit[11:9] 0 undefined, must be 0 bit[8] 0/1 ANA_IN1+/ANA_IN2+; select analog sound IF input pin bit[7] 0/1 active/tristate state of audio clock output pin

AUD_CL_OUT

bit[6] I

S word strobe alignment 0 WS changes at data word boundary 1 WS changes one clock cycle in advance

bit[5] 0/1 master/slave mode of I

S interface (must be set to 0

(= Master) in case of NICAM mode)

bit[4] 0/1 active/tristate state of I

S output pins

bit[3] state of digital output pins D_CTR_I/O_0 and _1

0 active: D_CTR_I/O_0 and _1 are output pins

(can be set by means of the ACB register. see also: MODUS[1])

1 tristate: D_CTR_I/O_0 and _1 are input pins

(level can be read out of STATUS[4,3]) bit[2] 0 undefined, must be 0 bit[1] 0/1 disable/enable STATUS change indication by means of

the digital I/O pin D_CTR_I/O_1

Necessary condition: MODUS[3] = 0 (active) bit[0] 0/1 off/on: Automatic Sound Select

Valid at the next start of Automatic Standard Detection.

Micronas 31

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–9: Write Registers on I

C Subaddress 10

, continued

hex

00 40

hex

Function Name

I2S CONFIGURATION Register

I2S_CONFIG bit[15:1] 0 not used, must be set to “0” bit[0] I2S_CL frequency and I

S data sample length for

master mode 0 2 x 16 bit (1.024 MHz) 1 2 x 32 bit (2.048 MHz))

32 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.3.2.5. Read Registers on I2C Subaddress 11

hex

Table 3–10: Read Registers on I2C Subaddress 11

Function Name

Address

00 7E

STANDARD RESULT Register

hex

Readback of the detected TV Sound or FM-Radio Standard bit[15:0] 00 00

Automatic Standard Detection could not find

hex

a sound standard

00 02

MSP Standard Codes (see Table 3–8)

hex

...

02 00

hex

00 40

>07 FF

STATUS Register

hex

Automatic Standard Detection still active

hex

Contains all user relevant internal information about the status of the MSP bit[15:10] undefined bit[8] 0/1 “1” indicates bilingual sound mode or SAP present

(internally evaluated from received analog or digital identification signal)

hex

STANDARD_RES

STATUS

bit[7] 0/1 “1” indicates independent mono sound (only for

NICAM )

bit[6] 0/1 mono/stereo indication

(internally evaluated from received analog or digital identification signals)

bit[5,9] 00 analog sound standard (FM or AM) active

01 this pattern will not occur 10 digital sound (NICAM) available 11 bad reception condition of digital sound (NICAM) due

to: a. high error rate b. unimplemented sound code

c. data transmission only bit[4] 0/1 low/high level of digital I/O pin D_CTR_I/O_1 bit[3] 0/1 low/high level of digital I/O pin D_CTR_I/O_0 bit[2] 0 detected secondary carrier (2nd A2 or SAP carrier)

1 no secondary carrier detected

bit[1] 0 detected primary carrier (Mono or MPX carrier)

1 no primary carrier detected bit[0] undefined If STATUS change indication is activated by means of MODUS[1]: Each

change in the ST ATUS register sets the digital I/O pin D_CTR_I/O_1 to high level. Reading the STATUS register resets D_CTR_I/O_1.

Micronas 33

MSP 34x2G PRELIMINARY DATA SHEET

3.3.2.6. Write Registers on I2C Subaddress 12

hex

Table 3–11: Write Registers on I2C Subaddress 12

Function Name

Address PREPROCESSING

00 0E

hex

FM/AM Prescale

bit[15:8] 00

hex

Defines the input prescale gain for the demodulated ... FM or AM signal 7F

hex

off (RESET condition)

For all FM modes except satellite FM and AM-mode, the combinations of prescale value and FM deviation listed below lead to internal full scale.

FM mode bit[15:8] 7F

48 30 24 18 13

hex hex hex hex hex hex

28 kHz FM deviation

50 kHz FM deviation

75 kHz FM deviation

100 kHz FM deviation

150 kHz FM deviation

180 kHz FM deviation (limit)

FM high deviation mode (HDEV2, MSP Standard Code = C bit[15:8] 30

hex hex

150 kHz FM deviation

360 kHz FM deviation (limit)

FM very high deviation mode (HDEV3, MSP Standard Code = 6 and D bit[15:8] 20

hex

450 kHz FM deviation

540 kHz FM deviation (limit)

Satellite FM with adaptive deemphasis

hex

PRE_FM

)

hex)

bit[15:8] 10

hex

recommendation

AM mode (MSP Standard Code = 9) bit[15:8] 7C

hex

recommendation for SIF input levels from

0.1 V

to 0.8 V

(Due to the AGC being switched on, the AM-output level

remains stable and independent of the actual SIF-level in

the mentioned input range)

34 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

(continued)

00 0E

hex

00 10

hex

Function Name

FM Matrix Modes

FM_MATRIX Defines the dematrix function for the demodulated FM signal bit[7:0] 00

hex

no matrix (used for bilingual and unmatrixed stereo sound) 01 02 03

hex hex hex

German stereo (Standard B/G)

Korean stereo (also used for BTSC, EIA-J and FM Radio)

sound A mono (left and right channel contain the mono

sound of the FM/AM mono carrier) 04

hex

sound B mono

In case of Automatic Sound Select = on, the FM Matrix Mode is set automati- cally . Writing to the FM/AM prescale register (00 0E In order not to disturb the automatic process, the low part of any I

high part) is still allowed.

hex

C transmission to this register is ignored. Therefore, any FM-Matrix readback values may differ from data written previously.

In case of Automatic Sound Select = off, the FM Matrix Mode must be set as shown in Table 6–17 of Appendix B.

To enable a Forced Mono Mode set A2 THRESHOLD as de scribed in Section 6.3.2.on page 95

NICAM Prescale

PRE_NICAM

Defines the input prescale value for the digital NICAM signal

00 16 00 12

00 0D

hex hex

hex

bit[15:8] 00

hex

... 7F

prescale gain

hex

examples: 00 20 5A 7F

hex hex hex hex

off 0dB gain 9 dB gain (recommendation)

+12 dB gain (maximum gain)

I2S1 Prescale I2S2 Prescale

Defines the input prescale value for digital I bit[15:8] 00

hex

... 7F

prescale gain

hex

S input signals

examples: 00 10 7F

hex hex hex

off 0 dB gain (recommendation)

+18 dB gain (maximum gain)

SCART Input Prescale

Defines the input prescale value for the analog SCART input signal bit[15:8] 00

hex

... 7F

prescale gain

hex

examples: 00 19

hex hex

off 0dB gain (2V

input leads to digital full scale)

RMS

Due to the Dolby requirements, this is the maximum

hex

value allowed to prohibit clipping of a 2 V

+14 dB gain (400 mV

input leads to digital full scale)

RMS

PRE_I2S1 PRE_I2S2

PRE_SCART

input signal.

Micronas 35

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address SOURCE SELECT AND OUTPUT CHANNEL MATRIX

Source for:

00 08 00 09 00 0A 00 41 00 0B 00 0C

hex hex

hex

hex hex

Loudspeaker Output Headphone Output SCART1 DA Output SCART2 DA Output

S Output

I Quasi-Peak Detector

bit[15:8] 0 “FM/AM”: demodulated FM or AM mono signal

1 “Stereo or A/B”: demodulator Stereo or A/B signal

(in manual mode, this source is identical to the NICAM source in the MSP 3410D)

3 “Stereo or A”: demodulator Stereo Sound or

Language A (only defined for Automatic Sound Select)

4 “Stereo or B”: demodulator Stereo Sound or

Language B (only defined for Automatic Sound Select) 2 SCART input 5I 6I

S1 input

S2 input

SRC_MAIN SRC_AUX SRC_SCART1 SRC_SCART2 SRC_I2S SRC_QPEAK

00 08 00 09 00 0A 00 41 00 0B 00 0C

hex hex

hex

hex hex

12 Main channel: AVC processed signal 13 Main channel: baseband processed signal with volume 14 Aux channel: baseband processed signal with volume

For demodulator sources, see Table 2–2.

Matrix Mode for:

Loudspeaker Output Headphone Output SCART1 DA Output SCART2 DA Output

S Output

I Quasi-Peak Detector

bit[7:0] 00

10 20 30

hex hex hex hex

Sound A Mono (or Left Mono)

Sound B Mono (or Right Mono)

Stereo (transparent mode)

Mono (sum of left and right inputs divided by 2) special modes are available (see Section 6.5.1. on page 103)

In Automatic Sound Select mode, the demodulator source channels are set according to Table 2–2. Therefore, the matrix modes o f the correspon ding output channels should be set to “Stereo” (transparent).

MAT_MAIN MAT_AUX MAT_SCART1 MAT_SCART2 MAT_I2S MAT_QPEAK

36 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address LOUDSPEAKER AND HEADPHONE PROCESSING

00 00 00 06

hex hex

Volume Loudspeaker Volume Headphone

bit[15:8] volume table with 1 dB step size

7F 7E

hex hex

+12 dB (maximum volume) +11 dB

... 74 73 72

hex hex hex

+1dB

0dB

−1dB

... 02 01 00 FF

hex hex hex hex

−113 dB

−114 dB

Mute (reset condition) Fast Mute (needs about 75 ms until the signal is completely ramped down)

bit[7:5] higher resolution volume table

0 1

+0dB +0.125 dB increase in addition to the volume table

... 7

+0.875 dB increase in addition to the volume table

VOL_MAIN VOL_AUX

bit[4] 0 must be set to 0 bit[3:0] clipping mode

0 reduce volume 1 reduce tone control 2 compromise

3 dynamic With large scale in put si gna ls , p osit ive volume settings may l ead t o signa l c lippi ng. The MSP 34x2G loudspeaker and headpho ne volume func tion is di vided i nto a

digital and an analog sect ion. With Fast Mute, volume is reduced to mute position by digital volume only. Analog volume is not changed. This reduces any audible DC plops. To turn volume on again, the volume step that has been used before Fast Mute was activated must be transmitted.

If the clipping mode is set to “reduce volume”, the following rule is used: To prevent severe clipping effects with bass, treble, or equalizer boo sts, the internal volume is automatically limited to a level where, in combination with either bass, treble, or equalizer setting, the amplification does not exceed 12 dB.

If the clipping mode is “reduce tone control”, the bass or treble value is reduced if amplification exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced, where amp lification together with volume exceeds 12 dB.

If the clipping mode is “compromise mode”, the bass or treble value and volume are reduced half a nd h alf if a mplifica tion exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced half and half, where ampli fication together with volume exceeds 12 dB.

If the clipping mode is “dynamic”, volume is r educed auto matically if the signal amplitudes would exceed

−2 dBFS within the IC. For operation of MDB, dyna-

mic mode must be switched on.

Micronas 37

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 29

hex

Function Name

Automatic Volume Correction (A VC) Loudspeaker Channel

bit[15:12] 00

hex hex

bit[11:8] decay time

hex

AVC off (and reset internal variables) AVC on

8 s decay time 4 s decay time 2 s decay time 20 ms decay time (should be used for approx. 100 ms

AVC

AVC_DECAY

after channel change)

bit[7:4] output level

hex

−18 dBFS

−17 dBFS

AVC_LEVEL

... f

hex

bit[3:2] maximum attenuation

hex

bit[1:0] maximum gain

hex

−3dBFS

AVC_MIN 24 dB 18 dB 12 dB

AVC_MAX 6dB 12 dB 0dB

00 01 00 30

hex hex

Balance Loudspeaker Channel Balance Headphone Channel

bit[15:8] Linear Mode

7F 7E

hex

Left muted, Right 100% Left 0.8%, Right 100%

... 01 00 FF

hex hex

hex

Left 99.2%, Right 100% Left 100%, Right 100% Left 100%, Right 99.2%

... 82 81

hex hex

Left 100%, Right 0.8% Left 100%, Right muted

bit[15:8] Logarithmic Mode

7F 7E

hex

Left −127 dB, Right 0 dB Left −126 dB, Right 0 dB

... 01 00 FF

hex hex

hex

Left −1 dB, Right 0 dB Left 0 dB, Right 0 dB Left 0 dB, Right −1dB

... 81 80

hex hex

Left 0 dB, Right −127 dB Left 0 dB, Right −128 dB

bit[7:0] Balance Mode

00 01

hex hex

linear logarithmic

Positive balance settings reduce the left channel without affecting the right channel; negative settings reduce the right channel leaving the left channel unaffected.

BAL_MAIN

BAL_AUX

38 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

Function Name

Address

00 20

hex

Tone Control Mode Loudspeaker Channel

bit[15:8] 00

hex hex

Defines whether Bass/Treble or Equalizer is activated for the loudspeaker channel. Bass and Equalizer cannot work simultaneously . If Equalizer is used, Bass, and Treble coefficients must be set to zero and vice versa.

Note: In the MULTI_CHANNEL mode, the equalizer cannot be used.

00 02 00 31

hex hex

Bass Loudspeaker Channel Bass Headphone Channel

bit[15:8] extended range

hex

normal range 60

hex

... 08

hex

... A8

hex

Higher resolution is possible: an LSB step in the normal range results in a gain step of about 1/8 dB, in the extended range about 1/4 dB.

C Subaddress 12

hex

bass and treble is active equalizer is active

+20 dB +18 dB +16 dB +14 dB

+12 dB +11 dB

+1dB

0dB

−1dB

−11 dB

−12 dB

, continued

TONE_MODE

BASS_MAIN BASS_AUX

With positive bass settings, internal clipping may occur even with overall volume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not recommended to set bass to a value that, in conjunction with volume, would result in an overall positive gain.

Micronas 39

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 03

hex

00 32

hex

00 21

hex

00 22

hex

00 23

hex

00 24

hex

00 25

hex

Function Name

Treble Loudspeaker Channel Treble Headphone Channel

bit[15:8] 78

hex hex

+15 dB +14 dB

TREB_MAIN

TREB_AUX

... 08 00 F8

hex hex hex

+1dB

0dB

−1dB

... A8 A0

hex hex

−11 dB

−12 dB

Higher resolution is possible: an LSB step results in a gain step of about 1/8 dB. With positive treble settings, internal clipping may occur even with overall vol-

ume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not recommended to set treble to a value that, in conjunction with volume, would result in an overall positive gain.

Equalizer Loudspeaker Channel Band 1 (below 120 Hz) Equalizer Loudspeaker Channel Band 2 (center: 500 Hz) Equalizer Loudspeaker Channel Band 3 (center: 1.5 kHz) Equalizer Loudspeaker Channel Band 4 (center: 5 kHz) Equalizer Loudspeaker Channel Band 5 (above: 10 kHz)

bit[15:8] 60

hex hex

+12 dB +11 dB

EQUAL_BAND1

EQUAL_BAND2

EQUAL_BAND3

EQUAL_BAND4

EQUAL_BAND5

... 08 00 F8

hex hex hex

+1dB

0dB

−1dB

... A8 A0

hex hex

−11 dB

−12 dB

Higher resolution is possible: an LSB step results in a gain step of about 1/8 dB. With positive equalizer settings, internal clipping may occur even with overall

volume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not recommended to set equalizer bands to a value that, in conjunction with volume, would result in an overall positive gain.

40 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 04

hex

00 33

hex

Function Name

Loudness Loudspeaker Channel Loudness Headphone Channel

LOUD_MAIN LOUD_AUX

bit[15:8] Loudness Gain

44 40

hex hex

+17 dB +16 dB

... 04 03 02 01 00

hex hex hex hex hex

+1dB +0.75 dB +0.5 dB +0.25 dB

0dB

bit[7:0] Loudness Mode

00 04

hex hex

normal (constant volume at 1 kHz) Super Bass (constant volume at 2 kHz)

Higher resolution of Loudness Gain is possible: An LSB step results in a gain step of about 1/4 dB.

Loudness increases the volume of low- and high-frequency signals, while keeping the amplitude of the 1-kHz reference frequency constant. The intended loudness has to be set according to the actual volume setting. Because loudness introduces gain, it is not recommended to set loudness to a value that, in conjunction with volume, would result in an overall positive gain.

The corner frequency for bass amplification can be set to two different values. In Super Bass mode, the corner frequency is shifted up. The point of constant volume is shifted from 1 kHz to 2 kHz.

Micronas 41

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 05

hex

Function Name

Spatial Effects Loudspeaker Channel

SPAT_MAIN

bit[15:8] Effect Strength

7F 3F

hex hex

Enlargement 100% Enlargement 50%

... 01 00 FF

hex hex

hex

Enlargement 1.5% Effect off reduction 1.5%

... C0 80

hex

reduction 50% reduction 100%

bit[7:4] Spatial Effect Mode

hex

Stereo Basewidth Enlargement (SBE) and Pseudo Stereo Effect (PSE). (Mode A)

hex

Stereo Basewidth Enlargement (SBE) only. (Mode B)

bit[3:0] Spatial Effect High-Pass Gain

hex

max. high-pass gain 2/3 high-pass gain 1/3 high-pass gain min. high-pass gain automatic

Spatial effects should not be used together with 3D-PANORAMA or PANORAMA.

00 2B

hex

There are several spatial effect modes available: In mode A (low byte = 00

), the spatial effect depends on the source mode. If

hex

the incoming signal is mono, Pseudo Stereo Effect is active; for stereo signals, Pseudo Stereo Effect and Stereo Basewidth Enlargement is effective. The strength of the effect is controllable by the upper byte. A negative value reduces the stereo image. A strong spatial effect is recommended for small TV sets where loudspeaker spacing is rather close. For large screen TV sets, a more moderate spatial effect is recommended.

In mode B, only Stereo Basewidth Enlargement is effective. For mono input signals, the Pseudo Stereo Effect has to be switched on.

It is worth mentioning, that all spatial effects affect amplitude and phase response. With the lower 4 bits, the frequency response can be customized. A value of 0 function for L or R only signals. A value of 6 only signals, but a low-pass function for center signals. By using 8

yields a flat response for center signals (L = R), but a high-pass

hex

has a flat response for L or R

hex

, the fre-

hex

quency response is automatically adapted to the sound material by choosing an optimal high-pass gain.

Mute or Invert Loudspeaker D/A Output

bit[15:2] must be zero bit[1:0] 0

hex

no modification invert left channel of D/A output mute D/A ouput

MUT_INV_M

42 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 26

hex

00 27

hex

00 28

hex

00 34

hex

00 35

hex

00 36

hex

Function Name

Acoustical Compensation Filter Loudspeaker Channel:

C0_Main C1_Main C2_Main

ACF_M0 ACF_M1 ACF_M2

Acoustical Compensation Filter Headphone Left Channel (Center):

C0_Center C1_Center C2_Center

ACF_C0 ACF_C1 ACF_C2

These cells determine the coefficients of a second order filter for acoustical compensation of loudspeaker responses. The transfer function of this filter is

1–

× a2 z2–×++()

1–

b2 z2–×+××+()

Hz()

1 a0–2a× 1 z

----------------------------------------------------------------------------------

12b1 z

The transfer function must not have more than 0 dB gain. Micronas will supply a design tool for these coefficients. This feature is switched off by setting all coefficients to zero (reset state). A mute or fastmute operation should precede any change of these coefficients. The coefficients are two’s complement numbers ranging from [

−1.0...1.0 − 2

−9

C0:

bit[15:6] 10-bit coefficient a0 bit[5:3] 3 LSBs for coefficient b1 (together with 6 bit of c1, this forms a 9-bit

coefficient for b1)

bit[2:0] 3 LSBs for coefficient b2 (together with 6 bit of c2, this forms a 9-bit

coefficient for b2)

C1:

bit[15:6] 10-bit coefficient a1 bit[5:0] 6 MSBs for coefficient b1

C2:

bit[15:6] 10-bit coefficient a2 bit[5:0] 6 MSBs for coefficient b2

Micronas 43

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address SUBWOOFER OUTPUT CHANNEL

00 2C

hex

Subwoofer Level Adjustment

bit[15:8] 0C

hex

+12 dB

... 01 00 FF

hex hex

hex

+1 dB

−1dB

... E3 E2

hex hex

−29 dB

−30 dB

... 80

bit[7:0] 00

hex hex

Mute

must be zero

If MDB is added onto the main channel, this register should be set to 00

00 2D

hex

Subwoofer Corner Frequency

bit[15:8] 5...40 corner frequenc y in 10 Hz steps

(range: 50...400 Hz)

If MDB is active, SUBW_FREQ must be set to a value higher than the MDB Lowpass Frequency (MDB_LP). Choosing the corner frequency of the subwoofer closer to MDB_LP results in a narrower MDB frequency range. Recommended value:

1.5×MDB_LP

SUBW_LEVEL

0 dB (default)

hex

SUBW_FREQ

Subwoofer Complementary High-Pass Filter

bit[7:0] 00

hex hex

hex

MDB CONTROL REGISTERS

00 68

hex

MDB Effect Strength

bit[15:8] 00

bit[7:0] 00

hex hex

hex

The MDB effect strength can be adjusted in 1dB steps. A value of 44 a medium MDB effect.

00 69

hex

MDB Amplitude Limit

bit[15:8] 00

hex

... E0

hex

bit[7:0] 00

hex

The MDB Amplitude Limit defines the maximum allowed amplitude at the output of the MDB relative to 0 dbFS. If the amplitude exceeds MDB_LIM, the ga in of the MDB is automatically reduced. Note that the Volume Clipping Mode must be set to “dynamic” (see page 37).

loudspeaker channel unfilte re d a complementary high-pass is processed in the loudspeaker output channel

MDB added onto main channel

MDB OFF (default)

maximum MDB

must be zero

0 dBF S (default limitation )

−1dBFS

−32 dBFS

must be zero

hex

SUBW_HP

MDB_STR

will yield

MDB_LIM

44 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 6A

hex

00 6B

hex

Function Name

MDB Harmonic Content

bit[15:8] 00

bit[7:0] 00

no harmonics are added (default) 64 7F

hex hex hex

hex

50% fundamentals + 50% harmonics 100% harmonics

must be zero

MDB_HMC

MDB creates har moni cs of the fr equen cies below the MDB highp ass freq uency (MDB_HP). The variable MDB_HMC describes the ratio of the harmonics towards the original signal.

MDB Low Pass Corner Frequency

MDB_LP

bit[15:8] 5 50 Hz

660Hz ... 30 300 Hz

bit[7:0] 00

must be zero

hex

The MDB lowpass cor ner frequenc y (range 50... 300 Hz) defines the upper corner frequency of the MDB band pass filte r. Recommended values are the s ame as for the MDB highpass corner frequency (MDB_HP).

00 6C

MDB High Pass Corner Frequency

hex

bit[15:8] 2 20 Hz

330Hz ... 30 300 Hz

bit[7:0] 00

must be zero

hex

The MDB highpass cor ner freq uency d efines th e lower cor ner fr equency of the MDB bandpass filter. The highpass filter avoids loading the lou dspeakers with low frequency components that a re below the s peakers’ cut off fre quenc y. Recommended values for subwoofer systems are around 5 (=50 Hz), for regular TV sets around 10 (=100 Hz).

MDB_HP

Micronas 45

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address SCART OUTPUT CHANNEL

00 07 00 40

hex hex

Volume SCART1 Output Channel Volume SCART2 Output Channel

bit[15:8] volume table with 1 dB step size

hex

... 74

hex

... 02

hex

bit[7:5] higher resolution volume table

0 1 ... 7

bit[4:0] 01

hex

+12 dB (maximum volume) +11 dB

+1dB

0dB

−1dB

−113 dB

−114 dB

Mute (reset condition)

+0 dB +0.125 dB increase in addition to the volume table

+0.875 dB increase in addition to the volume table

this must be 01

hex

VOL_SCART1 VOL_SCART2

46 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address SCART SWITCHES AND DIGITAL I/O PINS

00 13

hex

ACB Register

Defines the level of the digital output pins and the position of the SCART switches

bit[15] 0/1 low/high of digital output pin D_CTR_I/O_1

(MODUS[3]=0)

bit[14] 0/1 low/high of digital output pin D_CTR_I/O_0

(MODUS[3]=0)

bit[13:5] SCART DSP Input Select

xxxx00xx0 SCART1 to DSP input (RESET position) xxxx01xx0 MONO to DSP input (Sound A Mono must be selected in

the channel matrix mode for the corresponding output channels)

xxxx10xx0 SCART2 to DSP input xxxx11xx0 SCART3 to DSP input xxxx00xx1 SCART4 to DSP input xxxx11xx1 mute DSP input

bit[13:5] SCART1 Output Select

xx00xxx0x SCART3 input to SCART1 output (RESET position) xx01xxx0x SCART2 input to SCART1 output xx10xxx0x MONO input to SCART1 output xx11xxx0x SCART1 DA to SCART1 output xx00xxx1x SCART2 DA to SCART1 output xx01xxx1x SCART1 input to SCART1 output xx10xxx1x SCART4 input to SCART1 output xx11xxx1x mute SCART1 output

ACB_REG

BEEPER

00 14

hex

bit[13:5] SCART2 Output Select

00xxxx0xx SCART1 DA to SCART2 output (RESET position) 01xxxx0xx SCART1 input to SCART2 output 10xxxx0xx MONO input to SCART2 output 00xxxx1xx SCART2 DA to SCART2 output 01xxxx1xx SCART2 input to SCART2 output 10xxxx1xx SCART3 input to SCART2 output 11xxxx1xx SCART4 input to SCART2 output 11xxxx0xx mute SCART2 output

The RESET position becomes active at the time of the first write transmission on the control bus to the audio processing part. By writing to the ACB register first, the RESET state can be redefined.

Beeper Volume and Frequency

bit[15:8] Beeper Volume

00 7F

hex hex

off maximum volume

bit[7:0] Beeper Frequency

01 40 FF

hex hex hex

16 Hz (lowest) 1kHz 4kHz

BEEPER

Micronas 47

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Function Name

Address SURROUND PROCESSING

00 48

hex

Output Configuration

bit[15] HP/CS Switch

0 Headphone outputs are active (pin names: DACA_L, 1 CS (Center/Surround) outputs are active (pin names:

The AUX/CS switch defines which output pin pair is driven by the D/A converters that are used for headphone or surround processing. The unselected pins are muted. This makes it convenient to connect the center/surround amplifiers or outputs to the MSP 34x2G without external switches. The Headphone/Surround channel should be muted before switching (set register 06 Allow at least 2 s for settling.

bit[14:8] Channel Configuration

hex

DACA_R), CS outputs are muted DACM_C, DACM_S), Aux outputs are muted (C corre-

sponds to Aux L, S to Aux R)

hex

to: 0000

hex

STEREO: This mode is used in plain stereo mode. Standard processing applies to the loudspeaker and headphone channels. Surround processing is switched off. In this mode, the IC is compatible to the MSP 3450G (if bit[15] is equal to 0). TWO_CHANNEL: This mode is used for virtual surround sound. The surround processing block is active and its left and right outputs are distributed to the loudspeaker output channel. The processing on the headphone channel remains standard. In this mode, the IC is comparable to the MSP 3451G. MULTI_CHANNEL: This mod e is use d for surround sound with more than 2 channels. The surround processing block is active and its left and right outputs are distributed to the loudspeaker output channel, its center and surround outputs are distributed to the headphone output channel. No headphone proce ssing is pos sibl e. In this mode , it i s conv enient to select the C/S pins by setting bit[15] to 1. MULTI_CHANNEL_CENTER: This mode is used for surround sound with more than 2 channels. The surround processing block is active and its left and right outputs are distributed to the loudspeaker output channel, its center and surround outputs are distributed to the headphone output channel. Just after the volume control, the center signal is distributed to the left and right loudspeaker outputs as well as to the center outputs. The left and right signals can be accessed via the feedback path to the source selector. No headphone processing is possible. In this mode, it is convenient to select the C/S pins by setting bit[15] to 1.

MA_CONF AUX_CS

CHAN_CONF

bit[7:0] Mode Tone control center channel

00 01

hex hex

Bass/treble for center channel (same setting as surround chan.) The center signal is processed with an equalizer using the same band setting as for the loudspeaker equalizer. The surround channel is processed with bass/treble. This mode is only allowed in channel configurations 2 and 3.

48 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 49

hex

00 4A

hex

Function Name

Spatial Effects for Surround Processing

SUR_SPAT

bit[15:8] Spatial Effect Strength

7F 3F

hex hex

Enlargement 100%

Enlargement 50% ... 01 00

bit[7:0] 00

hex hex

hex

Enlargement 1.5%

Effect off

must be 0

Increases the perceived basewidth of the reproduced left and right front channels. Recommended value: 50% = 40

. In contrast to the spatial effect for the

hex

loudspeaker channel, the surround spatial effect is optimized for surround sound. Note: If surround sound processing is active, the spatial effect for the loudspeaker channel (Registe r 05

Virtual Surround Effect Strength

) is switched off.

hex

SUR_3DEFF

bit[15:8] Virtual Surround Effect Strength

7F 3F

hex hex

Effect 100%

Effect 50% ...

01 00

bit[7:0] 00

hex hex

hex

Effect 1.5%

Effect off

must be 0

Strength of the surround effect in PANORAMA or 3D-PANORAMA mode. In other Surround Reproduction Modes this value must be set to 0. Recommended value: 66% = 54

hex

Micronas 49

MSP 34x2G PRELIMINARY DATA SHEET

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

00 4B

hex

Function Name

Surround Processing Mode

bit[15:8] Decoder Matrix

hex

ADAPTIVE (for all Dolby Surround Pro Logic and Virtual

SUR_MODE DEC_MAT

Surround modes) 10 20

hex hex

PASSIVE (for simple surround modes)

EFFECT (used for special effects and monophonic

signals)

bit[7:4] Surround Reproduc tio n

hex

REAR_SPEAKER: The surround signal is reproduced by

SUR_REPRO

a rear speaker. 3

hex

FRONT_SPEAKER: The surround signal is redirected to

the front channels. There is no physical rear speaker con-

nected. 5

hex

PANORAMA: The surround signal is processed and redi-

rected to the left and right front speakers in order to create

the illusion of a virtual rear speaker, although no physical

rear speaker is connected. 6

hex

3D-PANORAMA: The surround signal is processed and

redirected to the left and right front speakers in order to

create the illusion of a virtual rear speaker, although no

physical rear speaker is connected.

bit[3:0] Center Mode

C_MODE

00 4C

00 4D

hex

PHANTOM mode (no Center speaker connected)

NORMAL mode (small Center speaker)

WIDE mode (large Center speaker)

OFF mode (Center output of the Surround Decoder is

discarded. Useful only in special effect modes)

Surround Delay

bit[15:8] 05

hex hex

5 ms delay in surround path (lowest)

6 ms delay in surround path ... 1F

bit[7:0] 00

hex hex

31 ms delay in surround path (highest))

must be 0

For Dolby Surround Pro Logic designs, only 20 ms fixed or 15-30 ms variable delay must be used. This register has no effect in 3D-PANORAMA and PANORAMA mode.

Noise Generator

bit[15:8] 00

bit[7:0] A0

B0 C0 D0

hex hex

hex hex hex hex

Noise generator off

Noise generator on

Noise on left channel

Noise on center channel

Noise on right channel

Noise on surround channel

Determines the active channel for the noise generator.

SUR_DELAY

SUR_NOISE

50 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.3.2.7. Read Registers on I2C Subaddress 13

hex

Table 3–12: Read Registers on I2C Subaddress 13

Function Name

Address QUASI-PEAK DETECTOR READOUT

00 19 00 1A

hex

Quasi-Peak Detector Readout Left Quasi-Peak Detector Readout Right

hex

bit[15:0] 0

... 7FFF

hex

values are 16 bit two’s complement (only positive)

hex

MSP 34x2G VERSION READOUT Registers

00 1E

MSP Hardware Version Code

hex

bit[15:8] 01

hex

MSP 3 452 G - A2

A change in the hardware version code defines hardware optimizations that may have influence on the chip’s behavior. The readout of this register is identical to the hardware version code in the chip’s imprint.

MSP Major Revision Code

bit[7:0] 07

hex

MSP 3452G - A2

The major revision code of the MSP 3452G is 7.

hex

QPEAK_L QPEAK_R

MSP_HARD

MSP_REVISION

00 1F

hex

MSP Product Code

bit[15:8] 34

hex

MSP 3452G - A2

By means of the MSP-Product Code, the control processor is able to decide which TV sound standards and audio baseband features have to be considered.

MSP ROM Version Code

bit[7:0] 42

hex

MSP 3 452 G - A2

A change in the ROM version code defines internal software optimizations, that may have influence on the chip’s behavior, e.g. new features may have been included. While a software change is intended to create no compatibility problems, customers that want to use the new functions can identify new MSP 3452G versions according to this number.

To avoid compatibility problems with MSP 3410B and MSP 34x0D, an offset of

is added to the ROM version code of the chip’s imprint.

hex

MSP_PRODUCT

MSP_ROM

Micronas 51

MSP 34x2G PRELIMINARY DATA SHEET

3.4. Programming Tips

This section desc ribes the pr eferred method for initializing the MSP 34x2G. The initialization is grou ped int o four sections:

– SCART Signal Path (analog signal path) – Demodulator Input – SCART and I

S Inputs

– Output Channels See Fig. 2–1 on page 9 for a complete signal flow.

SCART Signal Path

1. Select analog input for the SCART baseband processing (SCART DSP Input Select) by means of the ACB register.

2. Select the source for each analog SCART output (SCART Output Select) by means of the ACB register.

Demodulator Input

For a complete setup of the TV sound processing from analog IF input to the source selection, the following steps must be performed:

1. Set MODUS register to the preferred mode and Sound IF input.

2. Choose preferred prescale (FM and NICAM) values.

3. Write STANDARD SELECT register.

4. If Automatic Sound Select is not active: Choose FM matrix repeatedly according to the sound mode indicated in the STATUS register.

SCART and I

S Inputs

1. Select preferred prescale for S CART.

2. Select preferred prescale for I

S inputs

(set to 0 dB after RESET).

Output Channels

1. Select the source channel and matrix for each output channel.

2. Set audio baseband processing.

3. Select volume for each output channel.

3.5. Examples of Minimum Initialization Codes

Initialization of the MSP 34x2G according to these listings reproduces sound of the selected standard on the loudspeaker output. All numbers are hexadecimal. The examples have the following structure:

1. Perform an I

C controlled reset of the IC.

2. Write MODUS register (with Automatic Sound Select).

3. Set Source Selection for loudspeaker channel (with matrix set to STEREO).

4. Set Prescale (FM and/or NICAM and dummy FM matrix).

5. Write STAN DARD SELECT registe r.

6. Set Volume loudspeaker channel to 0 dB.

3.5.1. SCART1 Input to Loudspeaker in

Stereo Sound

<80008000> // reset <80000000> <80 12 00 08 02 20> // source loudspeaker = scart, stereo <80 12 00 0d 19 00> // prescale scart <80 12 00 00 73 00> // volume main = 0dB

3.5.2. B/G-FM (A2 or NICAM)

<80008000> // Softreset <80000000> <801000302003> // MODUS-Regist er: Automatic = on <801200080320> // So u rce Sel. = (St or A) & C h . Ma t r. = St

hex

<8012000E2403> // FM/AM-Prescale = 24

FM-Matrix = MO NO/SOUND A

<801200105A00> // NICAM-Prescale = <801000200003> // Standard Select: A2 B/G or NICAM B/G

<801000200008> <801200007300> // Loudspeaker Volume 0 dB

3.5.3. BTSC-Stereo

<80008000> // Softreset <80000000> <801000302003> // MODUS-Regist er: Automatic = on <801200080320> // So u rce Sel. = (St or A) & C h . Ma t r. = St <8012000E2403> // FM/AM-Prescale = 24

FM-Matrix = Sound A Mono

<801000200020> // Standard Select: BTSC-STEREO <801200007300> // Loudspeaker Volume 0 dB

hex

52 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

3.5.4. BTSC-SAP with SAP at Loudspeaker Channel

<80008000> // Softreset <80000000> <801000302003> // MODUS-Register: Automatic = on <801200080420> // Source Sel. = (St or B) & Ch. Matr. = St <8012000E2403> // FM/AM-Prescale = 24

FM-Matrix = Sound A Mono

<801000200021> // Standard Select: BT SC -SAP <801200007300> // Loudspeaker Volume 0 dB

hex

3.5.5. FM-Stereo Radio

<80008000> // Softreset <80000000> <801000302003> // MODUS-Register: Automatic = on <801200080320> // Source Sel. = (St or A) & Ch. Matr. = St <8012000E2403> // FM/AM-Prescale = 24

FM-Matrix = Sound A Mono

<801000200040> // Standard Select: FM-S TE REO-RADIO <801200007300> // Loudspeaker Volume 0 dB

hex

3.5.6. Automatic Standard Detection

A detailed software f low diagram is shown in Fi g. 3–2 on page 54.

<80008000> // Softreset <80000000> <801000302003> // MODUS-Register: Automatic = on <801200080320> // Source Sel. = (St or A) & Ch. Matr. = St

hex

≤ 07FF

<8012000E2403> // FM/AM-Prescale = 24

FM-Matrix = Sound A Mono

<801200105A00> // NICAM-Prescale = <801000200001> // Standard Select:

Automatic Standard Detection // Wait till STANDARD RESULT contains a value // IF STANDARD RESULT contains 0000

// do some error handling

// ELSE

<801200007300> // Loudspeaker Volume 0 dB

<80 12 00 4b 00 01> // Dolby Surround Pro Logic Normal mode <80 12 00 4c 14 00> // 20 ms Delay <80 12 00 4d 00 00> // Noise Sequencer = off

3.5.8. Virtual Dolby Surround Example

SCART1 Input to Loudspeaker in 3D-PANORAMA Sound

<80 00 80 00> // reset <80 00 00 00> <80 12 00 08 02 20> // source loudspeaker = scar t, stereo <80 12 00 0d 12 00> // prescale scart with some loss <80 12 00 00 73 00> // volume main = 0 dB <80 12 00 48 01 00> // two channel virtual surround mode <80 12 00 49 40 00> // Surround spatial effect = 50% <80 12 00 4a 54 00> // panorama sound effect = 66% <80 12 00 4b 00 60> // adaptive, 3d_panorama, phantom <80 12 00 4d 00 00> // Noise Sequencer = off

3.5.9. Noise Sequencer for Dolby Pro Logic

// switch into Dolby Pro Logic sound (s.a.). Then: <80 12 00 4d 80 a0> // noise L [wait for 2 seconds] <80 12 00 4d 80 b0> // noise C [wait for 2 seconds] <80 12 00 4d 80 c0> // noise R [wait for 2 seconds] <80 12 00 4d 80 d0> // noise S [wait for 2 seconds] // switch back to normal operation <80 12 00 4d 00 00> // Noise Sequencer = off

3.5.10. Software Flow for Interrupt driven STATUS Check

A detailed software flow diagram is shown in Fig. 3–2 on page 54.

If the D_CTR_I/O_1 pin of the MSP 34x2G is con-

3.5.7. Dolby Surround Pro Logic Example

nected to an interrupt input pin of the controller, the following interrupt handler can be applied to be automati-

SCART1 Input to Loudspeaker and Center/Surround Output Pins in Dolby Surround Pro Logic (Normal mode).

<80 00 80 00> // reset <80 00 00 00> <80 12 00 08 02 20> // source loudspeaker = scart , stereo <80 12 00 0d 19 00> // prescale scart <80 12 00 00 70 00> // volume main = <80 12 00 06 73 00> // volume center/surround = 0 dB <80 12 00 48 82 00> // multi channel mode with C/S outputs

used

<80 12 00 49 00 00> // Surround spatial effect = 0% <80 12 00 4a 00 00> // panorama sound effect = off

−3dB

cally called with each status change of the MSP 34x2G. The interrupt handler may adjust the TV display according to the new status information.

Interrupt Handler: <80 11 02 00 <81 dd dd> // Read STATUS // adjust TV display with given status information // Return from Interrupt

Micronas 53

MSP 34x2G PRELIMINARY DATA SHEET

:ULWH02'865HJLVWHU

([DPSOH >@ $XWRPDWLF6RXQG6HOHFW RQ

[1] = 1 Enable interrupt if STATUS changes [8] = 0 ANA_IN1+ is selected Define Preference for Automatic Standard Detection: [12] = 0 If 6.5 MHz, set SECAM-L [14:13] = 3 Ignore 4.5 MHz carrier

for the essential bits:

:ULWH6285&(6(/(&76HWWLQJV

([DPSOH

set loudspeaker Source Select to "Stereo or A" set headphone Source Select to "Stereo or B" set SCART_Out Source Select to "Stereo or A/B"

set Channel Matrix mode for all outputs to "Stereo"

Write FM/AM-Prescale Write NICAM-Prescale

set previous standard or

set standard manually according

picture information

,QFDVHRILQWHUUXSWIURP

063WR&RQWUROOHU

:ULWHLQWR

67$1'$5'6(/(&75HJLVWHU

(Start Automatic Standard Detection)

yes

Result = 0

expecting MSPG-interrupt

Read STATUS

Adjust TV-Display

If Bilingual, adjust Source Select setting if required

Fig. 3–2: Software flow diagram for a Minimum demodulator setup for a European Multistandard TV set applying the Automatic Sound Select feature

54 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4. Specifications

4.1. Outline Dimensions

0.15±

17.2

0.15±

23.2

Fig. 4–1:

80-Pin Plastic Quad Flat Pack

(PQFP80)

Weight approximately 1.61 g Dimensions in mm

3348

0.2±

1.75

116

1.75 12

0.2±

4164

241

0.145

1.5

0.04±

0.17

0.5

0.1±

0.5

0.1±

0.04±

0.37

0.05±

1.3

±0.2

0.055±

0.1±

0.05±

0.22

0.05±

1.4

0.1

0.1±

2.7

0.1

15 x 0.5 = 7.5

23 x 0.8 = 18.4

0.8

0.1±

15 x 0.5 = 7.5

0.1±

0.8

15 x 0.8 = 12.0

0.1±

SPGS705000-3(P80)/1E

D0025/3E

Fig. 4–2:

64-Pin Plastic Low-Profile Quad Flat Pack

(PLQFP64)

Weight approximately 0.35 g Dimensions in mm

Micronas 55

MSP 34x2G PRELIMINARY DATA SHEET

132

3364

57.7

±0.1

0.8

±0.2

3.8

±0.1

3.2

±0.2

1.778

±0.05

31 x 1.778 = 55.1

±0.1

0.48

±0.06

20.3

±0.5

0.28

±0.06

±0.05

19.3

±0.1

SPGS703000-1(P64)/1E

Fig. 4–3:

64-Pin Plastic Shrink Dual-Inline Package

(PSDIP64)

Weight approximately 9.0 g Dimensions in mm

4.2. Pin Connections and Short Descriptions

NC = not connected; leave vacant LV = if not used, leave vacant X = obligatory; connect as described in circuit diagram DVSS: if not used, connect to DVSS AHVSS: connect to AHVSS

PQFP 80-pin

Pin No. Pin Name Type Connection

PLQFP 64-pin

PSDIP 64-pin

(if not used)

Short Description

1 64 8 NC LV Not connected 219I2C_CL IN/OUTX I 3210I2C_DA IN/OUTX I 4 3 11 I2S_CL IN/OUT LV I 5 4 12 I2S_WS IN/OUT LV I 6 5 13 I2S_DA_OUT OUT LV I 7 6 14 I2S_DA_IN1 IN LV I

C clock

C data

S clock

S word strobe

S data output

S1 data input 8 7 15 ADR_DA OUT LV ADR data output 9 8 16 ADR_WS OUT LV ADR word strobe 10 9 17 ADR_CL OUT LV ADR clock 11 12 13 10 18 DVSUP X Digital power supply 5 V

56 Micronas

−−DVSUP X Digital power supply 5 V

PRELIMINARY DATA SHEET MSP 34x2G

PQFP 80-pin

Pin No. Pin Name Type Connection

PLQFP 64-pin

PSDIP 64-pin

(if not used)

Short Description

14 −−DVSS X Digital ground 15

−−DVSS X Digital ground

16 11 19 DVSS X Digital ground 17 12 20 I2S_DA_IN2 IN LV I

S2-data input 18 13 21 NC LV Not connected 19 14 22 NC LV Not connected 20 15 23 NC LV Not connected 21 16 24 RESETQ IN X Power-on-reset 22 23

−−NC LV Not connected

24 17 25 DACA_R OUT LV Headphone out, right 25 18 26 DACA_L OUT LV Headphone out, left 26 19 27 VREF2 X Reference ground 2 27 20 28 DACM_R OUT LV Loudspeaker out, right 28 21 29 DACM_L OUT LV Loudspeaker out, left 29 22 30 DACM_C OUT LV Center output 30 23 31 DACM_SUB OUT LV Subwoofer output 31 24 32 DACM_S OUT LV Surround output 32

−−NC LV Not connected

33 25 33 SC2_OUT_R OUT LV SCART output 2, right 34 26 34 SC2_OUT_L OUT LV SCART output 2, left 35 27 35 VREF1 X Reference ground 1 36 28 36 SC1_OUT_R OUT LV SCART output 1, right 37 29 37 SC1_OUT_L OUT LV SCART output 1, left 38 30 38 CAPL _A X Volum e cap acito r AUX 39 31 39 AHVSUP X Analog power supply 8 V 40 32 40 CAPL _M X Volume cap acito r MAIN 41 42 43

−−NC LV Not connected

−−AHVSS X Analog ground

44 33 41 AHVSS X Analog ground

Micronas 57

MSP 34x2G PRELIMINARY DATA SHEET

PQFP 80-pin

Pin No. Pin Name Type Connection

PLQFP 64-pin

PSDIP 64-pin

(if not used)

Short Description

45 34 42 AGNDC X Analog reference

voltage

−−NC LV or AHVSS Not connected

47 35 43 SC4_IN_L IN LV SCART 4 input, left 48 36 44 SC4_IN_R IN LV SCART 4 input, right 49 37 45 ASG AHVSS Analog Shield Ground 50 38 46 SC3_IN_L IN LV SCART 3 input, left 51 39 47 SC3_IN_R IN LV SCART 3 input, right 52 40 48 ASG AHVSS Analog Shield Ground 53 41 49 SC2_IN_L IN LV SCART 2 input, left 54 42 50 SC2_IN_R IN LV SCART 2 input, right 55 43 51 ASG AHVSS Analog Shield Ground 56 44 52 SC1_IN_L IN LV SCART 1 input, left 57 45 53 SC1_IN_R IN LV SCART 1 input, right 58 46 54 VREFTOP X Reference voltage IF

A/D converter

−−NC LV Not connected

60 47 55 MONO_IN IN LV Mono input 61

−−AVSS X Analog ground

62 48 56 AVSS X Analog ground 63 64 65

−−NC LV Not connected

−−AVSUP X Analog power supply 5 V

66 49 57 AVSUP X Analog power supply 5 V 67 50 58 ANA_IN1 68 51 59 ANA_IN

+ IN LV IF input 1

− IN AVSS via 56 pF /

IF common (c an be le ft vacant,

only if IF input 1 is also not in use)

69 52 60 ANA_IN2+ IN AVSS via 56 pF / LVIF input 2 (can be left vacan t,

only if IF input 1 is also not in use)

70 53 61 TESTEN IN X Test pin 71 54 62 XTAL_IN IN X Crystal oscillator 72 55 63 XT AL_OUT OUT X Crystal oscillator

58 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

PQFP 80-pin

Pin No. Pin Name Type Connection

PLQFP 64-pin

PSDIP 64-pin

(if not used)

Short Description

73 56 64 TP LV Test pin 74 57 1 AUD_CL_OUT OUT LV Audio clock output

(18.432 MHz) 75 58 2 NC LV Not connected 76 59 3 NC LV Not connected 77 60 4 D_CTR_I/O_1 IN/OUT LV D_CTR_I/O_1 78 61 5 D_CTR_I/O_0 IN/OUT LV D_CTR_I/O_0

79 62 6 ADR_SEL IN X I

C Bus address select

80 63 7 STANDBYQ IN X Stand-by (low-active)

4.3. Pin Descriptions

Pin numbers refer to the PQFP80 package.

Pin 9, ADR_WS – ADR Bus Word Strobe Output (Fig. 4–17)

Pin 1, NC – Pin not connected.

Word strobe output for the ADR bus.

Pin 2, I2C_CL – I Via this pin, the I

C Clock Input/Output (Fig. 4–12)

C-bus clock signal has to be supplied. The signal can be pulled down by the MSP in case of wait conditions.

Pin 3, I2C_DA – I Via this pin, the I

C Data Input/Output (Fig. 4–12)

C-bus data is written to or read from

the MSP.

Pin 4, I2S_CL – I Clock line for the I driven by the MSP; in slave mode, an external I

S Clock Input/Output (Fig. 4–13)

S bus. In master mode, this line is

clock has to be supplied. Pin 5, I2S_WS – I

(Fig. 4–13) Word strobe line for the I line is driven by the MSP; in slave mode, an external

S word strobe has to be supplied.

Pin 6, I2S_DA_OUT – I Output of digital seri al sound data of the MSP on the

S bus.

I Pin 7, I2S_DA_IN1 – I

First input of digital se rial sound data to the MSP via

S bus.

the I

S Word Strobe Input/Output

S bus. In master mode, this

S Data Output (Fig. 4–17)

S Data Input 1 (Fig. 4–9)

Pin 8, ADR_DA – ADR Bus Data Output (Fig. 4 –17) Output of digital ser ial data to the DRP 3510A via the ADR bus.

Pin 10, ADR_CL – ADR Bus Clock Output (Fig. 4–17) Clock line for the ADR bus.

Pins 11, 12, 13, DVSUP* – Digital Supply Voltage Power supply for the digital circuitry of the MSP. Must be connected to a

+5V power supply.

Pins 14, 15, 16, DVSS* – Digital Ground Ground connection for the digital circuitry of the MSP.

Pin 17, I2S_DA_IN2 – I

Second input of digit al serial sound data to the MSP via the I

S bus.

S Data Input 2 (Fig. 4 –9)

Pins 18, 19, 20, NC – Pins not connected. Pin 21, RESETQ – Reset Input (Fig. 4–9)

In the steady state, high level is required. A low level resets the MSP 34x2G.

Pins 22, 23, NC – Pins not connect ed. Pins 24, 25, DACA_R/L – Headphone Outputs

(Fig. 4–15) Output of the headphone signal. A 1-nF capacitor to AHVSS must be conn ected to t hese pins. The D C offset on these pins de pen ds on t he sel ec ted head pho ne volume.

Micronas 59

MSP 34x2G PRELIMINARY DATA SHEET

Pin 26, VREF2 – Reference Ground 2 Reference analog ground. Thi s pin must be connected separately to the single ground point (AHVSS). VREF2 serves as a clean grou nd and should be used as the reference for analog connections to the loudspeaker and headphone outputs.

Pins 27, 28, DACM_R/L – Loudspeaker Outputs (Fig. 4–15) Output of the loudspeaker signal . A 1-nF capacitor to AHVSS must be co nnected to these pi ns. The DC offset on these pins depends on the selected loudspeaker volume.

Pin 29, DACM_C - Center Output (Fig. 4–15) Output of the center loudspeaker signal. A 1-nF capacitor to AHVSS must be connected to these pins. If active (HP/CS = 1), the DC offset on these pins depends on the selected headphone volume.

Pin 30, DACM_SUB – Subwoofer Output (Fig. 4–15) Output of the subwoofer signal. A 1-nF capacitor to AHVSS must be co nnected to this pin. Due to the l ow frequency content of the subwoofer output, the value of the capacitor may be increased for better suppression of high-frequency no is e. The DC offset on thi s pi n depends on the selected loudspeaker volume.

Pins 31, DACM_S - Surround Output (Fig. 4–15) Output of the surround loudspeaker signal. A 1-nF capacitor to AHVSS must be connected to the se pins. If active (HP/CS = 1), the DC offset on these pins depends on the selected headphone volume.

Pin 32 NC – Pin not connected. Pins 33, 34, SC2_OUT_R/L – SCART2 Outputs

(Fig. 4–16) Output of the SCART2 signal. Connections to these pins must use a 100to be AC-coupled.

Ω series resistor and are intended

Pin 38, CAPL_A – Volume Capacitor Headphone (Fig. 4–18)

µF capacitor to A HVSUP must be connected to

A 10this pin. It se rves as a smoot hing filter for headphone volume changes in order to suppress audible plops. The value of the capac itor can be lowered to 1faster response is req uired. The area e ncircled by the trace lines should be minimized; keep traces as short as possible. This input is sens itive for magnetic induction.

Pin 39, AHVSUP* – Analog Power Supply High Volt- age Power is supplied via this pin for the analo g c irc uit ry of the MSP (except IF input). This pin must be conne cte d

+8 V su ppl y.

to the Pin 40, CAPL_M – Volume Capacitor Loudspeaker

(Fig. 4–18)

µF capacitor to A HVSUP must be connected to

A 10this pin. It se r ves as a s moothi ng fi lter for loudspeaker volume changes in order to suppress audible plops. The value of the capacitor can be lowered to 1 faster response is req uired. The area e ncircled by the trace lines should be minimized; keep traces as short as possible. This input is sens itive for magnetic induction.

Pins 41, 42, NC – Pins not connected. Pins 43, 44, AHVSS* – Ground for Analog Power Sup-

ply High Voltage Ground connection for the analog circuitr y o f the MS P (except IF input).

Pin 45, AGNDC – Internal Analog Reference Voltage This pin ser ves as the internal ground c onnection for the analog circuitr y (except IF input). It must be connected to the VREF pins with a 3.3capacitor in parallel. This pins shows a DC level of typically 3.73 V.

Pin 46, NC – Pin not connected.

µF and a 100-nF

µF if

Pin 35, VREF1 – Reference Ground 1 Reference analog ground. Thi s pin must be connected separately to the single ground point (AHVSS). VREF1 serves as a clean grou nd and should be used as the reference for analog connections to the SCART outputs.

Pins 36, 37, SC1_OUT_R/L – SCART1 Outputs (Fig. 4–16) Output of the SCART1 signal. Connections to these pins must use a 100to be AC-coupled.

60 Micronas

Ω series resistor and are intended

Pins 47, 48, SC4_IN_L/R – SCART4 Inputs (Fig. 4–8) The analog input sign al for SCART4 is fed to this pin. Analog input connection must be AC-coupled.

Pin 49, ASG – Analog Shield Ground Analog ground (AHVSS) should be connected to this pin to reduce cross-coupling between SCART inputs.

Pins 50, 51, SC3_IN_L/R – SCART3 Inputs (Fig. 4–8) The analog input sign al for SCART3 is fed to this pin. Analog input connection must be AC-coupled.

Pin 52, ASG – Analog Shield Ground Analog ground (AHVSS) should be connected to this pin to reduce cross-coupling between SCART inputs.

PRELIMINARY DATA SHEET MSP 34x2G

Pins 53, 54 SC2_IN_L/R – SCART2 Inputs (Fig. 4–8) The analog input s ignal for SCART2 is fed to this pin. Analog input connection must be AC-coupled.

Pin 55, ASG – Analog Shield Ground Analog ground (AHVSS) should be connected to this pin to reduce cross-coupling between SCART inputs.

Pins 56, 57 SC1_IN_L/R – SCART1 Inputs (Fig. 4–8) The analog input s ignal for SCART1 is fed to this pin. Analog input connection must be AC-coupled.

Pin 58, VREFTOP – Reference Voltage IF A/D Con- ver ter (Fig. 4–10) Via this pin, the reference voltage for the IF A/D converter is decoupled. It must be connected to AVSS pins with a 10-

µF and a 100-nF cap acitor in parallel.

Traces must be kept short. Pin 59, NC – Pin not connected. Pin 60 MONO_IN – Mono Input (Fig. 4–8)

The analog mono inp ut si gnal i s fed to this p in . An al og input connection must be AC-coupled.

Pins 61, 62, AVSS* – Ground for Analog Power Supply Voltage Ground connection for the analo g IF input circuitry of the MSP.

Pins 63, 64, NC – Pins not connected. Pins 65, 66, AVSUP* – Analog Power Supply Voltage

Power is supplied via this pin for the analog IF input circuitry of the MSP. This pin must be connected to the

+5 V supply.

Pin 67, ANA_IN1

+ – IF Input 1 (Fig. 4–10)

The analog sound IF signal is supplied to this pin. Inputs must be AC-coupled. This pin is designed as symmetrical input: ANA_IN1

+ is internally connected

to one input of a symmetri cal op amp, ANA_IN- to the other.

Pin 68, ANA_IN

− – IF Common (Fig. 4–10)

This pins serves as a common reference for ANA_IN1/

+ inputs.

2 Pin 69, ANA_IN2

+ – IF Input 2 (Fig. 4–10)

The analog sound if signal is supplied to this pin. Inputs must be AC-coupled. This pin is designed as symmetrical input: ANA_IN2 to one input of a symm etri cal o p amp, ANA_IN

+ is internally connected

− to the

other. Pin 70, TESTEN – Test Enable Pin (Fig. 4–9)

This pin enables factory test modes. For normal operation, it must be connected to ground.

Pins 71, 72 XTAL_IN, XTAL_OUT – Cr ystal Input and Output Pins (Fig. 4–14) These pins are connected to an 18.432 MHz crystal oscillator which is digitally tuned by integrated shunt capacitances. An external clock can be fed into XTAL_IN. The audio clock output signal AUD_CL_OUT is derived from the oscillator. External capacitors at each crystal pin to ground (AVSS) are required. It should be verified by layout, that no supply current for the digital circuitr y is flowing through the grou nd connection point.

Pin 73, TP – This pin enables factory t est modes. For normal operation, it must be left vacant.

Pin 74, AUD_CL_OUT – Audio Clock Output (Fig. 4–14) This is the 18.432 MHz main clock output.

Pins 75, 76, NC – Pins not connected. Pins 77, 78, D_CTR_I/O_1/0 – Digital Control Input/

Output Pins (Fig. 4–13) These pins serve as general purpose input/output pins. Pin D_CTR_I/O_1 can be used as an interrupt request pin to the controller.

Pin 79, ADR_SEL – I

C Bus Address Select (Fig. 4–11) By means of this pin, one of three device addresses for the MSP can be selected. The pin can be connected to ground (I ply (84/85

C device addresses 80/81

), or left open (88/89

hex

), to +5V sup-

hex

Pin 80, STANDBYQ – Stand-by In normal operation, this pin must be High. If the MSP 34x2G is switched off by first pulling STANDBYQ low and then (after >1

µs delay) switching off the 5 V,

but keeping the 8-V power supply (‘Stand-by’-mode), the SCART switches maintain their posi tion and function.

* Application Note:

All ground pins shou ld be conne cted to on e low-resistive ground plane. All supply pins should be conn ec ted separately with short and low-resistive lines to the power supply. Decoupling capacitors from DVSUP to DVSS, AVSUP to AVSS, and AHVSUP to AHVSS are recommended as closely as possible to these pins. Decoupling of DVSUP and DVSS is most important. We recommend using more than one capacitor. By choosing different values, the frequency range of active decoupling can be extended. In our application boards we use: 220 pF, 470 pF, 1.5 nF, and 10

µF. The

capacitor with the lowest value should be plac ed nearest to the DVSUP and DVSS pins.

The ASG pins s ho u ld be c on nec ted a s cl osel y as p os sible to the MSP ground. If they are lead with the SCART-inputs as shielding lines, they should not be connected to ground at the SCART connector.

Micronas 61

MSP 34x2G PRELIMINARY DATA SHEET

4.4. Pin Configurations

SC2_IN_L ASG

AVSUP AVSUP

ANA_IN1+

ANA_IN−

ANA_IN2+

TESTEN

XTAL_IN

XTAL_OUT

AUD_CL_OUT

NC D_CTR_I/O_1 D_CTR_I/O_0

ADR_SEL

STANDBYQ

SC2_IN_R

ASG

SC1_IN_L

SC1_IN_R

VREFTOP

MONO_IN

AVSS

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

65 66 67 68 69 70 71 72 73

74 75 76 77 78 79 80

1 2 3 4 5 6 7 8 9 101112131415161718192021222324

MSP 34x2G

SC3_IN_R

SC3_IN_L

ASG

SC4_IN_R

SC4_IN_L

AGNDC

AHVSS

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25

CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R NC DACM_S DACM_SUB DACM_C DACM_L DACM_R VREF2 DACA_L

NC I2C_CL

I2C_DA

I2S_CL

I2S_WS

I2S_DA_OUT

I2S_DA_IN1

ADR_DA

ADR_WS

Fig. 4–4: P QFP 80 package

ADR_CL

DVSUP

DVSUP DVSUP

DACA_R

RESETQ

I2S_DA_IN2

DVSS

62 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

AVSUP

ANA_IN1+

ANA_IN−

ANA_IN2+

TESTEN

XTAL_IN

XTAL_OUT

AUD_CL_OUT

NC D_CTR_I/O1 D_CTR_I/O0

ADR_SEL

STANDBYQ

SC2_IN_L

SC2_IN_R

ASG

SC1_IN_L

SC1_IN_R

VREFTOP

MONO_IN

AVSS

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

49 50 51 52 53 54 55

56 57 58 59 60 61 62 63 64

12345678910111213141516

MSP 34x2G

ASG

SC3_IN_R

SC3_IN_L

ASG

SC4_IN_R

SC4_IN_L

AGNDC

AHVSS

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R DACM_S DACM_SUB DACM_C DACM_L DACM_R VREF2 DACA_L DACA_R

I2C_CL

I2C_DA

I2S_CL

I2S_WS

I2S_DA_OUT

I2S_DA_IN1

ADR_DA

ADR_WS

Fig. 4–5: PLQFP64 package

RESETQ

I2S_DA_IN2

DVSS

DVSUP

ADR_CL

Micronas 63

MSP 34x2G PRELIMINARY DATA SHEET

1AUD_CL_OUT 2NC 3NC 4D_CTR_I/O_1 5D_CTR_I/O_0 6ADR_SEL 7STANDBYQ 8NC 9I2C_CL 10I2C_DA 11I2S_CL 12I2S_WS 13I2S_DA_OUT 14I2S_DA_IN1 15ADR_DA 16ADR_WS

TP64 XTAL_OUT63 XTAL_IN62 TESTEN61 ANA_IN2+60 ANA_IN−59 ANA_IN+58 AVSUP57 AVSS56 MONO_IN55 VREFTOP54 SC1_IN_R53 SC1_IN_L52 ASG51 SC2_IN_R50

SC2_IN_L49 17ADR_CL 18DVSUP 19DVSS 20I2S_DA_IN2 21NC 22NC 23NC 24RESETQ 25DACA_R 26DACA_L

ASG48

SC3_IN_R47

SC3_IN_L46

ASG45

SC4_IN_R44

SC4_IN_L43

AGNDC42

AHVSS41

CAPL_M40

AHVSUP39

MSP 34x2G

VREF2

DACM_R

DACM_L

DACM_C

DACM_SUB

DACM_S

38 37 36 35 34 33

27 28 29 30 31 32

CAPL_A

SC1_OUT_L

SC1_OUT_R

VREF1

SC2_OUT_L

SC2_OUT_R

Fig. 4–6: PSDIP64 package

64 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.5. Pin Circuits

24 k

Ω

≈ 3.75 V

GND

Fig. 4–7: Input Pin: MONO_IN

Fig. 4–12: Input/Output Pins: I2C_CL, I2C_DA

Ω

40 k

≈ 3.75 V

DVSUP

Fig. 4–8: Input Pins: SC4-1_IN_L/R

Fig. 4–9: Input Pins: I2S_DA_IN1, I2S_DA_IN2, RESETQ, TESTEN, STANDBYQ

ANA_IN1+ ANA_IN2+

ANA_IN

−

VREFTOP

GND

Fig. 4–13: Input/Output Pins: I2S_CL, I2S_WS, D_CTR_I/O_1, D_CTR_I/O_0

Ω

3−30 pF

500 k

2.5 V

Fig. 4–14: Input/Output Pins: XTAL_IN, XTAL_OUT, AUD_CL_OUT

Fig. 4–10: Input Pins 58, 67, 68, and 69: VREFTOP, ANA_IN1

+, ANA_IN-, ANA_IN2+

DVSUP

23 kΩ

GND

ADR_SEL Fig. 4–11: Input Pin: ADR_SEL

Micronas 65

MSP 34x2G PRELIMINARY DATA SHEET

AHVSUP

0...1.2 mA

3.3 k

Ω

26 pF

120 k

Ω

300 Ω

≈

3.75 V

DVSUP

GND

0...2 V

≈ 3.75 V

125 k

Ω

Fig. 4–15: O ut put Pi ns : DACA_R/L, DACM_R/L, DACM_SUB, DACM_C/S

Fig. 4–16: O ut put Pi ns : SC_2_OUT_R/L, SC_1_OUT_R/L

Fig. 4–17: O ut put Pi ns : I2S_DA_OUT, ADR_DA, ADR_WS, ADR_CL

Fig. 4–18: Capacitor Pins: CAPL_A, CAPL_M

Fig. 4–19: Pin: AGNDC

66 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6. Electrical Characteristics

4.6.1. Absolute Maximum Ratings

Symbol Parameter Pin Name Min. Max. Unit

T T V V V dV

V I

Idig

Iana

SUP1

SUP2

SUP3

SUP23

TOT

Idig

Iana

Ambient Operating Temperature − 070

°C

Storage Temperature −−40 125 °C First Supply Voltage AHVSU P −0.3 9.0 V Second Supply Voltage DVSUP −0.3 6.0 V Third Supply Voltage AVSUP −0.3 6.0 V Voltage between AVSUP

and DVSUP Package Power Dissipation

PSDIP64 PQFP80 PLQFP64

Input Voltage, all Digital Inputs −0.3 V

AVSUP, DVSUP

AHVSUP, DVSUP , AVSUP

−0.5 0.5 V

1300 1000

960

+0.3 V

SUP2

mW mW mW

Input Current, all Digital Pins −−20 +20 mA Input Voltage, all Analog Inputs SCn_IN_s,

−0.3 V

SUP1

+0.3 V

MONO_IN

Input Current, all Analog Inputs SCn_IN_s,

−5 +5mA

MONO_IN

Oana

Cana

Output Current, all SCART Outputs SCn_OUT_s Output Current, all Analog Outputs

except SCART Outputs Output Current, other pins

connected to capacitors

DACM_r, DACA_s

CAPL_A, CAPL_M,

3) 4), 5) 4), 5)

4) 4)

AGNDC

PLQFP64: 65 °C

positive value means current flowing into the circuit

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

The analog outputs are short-circuit proof with respect to First Supply Voltage and ground.

Total chip power dissipation must not exceed absolute maximum rating.

Stresses beyond those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating onl y. Functional operation of the device at these or any ot her c onditions beyond those indi cated in the “Rec ommended O perating Conditio ns/Characteris tics” of this s pecification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.

Micronas 67

MSP 34x2G PRELIMINARY DATA SHEET

4.6.2. Recommended Operating Conditions (TA = 0 to 70 °C)

4.6.2.1. General Recommended Operating Conditions

Symbol Parameter Pin Name Min. Typ. Max. Unit

SUP1

First Supply Voltage

AHVSUP 7.6 8.0 8.7 V

(AHVSUP = 8 V)

First Supply Voltage

4.75 5.0 5.25 V

(AHVSUP = 5 V)

SUP2

SUP3

STBYQ1

Second Supply Voltage DVSUP 4.75 5.0 5.25 V

Third Supply Voltage AVSUP 4.75 5.0 5.25 V

STANDBYQ Setup Time before

Turn-off of Second Supply V oltage

STANDBYQ, DVSUP

1 µs

4.6.2.2. Analog Input and Output Recommendations

Symbol Parameter Pin Name Min. Typ. Max. Unit

AGNDC

inSC

AGNDC-Filter-Capacitor AGNDC −20% 3.3 µF

Ceramic Capacitor in Parallel

DC-Decoupling Capacitor in front of

SCn_IN_s

−20% 100 nF

−20% 330 nF

SCART Inputs

inSC

inMONO

LSC

VMA

SCART Input Level 2.0 V

Input Level, Mono Input MONO_IN 2.0 V

SCART Load Resistance SCn_OUT_s

10 kΩ

SCART Load Capacitance 6.0 nF

Main/AUX Volume Capacitor CAPL_M,

CAPL_A

FMA

Main/AUX Filter Capacitor DACM_r,

−10% 1 +10% nF

DACA_s

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

10 µF

RMS

68 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.2.3. Recommendations for Analog Sound IF Input Signal

Symbol Parameter Pin Name Min. Typ. Max. Unit

VREFTOP

IF_FMTV

IF_FMRADIO

IF_FM

IF_AM

FMNI

AMNI

FM1/FM2

VREFTOP-Filter-Capacitor VREFTOP −20% 10 µF Ceramic Capacitor in Parallel Analog Input Frequency Range

for TV Applications Analog Input Frequency for

ANA_IN1+, ANA_IN2 ANA_IN

−

−20% 100 nF

09MHz

10.7 MHz

FM-Radio Applications Analog Input Range FM/NICAM 0.1 0.8 3 V Analog Input Range AM/NICAM 0.1 0.45 0.8 V Ratio: NICAM Carrier/FM Carrier

(unmodulated carriers) BG: I:

Ratio: NICAM Carrier/AM Carrier

−20

−23

−7

−10

0 0

−25 −11 0 dB

dB dB

(unmodulated carriers) Ratio: FM-Main/FM-Sub Satellite 7 dB Ratio: FM1/FM2

7dB

German FM-System

PR SUP

MAX

Ratio: Main FM Carrier/

15 −−dB

Color Carrier Ratio: Main FM Carrier/

15 −−dB

Luma Components Passband Ripple −−±2dB Suppression of Spectrum

15 − dB

above 9.0 MHz (not for FM Radio) Maximum FM-Deviation (approx.)

normal mode HDEV2: high deviation mode HDEV3: very high deviation mode

±180 ±360 ±540

kHz kHz kHz

Micronas 69

MSP 34x2G PRELIMINARY DATA SHEET

4.6.2.4. Crystal Recommendations

Symbol Parameter Pin Name Min. Typ. Max. Unit General Crystal Recommendations

Crystal Parallel Resonance Fre-

quency at 12 pF Load Capacitance

Crystal Series Resistance 8 25 Ω

Crystal Shunt (P arallel) Capacitance 6.2 7.0 pF

External Load Capacitance

XTAL_IN,

XTAL_OUT Crystal Recommendations for Master-Slave Applications f

TOL

TEM

Accuracy of Adjustment −20 +20 ppm Frequency Variation

versus Temperature

Crystal Recommendations for FM / NICAM Applications

TOL

TEM

Motional (Dynamic) Capacitance 19 24 fF Required Open Loop Clock

Frequency (T

= 25 °C)

amb

AUD_CL_OUT

(No MSP-clock synchronization to I

Accuracy of Adjustment −30 +30 ppm Frequency Variation

versus Temperature

18.432 MHz

PSDIP approx. 1.5 P(L)QFP approx. 3.3

(MSP-clock must perform sync hron iz ati on to I

−20 +20 ppm

18.431 18.433 MHz

S clock possible)

−30 +30 ppm

pF pF

S clock)

Crystal Recommendations for all analog FM/AM Applications

TOL

TEM

Motional (Dynamic) Capacitance 15 fF Required Open Loop Clock

Frequency (T

= 25 °C)

amb

AUD_CL_OUT

(No MSP-clock synchronization to I

18.4305 18.4335

S clock possible)

MHz

Accuracy of Adjustment −100 +100 ppm Frequency Variation

−50 +50 ppm

versus Temperature

Amplitude Recommendation for Operation with External Clock Input (C V

XCA

External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop fre-

Required Open Loop Clock Frequency (T

= 25 °C)

amb

AUD_CL_OUT 18.429 18.435 MHz

after reset typ. 22 pF)

load

External Clock Amplitude XTAL_IN 0.7 V

quency of the internal PLL and to stabilize the frequency in closed-loop operation. Due to different layouts, the accurate capacitor value should be determined with the customer PCB. The suggested values (1.5...3.3 pF) are figures based on experience and should serve as “start value”.

To adjust the capacitor value, reset the MSP. After the reset, no I

C telegrams should be transmitted. Measure

the frequency at AUD_CL_OUT-pin. Change the capacitor value until the free running frequency matches

18.432 MHz as closely as possible. The higher the capacity, the lower the resulting clock frequency.

Note: To minimize adjustment tolerances for all MSP-generations, it is strongly recommended to use the so-called

MSP-XTAL-REF ICs (available in all packages) for the capacitor adjustment.

70 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3. Characteristics

= 0 to 70 °C, f

at T

= 60 °C, f

at T

= Junction Temperature

CLOCK

= 18.432 MHz, V

CLOCK

= 18.432 MHz, V

SUP1

= 7.6 to 8.7 V, V

SUP1

= 8 V, V

SUP2

= 4.75 to 5.25 V for min./max. values

SUP2

= 5 V for typical values,

MAIN (M) = Loudspeaker Channel, AUX (A) = Headphone Channel

4.6.3.1. General Characteristics

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Supply

SUP1A

SUP2A

SUP3A

SUP1S

First Supply Current (active) (AHVSUP = 8 V)

First Supply Current (active) (AHVSUP = 5 V)

Second Supply Current (active) DVSUP 75 100 mA Third Supply Current (active) AVSUP 35 45 mA First Supply Current

(AHVSUP = 8 V) First Supply Current

(AHVSUP = 5 V)

AHVSUP 17

11 11

AHVSUP 5.6 7.7 mA STANDBYQ = low

3.7 5.1 mA

25 16

17 11

mA mA

Vol. Main and A ux = 0 dB Vol. Main and A ux = -30dB

Vol. Main and A ux = 0 dB Vol. Main and A ux = -30 dB

Clock

CLOCK

JITTER

xtalDC

Startup

ACLKAC

ACLKDC

outHF_ACL

Clock Input Frequency XTAL_IN 18.432 MHz Clock High to Low Ratio 45 55 % Clock Jitter (Verification not

provided in Production Test) DC-Voltage Oscillator 2.5 V Oscillator Startup Time at

VDD Slew-rate of 1 V/1 Audio Clock Output AC Voltage AUD_CL_OUT 1.2 1.8 V Audio Clock Output DC Voltage 0.4 0 .6 V HF Output Resistance 140 Ω

µs

XTAL_IN, XTAL_OUT

0.4 2 ms

50 ps

SUP3

load = 40 pF I

= 0.2 mA

max

Micronas 71

MSP 34x2G PRELIMINARY DATA SHEET

4.6.3.2. Digital Inputs, Digital Outputs

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Digital Input Levels

DIGIL

DIGIH

DIGI

DLEAK

DIGIL

DIGIH

ADRSEL

Digital Input Low Voltage STANDBYQ Digital Input High Voltage 0.5 V Input Impedance 5 pF Digital Input Leakage Current −11µA0V < U

Digital Input Low Voltage ADR_SEL 0.2 V Digital Input High Voltage 0.8 V Input Current Address Select Pin −500 −220 µAU

Digital Output Level s

DCTROL

DCTROH

Digital Output Low Voltage D_CTR_I/O_0 Digital Output High Voltage V

D_CTR_I/O_0/1

D_CTR_I/O_1

SUP2

−0.3

0.2 V

220 500

0.4 V IDDCTR = 1 mA

SUP2

INPUT

D_CTR_I/O_0/1: tri-state

SUP2

ADR_SEL

µAU

ADR_SEL

V IDDCTR =

< DVSUP

= DVSS = DVSUP

−1 mA

72 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3.3. Reset Input and Power-Up

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

RESETQ Input Levels

V V Z I

RHL

RLH

RES

Reset High-Low Transition Voltage RESETQ 0.45 0.55 V Reset Low-High Transition Voltage 0.7 0.8 V Input Impedance 5 pF Input Pin Leakage Current -1 1 µA0V < U

SUP2

DVSUP AVSUP

4.5V

t/ms

INPUT

< DVSUP

0.45...0.55

RESETQ

0.7×DVSUP

×DVSUP

Internal Reset

Low-to-High Threshold

Reset Delay >2 ms

High

Low

High-to-Low Threshold

Note: The reset should not reach high level before the oscillator has started. This requires a reset delay of >2 ms

0.7 x DVSUP means

3.5 Volt with DVSUP = 5.0 V

t/ms

Fig. 4–20: Power-up sequence

Micronas 73

MSP 34x2G PRELIMINARY DATA SHEET

4.6.3.4. I2C-Bus Characteristics

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

I2CIL

I2CIH

I2C1

I2C2

I2C5

I2C6

I2C3

I2C4

I2C

I2COL

I2COH

I2COL1

I2COL2

I2C-Bus Input Low Voltage I2C_CL, I2C-Bus Input High Voltage 0.6 V I2C Start Condition Setup Time 120 ns I2C Stop Condition Setup Time 120 ns I2C-Data Setup Time

before Rising Edge of Clock I2C-Data Hold Time

after Falling Edge of Clock I2C-Clock Low Pulse Time I2C_CL 500 ns I2C-Clock High Pulse Time 500 ns I2C-BUS Frequency 1.0 MHz I2C-Data Output Low Voltage I2C_CL, I2C-Data Output

High Leakage Current I2C-Data Output Hold Time

after Falling Edge of Clock I2C-Data Output Setup Time

before Rising Edge of Clock

I2C_DA

55 ns

I2C_DA

15 ns

100 ns f

0.3 V

0.4 V I

1.0 µAV

SUP2

I2COL

I2COH

= 1 MHz

I2C

= 3 mA

= 5 V

I2C_CL

I2C_DA as input

I2C_DA as output

Fig. 4–21: I

C bus timing diagram

I2C1

I2C5

I2COL2

I2C4

1/F

I2C

I2C3

I2C6

I2COL1

I2C2

74 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3.5. I2S-Bus Characteristics

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

I2SIL

I2SIH

I2SI

LEAKI2S

I2SOL

I2SOH

I2SOWS

I2SOCL

I2S10/I2S20

s_I2S

h_I2S

d_I2S

I2SWS

I2SCL

Input Low V oltage I2S_CL

I2S_WS

Input High Voltage 0.5 V

I2S_DA_IN1/2

0.2 V

SUP2

Input Impedance 5 pF Input Leakage Current −11µA0V < U I2S Output Low Voltage I2S_CL

I2S_WS

I2S Output High Voltage V

I2S_DA_OUT

SUP2

− 0.3

0.4 V I VI

I2SOL

I2SOH

INPUT

= 1 mA

= −1 mA

< DVSUP

I2S-Word Strobe Output Frequency I2S_WS 32.0 kHz I2S-Clock Output Frequency I2S_CL 1.024

2.048

MHz MHz

I2S_CONFIG[0] = 0

I2S_CONFIG[0] = 1 I2S-Clock Output High/Low-Ratio 0.9 1.0 1.1 I2S Input Setup Time

before Rising Edge of Clock I2S Input Hold Time

I2S_CL I2S_DA_IN1/2

12 ns for details see Fig. 4–22

“I

S bus timing diagram”

40 ns

after Rising Edge of Clock I2S Output Delay Time

after Falling Edge of Clock

I2S_CL I2S_WS

28 ns C

=30pF

I2S_DA_OUT I2S-Word Strobe Input Frequency I2S_WS 32.0 kHz I2S-Clock Input Frequency I2S_CL 1.024 MHz I2S-Clock Input Ratio 0.9 1.1

Micronas 75

MSP 34x2G PRELIMINARY DATA SHEET

1/F

I2S_WS

I2S_CL

I2S_DA_IN

MODUS[6] = 0

MODUS[6] = 1

R LSB L MSB

Detail A

16/32 bit left channel

I2SWS

Detail C

L LSB

R MSB

16/32 bit right channel

R LSB L LSB

I2S_DA_OUT

I2S_WS

I2S_CL

I2S_DA_IN

I2S_DA_OUT

R LSB

L MSB

Data: MSB first, I2S master

Detail B

MODUS[6] = 0

MODUS[6] = 1

Detail A

R LSB L MSB

16,18...32 bit left channel

16, 18...32 bit left channel

R LSB

Detail B

L MSB

Data: MSB first, I2S slave

1/F

L LSB

I2SWS

Detail C

L LSB

R MSB

16/32 bit right channel16/32 bit left channel

R LSB L LSB

16, 18...32 bit right channel

R LSB L LSB

16, 18...32 bit right channel

Detail C

I2S_CL

s_I2S

1/F

I2SCL

Detail A,B

I2S_CL

s_I2S

h_I2S

I2S_DA_IN1/2

I2S_WS as INPUT

d_I2S

I2S_WS as OUTPUT

d_I2S

I2S_DA_OUT

Fig. 4–22: I2S bus timing diagram

76 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Analog Ground

AGNDC0

AGNDC Open Circuit Voltage (AHVSUP = 8 V)

outAGN

AGNDC Output Resistance (AHVSUP = 8 V)

Analog Input Resistance

inSC

inMONO

“n” means “1”, “2”, “3”, or “4”; “s” means “L” or “R”

SCART Input Resistance from T

= 0 to 70 °C

MONO Input Resistance from T

= 0 to 70 °C

AGNDC 3.77 V R

2.51 V

70 125 180 kΩ 3 V ≤ V

47 83 120 k

SCn_IN_s

25 40 58 kΩ f

MONO_IN 152435k

Ω

Ω f

≥10 MΩ

load

≤ 4 V

AGNDC

= 1 kHz, I = 0.05 mA

signal

= 1 kHz, I = 0.1 mA

signal

Micronas 77

MSP 34x2G PRELIMINARY DATA SHEET

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Audio Analog-to-Digital-Converter

AICL

Analog Input Clipping Level for Analog-to-DigitalConversion (AHVSUP = 8 V)

SCn_IN_s, MONO_IN

2.00 2.25 V

RMS

signal

= 1 kHz

Analog Input Clipping Level for Analog-to-DigitalConversion (AHVSUP = 5 V)

SCART Outputs

outSC

OUTSC

SCtoSC

rSCtoSC

outSC

SCART Output Resistance SCn_OUT_s

Deviation of DC-Level at SCART Output from AGNDC Voltage

Gain from Analog Input to SCART Output

Frequency Response from Analog Input to SCART Output

Signal Level at SCART Output (AHVSUP = 8 V)

Signal Level at SCART Output (AHVSUP = 5V)

Main, AUX, and CS Outputs

outMA

Main/AUX Output Resistance DACM_r,

1.13 1.51 V

200 200

−70 +70 mV

SCn_IN_s,

−1.0 +0.5 dB f

MONO_IN

→

SCn_OUT_s

−0.5 +0.5 dB with resp. to 1 kHz

1.8 1.9 2.0 V

1.17 1.27 1.37 V

DACA_s 2.1

2.1

330 460

500

3.3 4.6

5.0

Ω Ω

kΩ kΩ

RMS

= 1 kHz, I = 0.1 mA

signal

= 27 °C

= 0 to 70 °C

= 1 kHz

signal

Bandwidth: 0 to 20000 Hz f

= 1 kHz

signal

Volume 0 dB Full Scale input from I

= 1 kHz, I = 0.1 mA

signal

= 27 °C

= 0 to 70 °C

outDCMA

DC-Level at Main/AUX-Output DC-Level, not selected CS-Output

(AHVSUP = 8 V) DC-Level at Main/AUX-Output DC-Level, not selected CS-Output

(AHVSUP = 5 V)

outMACS

Signal Level at Main/AUX-Output (AHVSUP = 8 V)

Signal Level at Main/AUX-Output (AHVSUP = 5 V)

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

1.80 2.04

2.28 V 61 0

1.12 1.36

1.60 V 40 0

1.23 1.37 1.51 V

0.76 0.90 1.04 V

mV V

RMS

Volume 0 dB Volume

−30 dB

Volume 0 dB Volume

−30 dB

= 1 kHz

signal

Volume = 0 dB Full Scale input from I

78 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3.7. Sound IF Inputs

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

IFIN

VREFTOP

ANA_IN

XTALK BW

Input Impedance ANA_IN1+,

ANA_IN2 ANA_IN

−

DC Voltage at VREFTOP VREFTOP 2.45 2.65 2.75 V DC Voltage on IF Inputs ANA_IN1+,

ANA_IN2 ANA_IN

Crosstalk Attenuation ANA_IN1+,

ANA_IN2

3 dB Bandwidth 10 MHz

ANA_IN

−

1.5

6.8

9.1

2.5

11.4

kΩ kΩ

1.3 1.5 1.7 V

40 dB f

Gain AGC = 20 dB Gain AGC = 3 dB

= 1 MHz

signal

Input Level =

AGC AGC Step Width 0.85 dB

4.6.3.8. Power Supply Rejection

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

PSRR: Rejection of Noise on AHVSUP at 1 kHz

PSRR AGNDC AGNDC 80 dB

From Analog Input to I

S Output MONO_IN,

SCn_IN_s

70 dB

−2 dBr

From Analog Input to SCART Output

From I

S Input to SCART Output SCn_OUT_s

S Input to

From I Main or AUX Output

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

MONO_IN, SCn_IN_s SCn_OUT_s

DACM_r,

DACA_s

70 dB

60 dB 80 dB

Micronas 79

MSP 34x2G PRELIMINARY DATA SHEET

4.6.3.9. Analog Performance

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Specifications for AHVSUP = 8 V

SNR Signal-to-Noise Ratio

from Analog Input to I

S Output MONO_IN,

SCn_IN_s

85 88 dB Input Level = −20 dB with

resp. to V unweighted

AICL

, f

= 1 kHz,

sig

20 Hz ...16 kHz

from Analog Input to SCART Output

from I

S Input to SCART Output SCn_OUT_s

from I

S Input to Main/AUX-Output for Analog Volume at 0 dB for Analog Volume at

−30 dB

MONO_IN, SCn_IN_s → SCn_OUT_s

DACM_r,

DACA_s 85

THD Total Harmonic Distortion

from Analog Input to I

from Analog Input to SCART Output

from I

S Input to SCART Output SCn_OUT_s

from I

S Input to Main or AUX Output

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

S Output MONO_IN,

SCn_IN_s

MONO_IN, SCn_IN_s

→

SCn_OUT_s

DACM_r, DACA_s

93 96 dB Input Level = −20 dB,

= 1 kHz,

sig

unweighted 20 Hz ...20 kHz

85 88 dB Input Level = −20 dB,

= 1 kHz,

sig

unweighted 20 Hz ...16 kHz

88 83

dB dB

Input Level = f

= 1 kHz,

sig

unweighted

−20 dB,

20 Hz ...16 kHz

0.01 0.03 % Input Level = −3 dBr with

resp. to V unweighted

AICL

, f

= 1 kHz,

sig

20 Hz ...16 kHz

0.01 0.03 % Input Level = −3 dBr,

= 1 kHz,

sig

unweighted 20 Hz ...20 kHz

0.01 0.03 % Input Level = −3 dBr,

= 1 kHz,

sig

unweighted 20 Hz ...16 kHz

0.01 0.03 % Input Level = f

= 1 kHz,

sig

unweighted

−3 dBr,

20 Hz ...16 kHz

80 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

Specifications for AHVSUP = 5 V

SNR Signal-to-Noise Ratio

from Analog Input to I

S Output MONO_IN,

SCn_IN_s

82 85 dB Input Level = −20 dB with

resp. to V unweighted

AICL

, f

sig

= 1 kHz,

20 Hz ...16 kHz

from Analog Input to SCART Output

from I

S Input to SCART Output SCn_OUT_s

from I

S Input to Main/AUX-Output for Analog Volume at 0 dB for Analog Volume at

−30 dB

MONO_IN, SCn_IN_s → SCn_OUT_s

DACM_r,

DACA_s 82

THD Total Harmonic Distortion

from Analog Input to I

from Analog Input to SCART Output

from I

S Input to SCART Output SCn_OUT_s

from I

S Input to Main or AUX Output

“n” means “1”, “2”, “3”, or “4”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

S Output MONO_IN,

SCn_IN_s

MONO_IN, SCn_IN_s

→

SCn_OUT_s

DACA_s, DACM_s

90 93 dB Input Level = −20 dB,

= 1 kHz,

sig

unweighted 20 Hz ...20 kHz

82 85 dB Input Level = −20 dB,

= 1 kHz,

sig

unweighted 20 Hz ...16 kHz

85 80

dB dB

Input Level = f

= 1 kHz,

sig

unweighted

−20 dB,

20 Hz ...16 kHz

0.03 0.1 % Input Level = −3 dBr with

resp. to V unweighted

AICL

, f

sig

= 1 kHz,

20 Hz ...16 kHz

0.1 % Input Level = −3 dBr,

= 1 kHz,

sig

unweighted 20 Hz ...20 kHz

0.1 % Input Level = −3 dBr,

= 1 kHz,

sig

unweighted 20 Hz ...16 kHz

0.1 % Input Level = −3 dBr,

= 1 kHz,

sig

unweighted 20 Hz ...16 kHz

Micronas 81

MSP 34x2G PRELIMINARY DATA SHEET

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

CROSSTALK Specifications for AHVSUP = 8 V and 5 V

XTAL K Crosstalk Attenuation Input Level =

= 1 kHz, unused analog

sig

inputs connected to ground

between left and right channel within SCART Input/Output pair (L

SCn_IN

→ SCn_OUT

→R, R→L)

SC1_IN or SC2_IN → I2S Output

→ I

SC3_IN

S Input → SCn_OUT

S Output

between left and right channel within Main or AUX Output pair

S Input → DACM

S Input → DACA

between SCART Input/Output pairs D = disturbing program

O = observed program D: MONO/SCn_IN

O: MONO/SCn_IN D: MONO/SCn_IN → SCn_OUT or unsel.

O: MONO/SCn_IN D: MONO/SCn_IN

O: I

S Input → SCn_OUT

D: MONO/SCn_IN → unselected

O: I

S Input → SC1_OUT

→ SCn_OUT → SCn_OUT

→ I

S Output

→ SCn_OUT

80 80 80 80

dB dB dB dB

75 dB

100

by Z < 1 k unweighted

20 Hz ...20 kHz

unweighted 20 Hz ...16 kHz

unweighted 20 Hz ...20 kHz same signal source on left and right disturbing channel, effect on each observed output channel

Ω

−3 dB,

Crosstalk between Main and AUX Output pairs

S Input → DACM

S Input → DACA

XTALK Crosstalk from Main or AUX Output to SCART Output

and vice versa

D = disturbing program O = observed program

D: MONO/SCn_IN/DSP

O: I

S Input → DACM

O: I

S Input → DACA

D: MONO/SCn_IN/DSP

O: I

S Input → DACM

O: I

S Input → DACA

S Input → DACM

D: I

S Input → DACA

O: MONO/SCn_IN D: I2S Input → DACM

D: I

S Input → DACA

O: I

S Input → SCn_OUT

“n” means “1”, “2”, “3”, or “4”

→ SCn_OUT

90 dB

unweighted 20 Hz ...16 kHz same signal source on left and right disturbing channel, effect on each observed output channel

unweighted 20 Hz ...20 kHz same signal source on left and right disturbing channel, effect on each observed output channel

SCART output load resistance 10 k

Ω

SCART output load resistance 30 k

Ω

82 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

4.6.3.10. Sound Standard Dependent Characteristics

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

NICAM Characteristics (MSP Standard Code = 8)

NICAMOUT

S/N

NICAM

Tolerance of Output Voltage of NICAM Baseband Signal

DACM_r, DACA_s, SCn_OUT_s

S/N of NICAM Baseband Signal 72 dB NICAM: −6 dB, 1 kHz, RMS

−1.5 +1.5 dB 2.12 kHz, Modulator input

level = 0 dBref

unweighted 0 to 16 kHz, Vol= 9 dB NIC_Presc = 7F Output level 1 V

hex RMS

THD

BER fR

NICAM

XTALK SEP

NICAM

Total Harmonic Distortion + Noise of NICAM Baseband Signal

NICAM: Bit Error Rate 1 10 NICAM Frequency Response ,

20...15000 Hz NICAM Crosstalk Attenuation (Dual ) 80 dB NICAM Channel Separation (St ereo) 80 dB

FM Characteristics (MSP Standard Code = 3)

FMOUT

S/N

THD

XTALK

SEP

Tolerance of Output Voltage of FM Demodulated Signal

S/N of FM Demodulated Signal 73 dB 1 FM-carrier 5.5 MHz, 50 µs, Total Harmonic Distortion + Noise

of FM Demodulated Signal

FM Frequency Response

20...15000 Hz

FM Crosstalk Attenuation (Dual) 80 dB 2 FM-carriers 5.5/5.74 MHz,

FM Channel Separation (Stereo) DACM_r,

DACM_r,

DACA_s, SCn_OUT_s

0.1 % 2.12 kHz, Modulator input level = 0 dBref

−7

FM+NICAM, norm conditions

−1.0 +1.0 dB Modulator input

level =

−12 dB dBref; RMS

−1.5 +1.5 dB 1 FM-carrier, 50 µs, 1 kHz,

40 kHz deviation; RMS

1 kHz, 40 kHz deviation;

0.1 %

RMS, unweighted 0 to 15 kHz (for S/N); full input range, FM-Prescale = 46

→ Output Level 1 V

, V o l= 0 dB

hex

−1.0 +1.0 dB 1 FM-carrier 5.5 MHz,

µs, Modulator input

level =

−14.6 dBref; RMS

µs, 1 kHz, 40 kHz devia-

tion; Bandpass 1 kHz

50 dB 2 FM-carriers 5.5/5.74 MHz,

µs, 1 kHz, 40 kHz devia-

tion; RMS

RMS

AM Characteristics (MSP Standard Code = 9)

S/N

THD

AM(1)

AM(2)

S/N of AM Demodulated Signal measurement condition: RMS/Flat

S/N of AM Demodulated Signal measurement condition: QP/CCIR

Total Harmonic Distortion + Noise of AM Demodulated Signal

AM Frequency Response

50...12000 Hz

DACM_r, DACA_s, SCn_OUT_s

55 dB SIF level: 0.1

AM-carrier 54% at 6.5 MHz

−0.8 V

Vol = 0 dB, FM/AM

45 dB

0.6 %

prescaler set for output = 0.5 V Loudspeaker out;

RMS

Standard Code = 09 no video/chroma

hex

components

−2.5 +1.0 dB

1) “n” means “1” or “2”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

Micronas 83

MSP 34x2G PRELIMINARY DATA SHEET

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

BTSC Characteristics (MSP Standard Code = 20

S/N

BTSC

S/N of BTSC Stereo Signal S/N of BTSC-SAP Signal

THD

DBX

BTSC

THD+N of BTSC Stereo Signal THD

+N of BTSC SAP Signal

Frequency Response of BTSC Stereo, 50 Hz...12 kHz

Frequency Response of BTSCSAP, 50 Hz .. .9 kHz

MNR

Frequency Response of BTSC Stereo, 50 Hz...12 kHz

Frequency Response of BTSCSAP, 50 Hz .. .9 kHz

XTALK

SEP

BTSC

DBX

Stereo → SAP SAP

→ Stereo

Stereo Separation DBX NR 50 Hz...10 kHz 50 Hz...12 kHz

, 21

hex

DACM_r, DACA_s, SCn_OUT_s

)

68 57

dB dB

1 kHz L or R or SAP, 100% modulation, 75

µs deemphasis,

RMS unweighted 0 to 15 kHz

0.1

0.5

% %

1 kHz L or R or SAP, 100% modulation, 75

µs EIM

, DBX NR, RMS unweighted 0 to 15 k Hz

−1.0

−2.0 2.0 dB L or R 5%...66% EIM

1.0

L or R or SAP, 1%...66% EIM

, DBX NR

, MNR

−2.0 2.0 dB SAP, white noise,

10% Modulation, MNR

76 80

dB dB

1 kHz L or R or SAP, 100% modulation, 75

µs deemphasis,

Bandpass 1 kHz

, 35 30

dB dB

L or R 1%...66% EIM DBX NR

SEP

MNR

pil

Pilot

“n” means “1” or “2”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

EIM refers to 75-µs Equivalent Input Modulation. It is d efined as the audio-signal level which results in a stated percentage modulation, when the DBX encoding process is replaced by a 75-

Stereo Separation MNR 30 dB L = 300 Hz, R = 3.1 kHz

14% modulation, MNR

Pilot deviation threshold Stereo off Stereo on

→ on → off

ANA_IN1+, ANA_IN2+

3.2

1.2

3.5

1.5

kHz kHz

4.5 MHz carrier modulated with f

= 15.743 kHz

SIF level = 100 mV indication: STATUS Bit[6]

Pilot Frequency Range 15.563 15.843 kHz standard BTSC stereo signal,

sound carrier only

µs preemphasis network.

84 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

BTSC Characteristics (MSP Standard Code = 20 with a minimum IF input signal level of 70 mVpp (measured without any video/chroma signal components)

S/N

BTSC

S/N of BTSC Stereo Signal S/N of BTSC-SAP Signal

THD

DBX

BTSC

THD+N of BTSC Stereo Signal THD

+N of BTSC SAP Signal

Frequency Response of BTSC Stereo, 50 Hz...12 kHz

Frequency Response of BTSC-

, 21

hex

DACM_r, DACA_s, SCn_OUT_s

)

64 55

−1.0

0.15

0.8

1.0

dB dB

% %

SAP, 50 Hz...9 kHz

MNR

Frequency Response of BTSC Stereo, 50 Hz...12 kHz

Frequency Response of BTSC-

−2.0 2.0 dB L or R 5%...66% EIM

−2.0 2.0 dB SAP, white noise,

SAP, 50 Hz...9 kHz

XTALK

SEP

DBX

BTSC

Stereo → SAP SAP

→ Stereo

Stereo Separation DBX NR 50 Hz...10 kHz 50 Hz...12 kHz

75 75

35 30

dB dB

1 kHz L or R or SAP, 100% modulation, 75

µs deemphasis,

RMS unweighted 0 to 15 1 kHz L or R or SAP,

100% modulation, 75

µs EIM

, DBX NR,

RMS unweighted 0 to 15 kHz L or R or SAP,

1%...66% EIM

, DBX NR

, MNR

10% Modulation, MNR 1 kHz L or R or SAP,

100% modulation, 75

µs deemphasis,

Bandpass 1 kHz L or R 1%...66% EIM

DBX NR

SEP

MNR

“n” means “1” or “2”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

EIM refers to 75-µs Equivalent Input Modulat ion. It is defined as the audio-signal level which results in a stated percentage mod ulation, when the DBX encoding process is replaced by a 75-

Stereo Separation MNR 30 dB L = 300 Hz, R = 3.1 kHz

14% modulation, MNR

µs preemphasis network.

Micronas 85

MSP 34x2G PRELIMINARY DATA SHEET

Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions

EIA-J Characteristics (MSP Standard Code = 30

S/N

EIAJ

S/N of EIA-J Stereo Signal

hex

S/N of EIA-J Sub-Channel

THD

EIAJ

THD+N of EIA-J Stereo Signal THD

+N of EIA-J Sub-Channel

Frequency Response of EIA-J Stereo, 50 Hz...12 kHz

Frequency Response of EIA-J Sub-Channel, 50 Hz...12 kHz

XTALK

SEP

EIAJ

Main → SUB Sub

→ MAIN

Stereo Separation 50 Hz...5 kHz 50 Hz...10 kHz

FM-Radio Characteristics (MSP Standard Code = 40

S/N THD

UKW

S/N of FM-Radio Stereo Signal DACM_r, THD+N of FM-Radio Stereo Signal 0.1 %

)

DACM_r,

DACA_s, SCn_OUT_s

)

hex

DACA_s, SCn_OUT_s

60 60

−1.0

66 80

0.2

0.3

1.0

dB dB

% %

dB dB

1 kHz L or R, 100% modulation, 75

µs deemphasis,

RMS unweighted 0 to 15 kHz

100% modulation, 75

µs deemphasis

1 kHz L or R, 100% modulation, 75

µs deemphasis,

Bandpass 1 kHz

EIA-J Stereo Signal, L or R 35 28

dB dB

100% modulation

68 dB 1 kHz L or R,

100% modulation,

µs deemphasis,

RMS unweighted

0 to 15 kHz

UKW

Frequency Response of FM-Radio Stereo 50 Hz...15 kHz

SEP

UKW

Pilot

“n” means “1” or “2”; “r” means “L”, “R”, “C”, or “S”; “s” means “L” or “R”

Stereo Separation 50 Hz...15 kHz 45 dB Pilot Frequency Range ANA_IN1+

ANA_IN2+

L or R,

1%...100% modulation,

−1.0 1.0 dB

µs deemphasis

18.844 19.125 kHz standard FM radio

stereo signal

86 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

5. Appendix A: Overview of TV-Sound Standards

5.1. NICAM 728

Table 5–1: Summary of NICAM 728 sound modulation parameters

Specification I B/G L D/K

Carrier frequency of digital sound

Transmission rate 728 kbit/s Type of modulation Differentially encoded quadrature phase shift keying (DQPSK) Spectrum shaping

Roll-off factor

Carrier frequency of analog sound component

Power ratio between vision carrier and analog sound carrier

Power ratio between analog and modulated digital sound carrier

6.552 MHz 5.85 MHz 5.85 MHz 5.85 MHz

by means of Roll-off filters

1.0 0.4 0.4 0.4

6.0 MHz FM mono

10 dB 13 dB 10 dB 16dB 13 dB

10 dB 7 dB 17 dB 11 dB China/

5.5 MHz FM mono

6.5 MHz AM mono 6.5 MHz FM mono

terrestrial cable

Hungary 12 dB 7dB

Poland

Table 5–2: Summary of NICAM 728 sound coding characteristics

Characteristics Values

Audio sampling frequency 32 kHz Number of channels 2 Initial resolution 14 bit/sample Companding characteristics near instantaneous, with compression to 10 bits/sample in 32-samples (1 ms) blocks Coding for compressed samples 2’s complement Preemphasis CCITT Recommendation J.17 (6.5dB attenuation at 800 Hz) Audio overload level +12 dBm measured at the unity gain frequency of the preemphasis network (2 kHz)

Micronas 87

MSP 34x2G PRELIMINARY DATA SHEET

5.2. A2-Systems

Table 5–3: Key parameters for A2 Systems of Standards B/G, D/K, and M

Characteristics Sound Carrier FM1 Sound Carrier FM2

TV-Sound Standard Carrier frequency in MHz 5.5 6.5 4.5 5.7421875 6.2578125

Vision/sound power difference 13 dB 20 dB Sound bandwidth 40 Hz to 15 kHz Preemphasis 50 µs75 µs50 µs75 µs Frequency deviation (nom/max) ±27/±50 kHz ±17/±25kHz ±27/±50 kHz ±15/±25 kHz

Transmission Modes

Mono transmission mono mono Stereo transmissio n (L+R)/2 (L+R)/2 R (L−R)/2 Dual sound transmission language A language B

Identification of Transmission Mode

Pilot carrier frequency 54.6875 kHz 55.0699 kHz Max. deviation portion Type of modulation / modulation depth AM / 50%

B/G D/K M B/G D/K M

4.724212

6.7421875

5.7421875

±2.5 kHz

Modulation frequency mono: unmodulated

stereo: 117.5 Hz dual: 274.1 Hz

149.9 Hz

276.0 Hz

88 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

5.3. BTSC-Sound System

Table 5–4: Key parameters for BTSC-Sound Systems

Aural

BTSC-MPX-Components

Carrier

(L+R) Pilot (L−R) SAP Prof. Ch.

Carrier frequency (f (f

= 15.734 kHz)

hNTSC

= 15.625 kHz)

hPAL

4.5 MHz Baseband f

2 f

5 f

6.5 f

Sound bandwidth in kHz 0.05 - 15 0.05 - 15 0.05 - 12 0.05 - 3.4 Preemphasis 75 µs DBX DBX 150 µs

Max. deviation to Aural Carrier 73 kHz

25 kHz

5kHz 50kHz1) 15 kHz 3 kHz

(total)

Max. Freq. Deviation of Subcarrier Modulation Type AM

Sum does not exceed 50 kHz due to interleaving effects

10 kHz FM

3kHz FM

5.4. Japanese FM Stereo System (EIA-J)

Table 5–5: Key parameters for Japanese FM-Stereo Sound System EIA-J

Aural

EIA-J-MPX-Components

Carrier

(L+R) (L−R) Identification

3.5 f

Carrier frequency (f

= 15.734 kHz) 4.5 MHz Baseband 2 f

Sound bandwidth 0.05 - 15 kHz 0.05 - 15 kHz − Preemphasis 75 µs75µs none Max. deviation portion to Aural Carrier 47 kHz 25 kHz 20 kHz 2 kHz Max. Freq. Deviation of Subcarrier

Modulation Type

10 kHz FM

60%

AM Transmitter-sided delay 20 µs0 µs0 µs Mono transmission L+R − unmodulated Stereo tran smission L+RL−R 982.5 Hz Bilingual transmission Language A Language B 922.5 Hz

Micronas 89

MSP 34x2G PRELIMINARY DATA SHEET

5.5. FM Satellite Sound

Table 5–6: Key parameters for FM Satellite Sound

Carrier Frequency Maximum

FM Deviation

6.5 MHz 85 kHz Mono 15 kHz 50 µs

7.02/7.20 MHz 50 kHz Mono/Stereo/Bilingual 15 kHz adaptive

7.38/7.56 MHz 50 kHz Mono/Stereo/Bilingual 15 kHz adaptive

7.74/7.92 MHz 50 kHz Mono/Stereo/Bilingual 15 kHz adaptive

Sound Mode Bandwidth Deemphasis

5.6. FM-Stereo Radio

Table 5–7: Key parameters for FM-Stereo Radio Systems

Aural Carrier

Carrier frequency (f Sound bandwidth inkHz 0.05 - 15 0.05 - 15

= 19 kHz) 10.7 MHz Baseband f

(L+R) Pilot (L−R) RDS/ARI

FM-Radio-MPX-Components

2 f

3 f

Preemphasis:

− USA

− Europe

Max. deviation to Aural Carr ier 75 kHz

(100%)

Sum does not exceed 90% due to interleaving effects.

75 µs 50 µs

90%

75 µs 50 µs

10% 90%

90 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

6. Appendix B: Manual/Compatibility Mode

To adapt the modes of the STANDARD SELECT register to individual re quirements and for reasons o f com- patibility to the MSP 34x0D, the MSP 34x2G offers an Manual/Compatibility Mode, which pr ovides so phi sticated programming of the MSP 34x2G.

Using the STANDARD SELECT regi ster gene rally provides a more economic way to program the MSP 34x2G and will result in optimal behavior. There-

fore, it is not recommended to use the Manual/ Compatibility mode. In those cases, where the

MSP 34x0D is to be substituted by the MSP 34x2G, the tips given in Section 6.9. on page 105 have to be obeyed by the controller software.

Micronas 91

MSP 34x2G PRELIMINARY DATA SHEET

6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode

Table 6–1: Demodulator Write Registers; Subaddress: 10

Demodulator Write Registers

AUTO_FM/AM 00 21 3412,

A2_Threshold 00 22 all A2 Stereo Identification Threshold 00 19 CM_Threshold 00 24 all Carrier-Mute Threshold 00 2A AD_CV 00 BB all SIF-input selection, configuration of AGC, and Carrier-Mute Function 00 00 96 MODE_REG 00 83 3412,

FIR1 FIR2

DCO1_LO DCO1_HI

DCO2_LO DCO2_HI

Address (hex)

00 01 00 05

00 93 00 9B

00 A3 00 AB

MSPVersion

3452

Description Reset

1. MODUS[0]=1 (Automatic Sound Select): Switching Level threshold of

Automatic Switching between NICAM and FM/AM in case of bad NICAM reception

2. MODUS[0]=0 (Manual Mode): Activation and configuration of Automatic Switching between NICAM and FM/AM in case of bad NICAM reception

Controlling of MSP-Demodulator and Interface options. As soon as this register is applied, the MSP 34x2G works in the MSP 34x0D Compatibility

Mode. Warning: In this mode, BTSC, EIA-J, and FM-Radio are disabled. Only

MSP 34x0D features are available; the use of MODUS and STATUS register is not allowed.

The MSP 34x2G is reset to the normal mode by first programming the MODUS register followed by transmitting a valid standard code to the STANDARD SELECTION register.

FIR1-filter coefficients channel 1 (6 FIR2-filter coefficients channel 2 (6

Increment channel 1 Low Part Increment channel 1 High Part

Increment channel 2 Low Part Increment channel 2 High Part

; these registers are not readable!

hex

⋅ 8 bit) ⋅ 8 bit), + 3 ⋅ 8 bit offset (total 72 bit)

Mode

00 00 93

hex

00 00 97

00 00 99

Page

95 95

PLL_CAPS 00 1F Not of interest for the customer

Note: All registers except AUTO_FM /AM, A2_T hreshold and CM_Threshold are initialised during STANDARD SELECTION and are automatically updated when Automatic Sound Select (MODUS[0]=1) is on.

Table 6–2: Demodulator Read Registers; Subaddress: 11

Demodulator Read Registers

C_AD_BITS 00 23 3412, ADD_BITS 00 38 NICAM: bit [10:3] of additional data bits 101 CIB_BITS 00 3E NICAM: CIB1 and CIB2 control bits 101 ERROR_RATE 00 57 NI CAM error rate, updated with 182 ms 102 PLL_CAPS 02 1F Not for customer use 102 AGC_GAIN 02 1E Not for customer use 102

Address (hex)

MSPVersion

3452

Switchable PLL capacitors to tune open-loop frequency

; these registers are not writable!

hex

Description Page

NICAM-Sync bit, NICAM-C-Bits, and three LSBs of additional data bits 101

00 56 102

92 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

6.2. DSP Write and Read Registers for Manual/Compatibility Mode

Table 6–3: DSP-Write Registers; Subaddress: 12

Write Register Address

(hex)

Volume SCART1 channel: Ctrl. mode 00 07 [7:0] [Linear mode / logarithmic mode] 00 FM Fixed Deemphasis 00 0F [15:8] [50 FM Adaptive Deemphasis [7:0] [OFF, WP1] OFF 103 Identification Mode 00 15 [7:0] [B/G, M] B/G 104 FM DC Notch 00 17 [7:0] [ON, OFF] ON 104 Volume SCART2 channel: Ctrl. mode 00 40 [7:0] [Linear mode / logarithmic mode] 00

Bits Operational Modes and Adjustable Range Reset

Table 6–4: DSP Read Registers; Subaddress: 13

Additional Read Registers Address

Stereo detection register for A2 Stereo Systems

DC level readout FM1/Ch2-L 00 1B [15:0] [8000 DC level readout FM2/Ch1-R 00 1C [15:0] [8000

(hex)

00 18 [15:8] [80

Bits Output Range Page

, all registers are readable as well

hex

µs, 75 µs, J17, OFF] 50 µs 103

, all registers are not writable

hex

... 7F

hex

] 8 bit two’s complement 104

hex

... 7FFF

hex

... 7FFF

hex

] 16 bit two’s complement 104

hex

] 16 bit two’s complement 104

hex

Mode

hex

Page

103

6.3. Manual/Compatibility Mode: Description of Demodulator Write Registers

6.3.1. Automatic Switching between NICAM and

Analog Sound

In case of bad NICAM reception or loss of the NICAM-carrier, the MSP 34x2G offers an Automatic Switching (fall back) to the analog sound (FM/AMMono), without the necessity of the controller reading and evaluating any parameters. If a proper NICAM signal retur ns, switching back to th is source is performed automatically as well. The feature evaluates the NICAM ERROR_RATE and switches, if necessary, all output channels which are assigned to the NICAM source, to the analog source, and vice versa.

An appropriate hysteresis algorithm avoids oscillating effects (see Fig. 6–1). STATUS[9] and C_A D_BITS[11] (Addr: 0023 hex) provide information about the actual NICAM-FM/AM-status.

Selected Sound

NICAM

analog Sound

thresholdthreshold/2

ERROR_RATE

Fig. 6–1: Hysteresis for Automatic Switching

6.3.1.1. Function in Automatic Sound Select Mode

The Automatic Sound Select feature (MODUS[0]=1) includes the procedure mentioned above. By default, the internal ERROR_RATE threshold is set to 700

– NICAM – analog Sound

The ERROR_RATE value of 700 corresponds to a BER of approximately 5.46*10

→ analog Sound if ERROR_RATE > 700

→ NICAM if ERROR_RATE < 700/2

-3

/s.

dec

. i.e. :

Micronas 93

MSP 34x2G PRELIMINARY DATA SHEET

Individual configu ration of the thresh old can be done

6.3.1.2. Function in Manual Mode

using Table 6–5 . It is re co mme nde d to us e the in ternal setting used by the standard selection.

If the manual mode (MODUS[0]=0) is required, the

activation and configuration of the Automatic Switching The optimum NICAM sound can be assigned to the MSP output channels by selecting one of t he “Stereo or A/B”, “Stereo or A”, or “Stereo or B” source channels.

feature has to be done as described in Table 6–6.

Note, that the channel matrix of the corresponding out-

put channels must be set according to the

NICAM mode and need not to be changed in the FM/

AM-fallback case.

Example:

Required threshold = 500: bits [10:1]=00 1111 1010

Table 6–5: Coding of Automatic NICAM/A nal og Sou nd Swi tc hin g;

Automatic Sound Select is on

Mode Description AUTO_FM [11:0]

1 Default

2 Automatic Switching with

Automatic Switching with

internal threshold

external threshold

(Customizing of Automatic Sound Select)

(MODUS[0] = 1)

Addr. = 00 21

bit[11:0] = 0 700 NICAM or FM/AM,

bit[11] = 0 bit[10:1] = 25...1000

bit[0] = 1

hex

= threshold/2

ERROR_RATEThreshold/dec

set by customer; recommended range: 50...2000

Source Select: Input at NICAM Path

depending on ERROR_RATE

3 Forced Analog Mono bit [11] = 1

bit [10:1] = ignored bit [0] = 1

The NICAM path may be assigned to “Stereo or A/B”, “Stereo or A”, or “Stereo or B” sourc e chan nel s (see Table 2–2 on page 13).

Table 6–6: Coding of Automatic NICAM/A nal og Sou nd Swi tc hin g;

Automatic Sound Select is off

Mode Description AUTO_FM [11:0]

0 reset status

1 Automatic Switching with

2 Automatic Switching with

Forced NICAM (Automatic Switching disabled)

internal threshold (Default, if Automatic Sound Select is on)

external threshold (Customizing of Automatic Sound Select)

(MODUS[0] = 0)

Addr. = 00 21

bit[11] = 0 bit[10:1] = 0 bit[0] = 0

bit[11] = 0 bit[10:1] = 0 bit[0] = 1

bit[11] = 0 bit[10:1] = 25...1000

bit[0] = 1

hex

= threshold/2

ERROR_RATEThreshold/dec

none always NICAM; Mute in

700 NICAM or FM/AM,

set by customer; recommended range: 50...2000

always FM/AM

Source Select: Input at NICAM Path

case of no NICAM available

depending on ERROR_RATE

3 Forced Analog Mono

(Automatic Switching disabled)

bit[11] = 1 bit[10:1] = 0 bit[0] = 1

none always FM/AM

94 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

6.3.2. A2 Threshold

The threshold between Stereo/Bilingual and Mono Identification for the A2 Standard ha s been made programmable according to the user’s preferences. An internal hysteresis ensures robustness and stability.

Table 6–7: Write Register on I

C Subaddress 10

: A2 Threshold

hex

Function Name

Address THRESHOLDS

00 22

(write) A2 THRESHOLD Register

hex

Defines threshold of all A2 and EIA_J standards for Stereo and Bilingual detection

bit[15:0] 07F0

force Mono Identification

hex

... 0190

default setting after reset

hex

... 00A0

recommended range : 00A0

minimum Threshold for stable detection

hex

6.3.3. Carrier-Mute Threshold

The Carrier-Mut e threshold has been m ade programmable according to the user’s preferences. An inter nal hysteresis ensures stable behavior.

...03C0

A2_THRESH

hex

Table 6–8: Write Register on I2C Subaddress 10

Function Name

Address THRESHOLDS

00 24

(write) Carrier-Mute THRESHOLD Register

hex

Defines threshold for the carrier mute feature bit[15:0] 0000

Carrier-Mute always ON (both channels muted)

hex

... 002A

default setting after reset

hex

... 07FF

Carrier-Mute always OFF

hex

(both channels forced on)

recommended range : 0014

: Carrier-Mute Threshold

hex

...0050

hex

CM_THRESH

Micronas 95

MSP 34x2G PRELIMINARY DATA SHEET

6.3.4. Register AD_CV

The use of this register is no longer recommended. Use it only in cases where compatibility to the MSP 34x0D is required. Using the STANDARD SELECTION register together with th e MODUS register provides a more economic way to program the MSP 34x2G.

Table 6–9: AD_CV Register; reset status: all bits are “0”

AD_CV

hex

)

(00 BB

Bit Function Settings 2-8, 0A -60

Automatic setting by STANDARD SELECT Register

hex

[0] not used must be set to 0 0 0 [1−6] Reference level in case of Automatic Gain

101000 100011 Control = on (see Table 6–10). Constant gain factor when Automatic Gain Control = off (see Table 6–11).

[7] Determination of Automatic Gain or

Constant Gain

[8] Selection of Sound IF source

(identical to MODUS[8])

[9] MSP-Carrier-Mute Feature 0 = off: no mute

0 = constant gain 1 = automatic gain

0 = ANA_IN1+ 1 = ANA_IN2+

1 = on: mute as de-

scribed in section 2.2.2. [10−15] not used must be set to 0 0 0 X : not affected while choosing the TV sound standard by means of the STANDARD SELECT Register

Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on.

Table 6–10: Reference Values for Active AGC (AD_CV[7] = 1)

Application Input Signal Contains AD_CV [6:1]

Ref. Value

Terrestrial TV

− FM Standards

− NICAM/FM

− NICAM/AM

− NICAM only

1 or 2 FM Carriers 1 FM and 1 NICAM Carrier 1 AM and 1 NICAM Carrier

1 NICAM Carrier only

101000 101000 100011

010100

SAT 1 or more FM Carriers 100011 35 0.10 − 3 V ADR FM and ADR carriers see DRP 3510A data sheet

For signals above 1.4 Vpp, the minimum gain of 3 dB is switched, and overflow of the A/D converter may result. Due to the robustness of the internal processing, the IC works up to and even more than 3 V FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N ratio of about 10 dB may appear.

AD_CV [6:1] in integer

40 40 35

Range of Input Signal at pin ANA_IN1+ and ANA_IN2+

0.10 − 3 V

0.10 − 1.4 V

pp pp

(recommended: 0.10 − 0.8Vpp)

0.05 − 1.0 V

, if norm conditions of FM/NICAM or

96 Micronas

PRELIMINARY DATA SHEET MSP 34x2G

Table 6–11: AD_CV parameters for Constant Input Gain (AD_CV[7]=0)

Step AD_CV [6:1]

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

For signals above 1.4 Vpp, the minimum gain of 3 dB is switched and overflow of the A/D converter may result. Due to the robustness of the internal processing, the IC works up to and even more than 3 V FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N ratio of about 10 dB may appear.

Constant Gain

000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100

Gain Input Level at pin ANA_IN1+ and ANA_IN2+

3.00 dB

3.85 dB

4.70 dB

5.55 dB

6.40 dB

7.25 dB

8.10 dB

8.95 dB

9.80 dB

10.65 dB

11.50 dB

12.35 dB

13.20 dB

14.05 dB

14.90 dB

15.75 dB

16.60 dB

17.45 dB

18.30 dB

19.15 dB

20.00 dB

maximum input level: 3 V

maximum input level: 0.14 V

, if norm conditions of FM/NICAM or

(FM) or 1 Vpp (NICAM)

6.3.5. Register MODE_REG Note: The use of this register is no longer recom-

mended. It should be used on ly in cases where software compatibility to the MSP 34x0D is required. Using the STANDARD SELECTION register together with the MODUS register provides a more economic way to program the MSP 34x2G.

As soon as this register is applied, the MSP 34x2G works in the MSP 34x0D Manual/Compatibility

Mode. In this mode, BTSC, EIA-J, and FM-Radio are disabled. Only MSP 34x0D features are available; the

use of MODUS and STATUS register is not allowed. The MSP 34x2G is reset to the nor mal mode by first programming the MODUS register, followed by transmitting a valid standard code to the STANDARD SELECTION register.

The register ‘MODE_REG’ contains the control bits determining th e operation mode of the MSP 34x2G in the MSP 34x0D Manual/Compatibility Mode; Table 6– 12 explains all bit positions.

Micronas 97

MSP 34x2G PRELIMINARY DATA SHEET

Table 6–12: Control word ‘MODE_REG’; reset status: all bits are “0”

MODE_REG 00 83

Bit Function Comment Definition 2 - 5 8, A, B 9

[0] not used 0 : must be used 0 0 0 [1] DCTR_TRI Digital control out

[2] I2S_TRI I

[3] I

[4] I2S_WS Mode WS due to the Sony or

[5] Audio_CL_OUT Switch

[6] NICAM

[7] not used 0 : must be used 0 0 0 [8] FM AM Mode of MSP-Ch2 0 : FM

S Mode

0/1 tri-state

S outputs tri-state (I2S_CL, I2S_WS, I2S_DA_OUT)

Master/Slave mode of the I2S bus

Philips-Format

Audio_Clock_Output to tri-state

Mode of MSP-Ch1 0 : FM

hex

0 : active 1 : tri-s tate

0 : Master 1 : Slave

0 : Sony 1 : Philips

0 : on 1 : tri-s tate

1 : Nicam

1 : AM

Automatic setting by STANDARD SELECT Register

XXX

011

001

[9] HDEV High Deviation Mode

[11:10] not used 0 : must be used 0 0 0 [12] MSP-Ch1 Gain see also Table 6–14 0 : Gain = 6 dB

[13] FIR1-Filter

[14] ADR Mode of MSP-Ch1/

[15] AM-Gain Gain for AM

NICAM and I2S-Master mode are not allowed simultaneously X: not affected by

Coeff. Set

(channel matrix m ust b e sound A)

Philips msp34x2g Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

1. Introduction

1.1. Features

2. Functional Description

2.2. Sound IF Processing

2.2.1. Analog Sound IF Input

2.2.2. Demodulator: Standards and Features

2.2.3. Preprocessing of Demodulator Signals

2.2.4. Automatic Sound Select

2.2.5. Manual Mode

2.4. Source Selection and Output Channel Matrix

2.5.2. Loudspeaker and Headphone Outputs

2.5. Audio Baseband Processing

2.5.1. Automatic Volume Correction (AVC)

2.5.3. Subwoofer Output

2.5.4. Quasi-Peak Detector

2.5.5. Micronas Dynamic Bass (MDB)

2.5.5.1. Dynamic Amplification

2.5.5.2. Adding Harmonics

2.5.5.3. MDB Parameters

2.6. Surround Processing

2.6.1. Output Configuration

2.6.1.1. HP/CS Switch

2.6.1.2. Channel Configuration

2.6.2. Surround Processing Mode

2.6.2.1. Decoder Matrix

2.6.2.2. Surround Reproduction

2.6.2.4. Useful Combinations of Surround Processing Modes

2.6.2.3. Center Modes

2.6.3. Examples

2.6.4. Application Tips for using 3D-PANORAMA

2.6.4.1. Sweet Spot

2.6.4.2. Clipping

2.6.4.4. Cabinet Requirements

2.6.4.3. Loudspeaker Requirements

2.6.6. Subwoofer in Surround Mode

2.6.7. Equalizer in Surround Mode

2.7. SCART Signal Routing

2.7.1. SCART DSP In and SCART Out Select

2.7.2. Stand-by Mode

2.9. ADR Bus Interface

2.10. Digital Control I/O Pins and Status Change Indication

2.11. Clock PLL Oscillator and Crystal Specifications

3. Control Interface

3.1. Device and Subaddresses

3.1.1. Internal Hardware Error Handling

3.1.2. Description of CONTROL Register

3.1.3. Protocol Description

3.1.4.1. Symbols

3.3.1. User Registers Overview

3.1.4.2. Write Telegrams

3.1.4.3. Read Telegrams

3.1.4.4. Examples

3.3.2. Description of User Registers

3.3.2.1. STANDARD SELECT Register

3.3.2.2. Refresh of STANDARD SELECT Register

3.3.2.3. STANDARD RESULT Register

3.4. Programming Tips

3.5. Examples of Minimum Initialization Codes

3.5.2. B/G-FM (A2 or NICAM)

3.5.3. BTSC-Stereo

3.5.4. BTSC-SAP with SAP at Loudspeaker Channel

3.5.5. FM-Stereo Radio

3.5.6. Automatic Standard Detection

3.5.8. Virtual Dolby Surround Example

3.5.9. Noise Sequencer for Dolby Pro Logic

3.5.10. Software Flow for Interrupt driven STATUS Check

3.5.7. Dolby Surround Pro Logic Example

4. Specifications

4.1. Outline Dimensions

4.2. Pin Connections and Short Descriptions

4.3. Pin Descriptions

4.4. Pin Configurations

4.5. Pin Circuits

4.6. Electrical Characteristics

4.6.1. Absolute Maximum Ratings

4.6.2. Recommended Operating Conditions (TA = 0 to 70 °C)