Philips msp34x1g Service Manual

MSP 34x1G
Multistandard
Sound Processor Family

Edition March 5, 2001
6251-511-2PD

PRELIMINARY DATA SHEET

MICRONAS

MICRONAS

with Virtual Dolby

Surround

MSP 34x1G PRELIMINARY DATA SHEET

Contents

Page Section Title

6 1. Introduction

7 1.1. Features of the MSP 34x1G Family and Differences to MSP 34xxD
7 1.2. MSP 34x1G Version List
8 1.3. MSP 34x1G Versions and their Application Fields

9 2. Functional Description

10 2.1. Architecture of the MSP 34x1G Family
10 2.2. Sound IF Processing
10 2.2.1. Analog Sound IF Input
10 2.2.2. Demodulator: Standards and Features
11 2.2.3. Preprocessing of Demodulator Signals
11 2.2.4. Automatic Sound Select
11 2.2.5. Manual Mode
11 2.3. Preprocessing for SCART and I
13 2.4. Source Selection and Output Channel Matrix
13 2.5. Audio Baseband Processing
13 2.5.1. Automatic Volume Correction (AVC)
13 2.5.2. Loudspeaker and Headphone Outputs
13 2.5.3. Subwoofer Output
13 2.5.4. Quasi-Peak Detector
14 2.5.5. Micronas Dynamic Bass (MDB)
14 2.5.5.1. Dynamic Amplification
14 2.5.5.2. Adding Harmonics
14 2.5.5.3. MDB Parameters
14 2.6. Virtual Surround System Application Tips
14 2.6.1. Sweet Spot
14 2.6.2. Clipping
15 2.6.3. Loudspeaker Requirements
15 2.6.4. Cabinet Requirements
15 2.7. SCART Signal Routing
15 2.7.1. SCART DSP In and SCART Out Select
15 2.7.2. Stand-by Mode

2

16 2.8. I

S Bus Interface
16 2.9. ADR Bus Interface
16 2.10. Digital Control I/O Pins and Status Change Indication
16 2.11. Clock PLL Oscillator and Crystal Specifications

2

S Input Signals

17 3. Control Interface

17 3.1. I

2

C Bus Interface
17 3.1.1. Internal Hardware Error Handling
18 3.1.2. Description of CONTROL Register
18 3.1.3. Protocol Description

2

19 3.1.4. Proposals for General MSP 34x1G I

C Telegrams
19 3.1.4.1. Symbols
19 3.1.4.2. Write Telegrams
19 3.1.4.3. Read Telegrams
19 3.1.4.4. Examples

2 Micronas

PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

19 3.2. Start-Up Sequence: Power-Up and I2C-Controlling
19 3.3. MSP 34x1G Programming Interface
19 3.3.1. User Registers Overview
23 3.3.2. Description of User Registers
24 3.3.2.1. STANDARD SELECT Register
24 3.3.2.2. Refresh of STANDARD SELECT Register
24 3.3.2.3. STANDARD RESULT Register
26 3.3.2.4. Write Registers on I
28 3.3.2.5. Read Registers on I2C Subaddress 11
29 3.3.2.6. Write Registers on I2C Subaddress 12
44 3.3.2.7. Read Registers on I2C Subaddress 13

2

C Subaddress 10

hex
hex
hex
hex

45 3.4. Programming Tips
45 3.5. Examples of Minimum Initialization Codes
45 3.5.1. SCART1 Input to Loudspeaker in Stereo Sound
45 3.5.2. SCART1 Input to Loudspeaker in 3D-PANORAMA Sound
45 3.5.3. Noise Sequencer for 3D-PANORAMA Sound
46 3.5.4. B/G-FM (A2 or NICAM)
46 3.5.5. BTSC-Stereo
46 3.5.6. BTSC-SAP with SAP at Loudspeaker Channel
46 3.5.7. FM-Stereo Radio
46 3.5.8. Automatic Standard Detection
46 3.5.9. Software Flow for Interrupt driven STATUS Check

MSP 34x1G

48 4. Specifications

48 4.1. Outline Dimensions
50 4.2. Pin Connections and Short Descriptions
53 4.3. Pin Descriptions
56 4.4. Pin Configurations
60 4.5. Pin Circuits
62 4.6. Electrical Characteristics
62 4.6.1. Absolute Maximum Ratings
63 4.6.2. Recommended Operating Conditions
63 4.6.2.1. General Recommended Operating Conditions
63 4.6.2.2. Analog Input and Output Recommendations
64 4.6.2.3. Recommendations for Analog Sound IF Input Signal
65 4.6.2.4. Crystal Recommendations
66 4.6.3. Characteristics
66 4.6.3.1. General Characteristics
67 4.6.3.2. Digital Inputs, Digital Outputs
68 4.6.3.3. Reset Input and Power-Up

2

69 4.6.3.4. I
70 4.6.3.5. I

C-Bus Characteristics

2

S-Bus Characteristics
72 4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC
73 4.6.3.7. Sound IF Inputs
73 4.6.3.8. Power Supply Rejection
74 4.6.3.9. Analog Performance
77 4.6.3.10. Sound Standard Dependent Characteristics

Micronas 3

MSP 34x1G PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

81 5. Appendix A: Overview of TV-Sound Standards

81 5.1. NICAM 728
82 5.2. A2-Systems
83 5.3. BTSC-Sound System
83 5.4. Japanese FM Stereo System (EIA-J)
84 5.5. FM Satellite Sound
84 5.6. FM-Stereo Radio

85 6. Appendix B: Manual/Compatibility Mode

85 6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode
86 6.2. DSP Write and Read Registers for Manual/Compatibility Mode
87 6.3. Manual/Compatibility Mode: Description of Demodulator Write Registers
87 6.3.1. Automatic Switching between NICAM and Analog Sound
87 6.3.1.1. Function in Automatic Sound Select Mode
87 6.3.1.2. Function in Manual Mode
89 6.3.2. A2 Threshold
89 6.3.3. Carrier-Mute Threshold
90 6.3.4. Register AD_CV
91 6.3.5. Register MODE_REG
93 6.3.6. FIR-Parameter, Registers FIR1 and FIR2
93 6.3.7. DCO-Registers
95 6.4. Manual/Compatibility Mode: Description of Demodulator Read Registers
95 6.4.1. NICAM Mode Control/Additional Data Bits Register
95 6.4.2. Additional Data Bits Register
95 6.4.3. CIB Bits Register
96 6.4.4. NICAM Error Rate Register
96 6.4.5. PLL_CAPS Readback Register
96 6.4.6. AGC_GAIN Readback Register
96 6.4.7. Automatic Search Function for FM-Carrier Detection in Satellite Mode
97 6.5. Manual/Compatibility Mode: Description of DSP Write Registers
97 6.5.1. Additional Channel Matrix Modes
97 6.5.2. Volume Modes of SCART1/2 Outputs
97 6.5.3. FM Fixed Deemphasis
97 6.5.4. FM Adaptive Deemphasis
98 6.5.5. NICAM Deemphasis
98 6.5.6. Identification Mode for A2 Stereo Systems
98 6.5.7. FM DC Notch
98 6.6. Manual/Compatibility Mode: Description of DSP Read Registers
98 6.6.1. Stereo Detection Register for A2 Stereo Systems
98 6.6.2. DC Level Register
99 6.7. Demodulator Source Channels in Manual Mode
99 6.7.1. Terrestric Sound Standards
99 6.7.2. SAT Sound Standards
101 6.8. Exclusions of Audio Baseband Features
101 6.9. Phase Relationship of Analog Outputs
101 6.10. Compatibility Restrictions to MSP 34xxD

4 Micronas

PRELIMINARY DATA SHEET

Contents, continued

Page Section Title

102 7. Appendix D: MSP 34x1G Version History

103 8. Appendix E: Application Circuit

104 9. Data Sheet History

MSP 34x1G

License Notice:

1)

"Dolby", “Virtual Dolby Surround” and the double-D symbol are trademarks of Dolby Laboratories.

Supply of this implementation of Dolby Technology does not convey a license nor imply a right under any patent, or any other industrial or intellec­tual property right of Dolby Laboratories, to use this implementation in any finished end-user or ready-to-use final product. Companies planning to
use this implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products.

Micronas 5

MSP 34x1G PRELIMINARY DATA SHEET

Multistandard Sound Processor Family with Virtual
Dolby Surround

Release Note: Revision bars indicate significant
changes to the previous edition.The hardware and
software description in this document is valid for
the MSP 34x1G version B8 and following versions.

1. Introduction

The MSP 34x1G family of single-chip Multistandard
Sound Processors covers the sound processing of all
analog TV-Standards worldwide, as well as the NICAM
digital sound standards. The full TV sound processing,
starting with analog sound IF signal-in, down to pro­cessed analog AF-out, is performed on a single chip.

Figure 1–1 shows a simplified functional block diagram
of the MSP 34x1G.

The MSP 34x1G has all functions of th e MSP 34x0G
with the addition of a virtual surround sound feature.

Surround sound can be re produce d to a certain extent
with two loudspeakers. The MSP 34x1G includes the
Micronas virtualizer alg orithm “3D-PANORAMA” which
has been approved by the Dolby

1)

Laboratories for
compliance with the " Virtual Do lby Surround" technol­ogy. In addition, the MSP 34x1G includes the “PAN-
ORAMA” algorithm.

These TV sound processing ICs include versions for
processing the multichannel television sound (MTS)

signal conforming to the standard recommended by
the Broadcast Television Systems Committe e (BTSC) .
The DBX noise reduction, or alternatively, Micronas
Noise Reduction (MNR) is performed alignment free.

Other processed sta ndards are the Japanese FM-FM
multiplex standard (EIA-J) and the FM Stereo Radio
standard.

Current ICs have to perform adjustment p rocedures i n
order to achieve good stereo separatio n for BTSC a nd
EIA-J. The MSP 34x1G has optimum stereo perfor­mance with out any adjustments.

All MSP 34xxG versions are pin compatible to the
MSP 34xxD. Only minor modifications are necessary
to adapt a MSP 34xxD controlling software to the
MSP 34xxG. The MSP 34x1G further simplifies con­trolling software. Standard se lection requires a single

2

C transmission only.

I
The MSP 34x1G has built-in autom atic functions: T he

IC is able to detect the actual sound standard automat­ically (Automatic Standard Detection). Furthermore,
pilot levels and identificatio n signals can be evaluated
internally with subsequent switching between mono/
stereo/bilingual; no I

2

C interaction is neces sary (Auto-

matic Sound Selection).
The ICs are produced in submicron CMOS technology.

The MSP 34x1G is available in the following packages:
PLCC68 (not intended for new designs), PSDIP64,
PSDIP52, PQFP80, and PLQFP64.

Sound IF1

Sound IF2

I2S1
I2S2

SCART1

SCART2

SCART3

SCART4

MONO

ADC

SCART

DSP

Input

Select

De-

modulator

ADC

Pre-

processing

Prescale

Prescale

Fig. 1–1: Simplified functional block diagram of the MSP 34x1G

Source Select

Loud-

speaker

Sound

Processing

Headphone

Sound

Processing

DAC

DAC

DAC

DAC

SCART
Output

Select

Loud­speaker

Subwoofer

Headphone

I2S

SCART1

SCART2

6 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

1.1. Features of the MSP 34x1G Family and Differences to MSP 34xxD

Feature (New features not available for MSP 34xxD are shaded gray.) 3401 3411 3421 3441 3451 3461

3D-PANORAMA virtualizer (approved by Dolby Laboratories) with noise generator
PANORAMA virtualizer algorithm
Standard Selection with single I
Automatic Standard Detection of terrestrial TV standards/Automatic Carrier Mute function X X X X X X
Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS
Two selectable sound IF (SIF) inputs X X X X X X
Interrupt output programmable (indicating status change)
Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness X X X X X X
Loudspeaker channel with MDB (Micronas Dynamic Bass)
AVC: Automatic Volume Correction X X X X X X
Subwoofer output with programmable low-pass and complementary high-pass filter X X X X X X
5-band graphic equalizer for loudspeaker channel X X X X X X
Spatial effect for loudspeaker channel; processing of all deemphasis filtering X X X X X X
Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs X X X X X X
Complete SCART in/out switching matrix X X X X X X

2

Two I

S inputs; one I2S output XXXXXX
All analog FM-Stereo A2 and satellite standards X X X
All analog Mono sound carriers including AM-SECAM L
Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM
Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) X X X X
ASTRA Digital Radio (ADR) together with DRP 3510A X X X X
All NICAM standards XX
Demodulation of the BTSC multiplex signal and the SAP channel
Alignment free digital DBX noise reduction for BTSC Stereo and SAP
Alignment free digital Micronas Noise Reduction (MNR) for BTSC Stereo and SAP
BTSC stereo separation (MSP 3421/41G also EIA-J) significantly better than spec.
SAP and stereo detection for BTSC system
Korean FM-Stereo A2 standard X X X X X
Alignment-free Japanese standard EIA-J
Demodulation of the FM-Radio multiplex signal

2

C transmission X X X X X X

X X X X X X
X X X X X X

X X X X X X

X X X X X X

X X X X X X

X X X X X X

X X

X X X

X X
X
X X X
X X X

X X X
X X X

1.2. MSP 34x1G Version List

Version Status Description

MSP 3401G available FM Stereo (A2) Version
MSP 3411G available NICAM and FM Stereo (A2) Version
MSP 3421G available NTSC Version (A2 Korea, BTSC with Micronas Noise Reduction (MNR), Japanese EIA-J system)
MSP 3441G not confirm ed NT SC Version (A2 Korea, BTSC with DBX noise reduction, Japanese EIA-J system)
MSP 3451G available Global Version (all sound standards)
MSP 3461G not confirm ed Global Mono Version (all sound Standards)

Micronas 7

MSP 34x1G PRELIMINARY DATA SHEET

1.3. MSP 34x1G Versions and their Application Fields

Table 1–1 provides an overview of TV sound standards
that can be processed by the MSP 34x1G family. In
addition, the MSP 34x1G is able to handle the FM­Radio standard. With the MSP 34x1G, a complete

multimedia receiver covering all TV sound standards
together with terr estr ial/cable an d satellit e radio soun d
can be built; even ASTRA Digital Radio can be pro­cessed (with a DRP 3510A coprocessor).

Table 1–1: TV Stereo Sound Standards covered by the MSP 34x1G IC Family (details see Appendix A)

MSP Version

3401

3401

3401

3411

TV­System

B/G

L 6.5/5.85 AM-Mono/NICAM SECAM-L France
I 6.0/6.552 FM-Mono/NICAM PAL UK, Hong Kong

D/K

3451

Satellite

Position of Sound
Carrier /MHz

5.5/5.7421875 FM-Stereo (A2) PAL Germany

5.5/5.85 FM-Mono/NICAM PAL Scandinavia, Spain

6.5/6.2578125 FM-Stereo (A2, D/K1) SECAM-East Slovak. Rep.

6.5/6.7421875 FM-Stereo (A2, D/K2) PAL currently no broadcast

6.5/5.7421875 FM-Stereo (A2, D/K3) SECAM-East Poland

6.5/5.85 FM-Mono/NICAM (D/K, NICAM) PAL China, Hungary

6.5

7.02/7.2

7.38/7.56
etc.

Sound
Modulation

FM-Mono
FM-Stereo

ASTRA Digital Radio (ADR)
with DRP 3510A

Color
System

PAL

Broadcast e.g. in:

Europe Sat.
ASTRA

4.5/4.724212 FM-Stereo (A2) NTSC Korea

M/N

3421, 3441

FM-Radio 10.7 FM-Stereo Radio USA, Europe

3461 all Standards, but Mono demodulation only

SAW Filter

Tuner

Composite
Video

4.5 FM-FM (EIA-J) NTSC Japan

4.5 BTSC-Stereo

33 34 39 MHz 4.5 9 MHz

Sound
IF
Mixer

Mono

Vision
Demo­dulator

SCART
Inputs

SCART1
SCART2
SCART3

SCART4

+ SAP NTSC, PAL USA, Argentina

Loudspeaker

1

2

2

2

2

MSP 34x1G

2

2

SCART1
SCART2

Subwoofer

Headphone

SCART
Outputs

I2S2ADRI2S1

Dolby
Pro Logic
Processor
DPL 351xA

ADR
Decoder
DRP 3510A

Fig. 1–2: Typical MSP 34x1G application

8 Micronas

Micronas 9

ANA_IN1+

ANA_IN2+

ADR-Bus
Interface

AGC

A

D

Standard Selection

DEMODULATOR

(incl. Carrier Mute)

Decoded
Standards:

−

NICAM

−

A2

−

AM

−

BTSC

−

EIA-J

−

SAT

−

FM-Radio

Deemphasis:
50/75 µs, J17
DBX/MNR
Panda1

Deemphasis

J17

Standard

and Sound

Detection

FM/AM

Prescale

NICAM

Prescale

(0E

hex

(10

hex

I2C

Read

Register

Automatic

Sound Select

Stereo or A/B

)

Stereo or A

Stereo or B

)

FM/AM

0

1

3

4

Loud­speaker
Channel

Matrix

(08

)

hex

Virtualizer

Noise

Generator

(29

AVC

hex

)

Bass/

Treble

or

Equalize

(02
(03

Loud­ness

Σ

)

hex

)

hex

(04

hex

Beeper

(14

)

hex

Comple-

Spatial

mentary

Highpass

)(05

(2D

0.5

hex

Lowpass

(2D

hex

Balance

Level

Adjust

Volume

)

hex

(00

)

hex

Effects

)(01

)

hex

)(2C

MDB

)

hex

D

A

DACM_L

DACM_R

DACM_SUB

2. Functional Description

PRELIMINARY DATA SHEET MSP 34x1G

I2S_DA_IN1

I2S_DA_IN2

SC1_IN_L

Headphone

I2S

Interface

I2S

Interface

A

I2S1

Prescale

(16

)

hex

I2S2

Prescale

(12

)

hex

SCART

D

Prescale

(0D

)

hex

SCART DSP Input Select

)

(13

hex

Channel

Source Select

Matrix

(09

I2S

Channel

Matrix

(0B

Quasi-Peak

Channel

Matrix

(0C

SCART1

Channel

Matrix

(0A

SCART2

Channel

Matrix

(41

)

hex

I2S

Interface

)

hex

Quasi-Peak

Detector

)

hex

Volume

(07

)

hex

Volume

)(40

hex

hex

hex

5

6

2

Bass/

Treble

(31/32

)(33

hex

I2C

Read

Register

Loudness

Σ

hex

(19

)

hex

(1A

)

hex

D

A

)

D

SCART1_L/R

SCART2_L/R

A

)

SC1_IN_R
SC2_IN_L
SC2_IN_R
SC3_IN_L

SCART Output Select

SC3_IN_R
SC4_IN_L
SC4_IN_R

MONO_IN

Fig. 2–1: Signal flow block diagram of the MSP 34x1G (input and output names correspond to pin names)

)

I2S_DA_OUT

)

(13

hex

SC1_OUT_L

SC1_OUT_R

SC2_OUT_L

SC2_OUT_R

Balance

(30

Volume

D

DACA_L

A

)

(06

hex

)

hex

DACA_R

MSP 34x1G PRELIMINARY DATA SHEET

2.1. Architecture of the MSP 34x1G Family

Fig. 2–1 on page 9 shows a simplified block diagram of
the IC. The block diagram contains all features of the
MSP 3451G. Other members of the MSP 34x1G family
do not have the complete set of features: The demodu­lator handles only a subset of the standards presented
in the demodulator block; NICAM processing is only
possible in the MSP 3411G and MSP 3451G.

2.2. Sound IF Processing

2.2.1. Analog Sound IF Input

The input pins ANA_IN1+, ANA_IN2+, and ANA_IN
offer the possibility to connect two different sound IF
(SIF) sources to the MSP 34x1G. The analog-to-digital
conversion of the preselected sound IF si gnal is done
by an A/D-converter. An analog automatic gain circuit
(AGC) allows a wide range of input levels. The high­pass filters for med by the coupling capaci tors at pins
ANA_IN1+ and ANA_IN2+ see Section 8. “Appendix
E: Application Circuit” on page 103 are sufficient in
most cases to suppress video components. Some
combinations of SAW fi lters and sound IF mixer ICs,
however, show large pic ture components on their out­puts. In this case, further filtering is recommended.

2.2.2. Demodulator: Standards and Features

The MSP 34x1G is able to demodulate all TV-sound
standards world wide including the digita l NICAM sys­tem. Depending on the MSP 34x1G version, the fol­lowing demodulation modes can be performed:

A2 Systems: Detection and demo dulation o f two sep­arate FM carriers (FM 1 and FM2), demodulation and
evaluation of the identification signal of carrier FM2.

NICAM Systems: Demodulation and decoding of the
NICAM carrier, detection and demodulation of the ana­log (FM or AM) ca r rier. For D/K-NICAM, the F M ca rrier
may have a maximum deviation of 384 kHz.

Very high deviation FM-Mono: Detection and robust
demodulation of one FM carr ier wit h a maximum devi­ation of 540 kHz.

BTSC-Stereo: Detection and FM demodulation of the
aural carrier resulting in the MTS/MP X signal. Detec­tion and evaluation of the pilot carri er, AM demodula­tion of the (L
carrier. Processing of DBX noise reduction or Micronas
Noise Reduction (MNR).

−R)-carrier and de tectio n of the S AP s ub-

BTSC-Mono + SAP: Detection and FM demodulation
of the aural carrier resulting in the MTS/MPX signal.
Detection and evaluation of the pilot c arrier, detection
and FM demodulation of the SAP su bcarr ier. Process­ing of DBX noise reduction or Micronas Noise Redu c­tion (MNR).

Japan Stereo: Detection and FM demodulation of the
aural carrier resulting in the MPX signal. Demodulation
and evaluation of the identification signal and FM
demodulation of the (L

FM-Satellite Sound: Demodulation of one or two FM
carriers. Processin g of high-deviation mono or narrow
bandwidth mono, stereo, or bilingual satellite sound

−

according to the ASTRA specification.
FM-Stereo-Radio: Detection and FM demodulation of

the aural carr ier res ultin g in t he MPX signal . Detec tion
and evaluation of the pilot carrier and A M demodula­tion of the (L

The demodulator blocks of all MSP 34x1G versions
have identical user interfaces. Even completely di ffer­ent systems like the BTSC and NICAM systems are
controlled the same way. Standards are selected by
means of MSP Standard Cod es. Automatic processes
handle standard detection and identification without
controller interaction. The key features of the
MSP 34x1G demodulator blocks are

Standard Selection: The controlling of the demodula­tor is minimized: All parameters, such as tuning fre­quencies or filter bandwidth, are adjusted automati­cally by transmitting one single value to the
STANDARD SELECT register. For all standards, spe­cific MSP standard codes are defined.

Automatic Standard Detection: If the TV sound stan­dard is unknown, the MSP 34x1G can automatically
detect the actual standard, switch to that standard, and
respond the actual MSP standard code.

Automatic Car rier Mute: To prevent no ise effects or
FM identification problems in the absence of an FM
carrier, the MSP 34x1G offers a configurable carrier
mute feature, which is activated automatically if th e T V
sound standard is selected by means of the STAN­DARD SELECT register. If no FM carrier is detected at
one of the two MSP demodula tor channels, the corre­sponding demodulator output is muted. This is indi­cated in the STATUS register.

−R)-carrier.

−R)-carrier.

10 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

2.2.3. Preprocessing of Demodulator Signals

The NICAM signals must be processed by a deempha­sis filter and adjusted in level. The analog demodu­lated signals must be processed by a deemphasis fil­ter, adjusted in level, and dematrixed. The correct
deemphasis filters ar e already selected by setting the
standard in the STANDARD SELECT register. The
level adjustment has to be done by means of the FM/
AM and NICAM prescale registers. The necessary
dematrix function depends on the selected sound stan­dard and the actual broad casted sound mode (mono,
stereo, or bilingual). It can be manually se t by the FM
Matrix Mode register or automatically by the Automatic
Sound Selection.

2.2.4. Automatic Sound Select

In the Automatic Sound Select mode, the dematrix
function is automatically selected based on the identifi­cation information in the STATUS register. No I

2

interaction is nec essary when t he broadcasted sou nd
mode changes (e.g. from mono to stereo).

The demodulator su pports the identifica tion check by
switching between mono-compatible standards (stan­dards that have the same FM-Mono car rier) automa ti­cally and non-audible. If B/G-FM or B/G-NICAM is
selected, the MSP will switch between these stan­dards. The same action is performed for the stan­dards: D/K1-FM, D/K2-FM , D/K3-FM a nd D/K-NICAM.
Switching is onl y done in the a bsenc e of any ste reo or
bilingual identification. If identification is found, the
MSP keeps the detected standard.

In case of high bit-error rates, the MSP 34x1G auto­matically falls back from digit al NICAM sound to ana­log FM or AM mono.

– “Stereo or A” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broad­cast, it contains language A (on left and right).

– “Stereo or B” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broad­cast, it contains language B (on left and right).

Fig. 2–2 and Table 2–2 show the source channel
assignment of the demodulated signals in case of
Automatic Sound Select mode for all sound standards.

Note: The analog primary input channel contains the
signal of the mono FM/AM carr ier or the L+R s ignal of
the MPX carrier. The secondary input channel contains
the signal of the 2nd FM carrier, the L-R signal of the
MPX carrier, or the SAP signal.

Source Select

LS Ch.
Matrix

Output-Ch.
matrices
must be set
once to
stereo.

primary
channel

C

secondary
channel

NICAM A

NICAM B

FM/AM

Prescale

NICAM

Prescale

Automatic

Sound
Select

FM/AM

Stereo or A/B

Stereo or A

Stereo or B

0

1

3

4

Fig. 2–2: Source channel assignment of demodulated
signals in Automatic Sound Select Mode

2.2.5. Manual Mode

Fig. 2–3 shows the source channel assignment of
demodulated sig nals in ca se of manual m ode. If man­ual mode is required, more information can be found in
Section 6.7. “Demodulator Source Channels in Manual
Mode” on page 99.

Table 2–1 summarizes all actions that take place when
Automatic Sound Select is switched on.

To provide more flexibility, the Automatic Sound Select
block prepares four different source channels of
demodulated sound (Fig. 2–2). By choosing one of the
four demodulator channels, the preferred sound mode
can be selected for each of th e output chan nels (loud­speaker, headphone, etc.). This is done by means of

primary
channel

secondary
channel

NICAM A

NICAM B

FM/AM

Prescale

NICAM

Prescale

FM-Matrix

FM/AM

NICAM

(Stereo or A/B)

0

1

Source Select

LS Ch.
Matrix

Output-Ch.
matrices
must be set
according to
the standard.

the Source Select registers.
The following source channe ls of demodulated sou nd

are defined:

Fig. 2–3: Source channel assignment of demodulated
signals in Manual Mode

– “FM/AM” channel: Analog mono sound, stereo if

available. In case of NICAM, analog mono only
(FM or AM mono).

– “Stereo or A/B” channel: Analog or digital mono

sound, stereo if available. In case of bilingual broad­cast, it contains both languages A (left) and B
(right).

2.3. Preprocessing for SCART and

2

S Input Signals

I

The SCART and I

2

S inputs need only be adjusted in
level by means of the SCART and I
ters.

2

S prescale regis-

Micronas 11

MSP 34x1G PRELIMINARY DATA SHEET

Table 2–1: Performed actions of the Automatic Sound Selection

Selected TV Sound Standard Performed Actions

B/G-FM, D/K-FM, M-Korea,
and M-Japan

B/G-NICAM, L-NICAM, I-NICAM,
and D/K-NICAM

Evaluation of the identification signal and automatic switching to mono, stereo, or bilingual. Preparing four
demodulator source channels according to Table 2–2.

Evaluation of NICAM-C-bits and automatic switching to mono, stereo, or bilingual. Preparing four
demodulator source channels according to Table 2–2.

In case of bad or no NICAM reception, the MSP switches automatically to FM/AM mono and switches
back to NICAM if possible. A hysteresis prevents periodical switching.

B/G-FM, B/G-NICAM
or
D/K1-FM, D/K2-FM, D/K3-FM,
and D/K-NICAM

Automatic searching for stereo/bilingual-identification in case of mono transmission. Automatic and non­audible changes between Dual-FM and FM-NICAM standards while listening to the basic FM-Mono sound
carrier.
Example: If starting with B/G-FM-Stereo, there will be a periodical alternation to B/G-NICAM in the
absence of FM-Stereo/Bilingual or NICAM-identification. Once an identification is detected, the MSP
keeps the corresponding standard.

BTSC-STEREO, FM Radio Evaluation of the pilot signal and automatic swit ching to mono or stereo. Preparing four demodulator

source channels according to Table 2–2. Detection of the SAP carrier.

BTSC-SAP In the absence of SAP, the MSP switches to BTSC-Stereo if available. If SAP is detected, the MSP

switches automatically to SAP (see Table 2–2).

Table 2–2: Sound modes for the demodulator source channels with Automatic Sound Select

Source Channels in Automatic Sound Select Mode

Broadcasted
Sound
Standard

Selected
MSP Standard

3)

Code

Broadcasted
Sound Mode

FM/AM

(source select: 0)

Stereo or A/B

(source select: 1)

Stereo or A

(source select: 3)

Stereo or B

(source select: 4)

M-Korea
B/G-FM
D/K-FM
M-Japan

B/G-NICAM
L-NICAM
I-NICAM
D/K-NICAM
D/K-NICAM

(with high
deviation FM)

02

1)

03, 08
04, 05, 07, 0B
30

2)

08, 03
09
0A

2)

, 05

2)

0B, 04
0C, 0D

MONO Mono Mono Mono Mono

1)

STEREO Stereo Stereo Stereo Stereo
BILINGUAL:

Languages A and B
NICAM not available or

Left = A
Right = B

Left = A
Right = B

AB

analog Mono analog Mono analog Mono analog Mono

error rate too high
MONO an alog Mono NICAM Mono NICAM Mono NICA M Mono
STEREO analog Mono NICAM Stereo NICAM Stereo NICAM Stereo
BILINGUAL:

Languages A and B

analog Mono Left = NICAM A

Right = NICAM B

NICAM A NICAM B

20, 21 MONO Mono Mono Mono Mono

STEREO Stereo Stereo Stereo Stereo

20 MONO+SAP Mono Mono Mono Mono

BTSC

21 MONO+SAP Left = Mono

STEREO+SAP Stereo Stereo Stereo Stereo

Right = SAP

STEREO+SAP Left = Mono

Right = SAP

Left = Mono
Right = SAP

Left = Mono
Right = SAP

Mono SAP

Mono SAP

FM Radio 40 MONO Mono Mono Mono Mono

STEREO Stereo Stereo Stereo Stereo

1)

The Automatic Sound Select process will automatically switch to the mono compatible analog standard.

2)

The Automatic Sound Select process will automatically switch to the mono compatible digital standard.

3)

The MSP Standard Codes are defined in Table 3–7 on page 23.

12 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

2.4. Source Selection and Output Channel Matrix

The Source Selec tor makes it poss ible to distribute al l
source signals ( one of the demodulator source chan­nels, SCART, or I

2

S input) to the de sired output ch an­nels (loudspeaker, headphone, etc.). All input a nd out­put signals can be processed simultaneously. Each
source channel is identified by a unique source
address.

For each output channel, the s ound mode can be set
to sound A, sound B, stereo, or mono by means of the
output channel matrix.

If Automatic Sound Select is on, the output channel
matrix can stay fixed to stereo (transparent) for
demodulated signals.

2.5. Audio Baseband Processing

2.5.1. Automatic Volume Correction (AVC)

Different sound sources (e.g. terrest rial c hannels, SAT
channels, or SCART) fairly often do not have the same
volume level. Advertisements during movies usually
have a higher volume level than the movie itself. This
results in annoying volume changes. The AVC solves
this problem by equalizing the volume level.

To prevent clipping, the AVC’s gain decreases quickly
in dynamic boost conditions. To suppress oscillation
effects, the gain increases rather slowly for low level
inputs. The decay time is p rogrammable by means of
the AVC register (see page 33).

2.5.2. Loudspeaker and Headphone Outputs

The following baseband features are implemented in
the loudspeaker and headphone output channels:
bass/treble, loudness, balanc e, and volume. A square
wave beeper can be added to the loudspeaker and
headphone channel. The loudspeaker channel addi­tionally performs: equalizer (not simultaneously with
bass/treble), spatial effects, and a subwoofer cross­over filter.

2.5.3. Subwoofer Output

The subwoofer signal is created by combin ing the left
and right chan nels directly behind the loudness block
using the formula (L+R)/2. Due to the division by 2, the
D/A converter will not be overloaded, even with full
scale input sign als. The subwoofer signal is fil tered by
a third-order low-pass wi th programmable corner fre­quency followed by a level adjustment. At the loud­speaker channels, a complementary high-pass filter
can be switched on. Subwoofer and loudspeaker out­put use the same volume (Louds peaker Volum e Reg­ister).

2.5.4. Quasi-Peak Detector

The quasi-peak reado ut register can be used to read
out the quasi-pe ak level of any input source. The fea­ture is based on following filter time constants:

attack time: 1.3 ms
decay time: 37 ms

For input signals ranging from
AVC maintains a fixed output level of

−24 dBr to 0 dBr, the

−18 dBr. Fig. 2–4

shows the AVC output level versus its input level. For
prescale and volume registers set to 0 dB, a level of
0 dBr corresponds to full scale input/output. This is

– SCART input/output 0 dBr = 2.0 V
– Loudspeaker output 0 dBr = 1.4 V

rms
rms

output level
[dBr]

−18

−24

input level

−30 −24 −18 −12 −6

0

[dBr]

Fig. 2–4: Simplified AVC characteristics

Micronas 13

MSP 34x1G PRELIMINARY DATA SHEET

Frequency

MDB_LIMIT

MDB_HP MDB_LP

Signal Level

Amplitude

SUBW_FREQ

(db)

2.5.5. Micronas Dynamic Bass (MDB)

The Micronas Dynamic Bass system (MDB) extends
the frequency range of loudspeakers or headphones.

After the adaption of MDB to the loudspeakers and the
cabinet, fur ther customizing of MDB allows individual
fine tuning of the sound.

Amplitude (db)

The MDB is placed in the su bwoo fer path. For applica­tions without a subwoofer, the enhanced bass signal
can be added back onto the Left/Right c hannels (see
Fig. 2–1 on page 9). Micronas Dynamic Bass com­bines two effects: dynamic amplification and adding
harmonics.

2.5.5.1. Dynamic Amplification

Low frequency signals can be boosted while the output
signal amplitude is mea sured. If the amplitude comes
close to a definable limit, the gain is reduced automati­cally in dynamic Volume mode. Therefore, the system
adapts to the signal amplitud e which is really present
at the output of th e MSP device. Clipping effects are
avoided.

MDB_HP

Frequency

Fig. 2–6: Adding harmonics

2.5.5.3. MDB Parameters

Several parameters allow tuning the characteristics of
MDB according to the TV loudspeaker, the cabinet,
and personal preferences (see Table 3–11). For more
detailed information on how to set up MDB, please
refer to the corresponding application note on the
Micronas homepage.

2.6. Virtual Surround System Application Tips

2.6.1. Sweet Spot

Good results are on ly obtained in a rather close area
along the middle ax is between the two loudspeakers:
the sweet spot. Moving away from this position
degrades the effect.

Fig. 2–5: Dynamic amplification

2.5.5.2. Adding Harmonics

MDB exploits the psychoacousti c phenomenon of the
‘missing fundamental’. Adding harmonics of the fre­quency components be low the cutoff frequency gives
the impression of actually hearing the low frequency
fundamental. In other words: The listener has the
impression that a loudspeaker system seem s to repr o­duce frequencies althoug physically not possible.

2.6.2. Clipping

For the test at Dolby Labs, it is very important to have
no clipping effects even with worst case signals. That
is, 2 Vr ms input sign al may not clip. The SCART Input
Prescale register has to be set to values of 19
(25

) or lower (see SCART Input Prescale o n page

dec

hex

30).
Test signal s: sine sweep with 2 V

; L only, R only,

RMS

L&R equal phase, L&R anti phase.
Listening tests: Dolby Trailers (train trailer, city trailer,

canyon trailer...)

14 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

2.6.3. Loudspeaker Requirements

The loudspeakers used and their positioning inside the
TV set will greatly influence the performance of the vir­tualizer. The algorithm works with the direct sound
path. Reflected sound waves reduce the effect. So it’s
most important to have as much direct sound as possi­ble, compared to indirect sound.

To obtain the approval for a TV set, Dolby Laboratories
require mounting the lo udspeakers in front of the set.
Loudspeakers radiating to the side of the TV set will
not produce convincing effects. Good di rectionality of
the loudspeakers towards the listener is optimal.

The virt ualizer was specially developed for implemen­tation in TV sets. Even for rather small stereo TV's,
sufficient sound effects can be obtained. For small
sets, the loudspeaker placement sho uld be to the si de
of the CR T; for large screen se t s (or 16:9 sets), m ou nt ­ing the loudspeakers below the CRT is acceptable
(large separation is preferred, low freq uency speakers
should be outmost to avoid cancellation effects). Using
external loudspeakers with a la rg e s te re o b as e wi ll n ot
create optimal effects.

The loudspeakers should be able to reproduce a wi de
frequency range. The most impor tant fr equency range
starts from 160 Hz and ranges up to 5 kHz.

Great care has to be taken with syst ems that us e one
common subwoofer: A single loudspeaker cannot
reproduce vir tual sound locations. The crossover fre­quency must be lower than 120 Hz.

2.7. SCART Signal Routing

2.7.1. SCART DSP In and SCART Out Select

The SCART DSP Input Select and SCART Output
Select blocks include full matrix switching facilities. To
design a TV set with four pairs of SCART-inputs and
two pairs of SCART-outputs, no external switching
hardware is required. The switches are controlled by
the ACB user register (see page 41).

2.7.2. Stand-by Mode

If the MSP 34x1G is switched off by first pulling
STANDBYQ low and t hen (a fter >1

µs delay) switching

off DVSUP and AVSUP, but keeping AHVSUP
(‘Stand-by’-mode), the SCART switches maintain
their position and function. This allows the copying
from SCART-input to SCART-output in the TV set’s
stand-by mode.

In case of power on or starti ng from stand-by (switch­ing on the DVSUP and AVSUP, RESETQ going high
2 ms later) , all inte r nal registe rs except th e ACB regis­ter (page 41) are reset to the default configuration (see
Table 3–5 on page 20). The reset positi on of the ACB
register becomes act ive after the first I

2

C transmission
into the Baseband Processing part. By transmitting the
ACB register first, the reset state can be redefined.

2.6.4. Cabinet Requirements During listenin g tests at Dolby Laboratories, no reso-

nances in the cabinet should occur.

Good material to check for resonances are the Dolby
Trailers or other dynamic sound tracks.

Micronas 15

MSP 34x1G PRELIMINARY DATA SHEET

2.8. I2S Bus Interface

The MSP 34x1G has a synchronous master/slave
input/output interface running on 32 kHz.

The interface accepts two formats:

2

S_WS changes at the word boundary

1. I

2

2. I

S_WS changes one I2S-clock period before the

word boundaries.

2

S options are set by means of the MO DUS and

All I
the I2S_CONFIGURATION registers.

2

S bus interface consists of five pins:

The I
– I 2S _ DA _ I N 1 , I 2 S _ DA _ I N 2 :

2

I

S serial data input: 16, 18....32 bits per sample

– I2S_DA_OUT:

2

I

S serial data output: 16, 18...32 bits per sample

– I2S_CL:

2

I

S serial clock

– I2S_WS:

2

I

S word strobe signal defines the left and right

sample

If the MSP 34x1G serves as the master on the I

2

interface, the clock and word strobe lines are driven by
the IC. In this mode, only 16 or 32 bits per sample can
be selected. In slave mode, these lines are input to the
IC and the MSP clock is synchronized to 576 times the
I2S_WS rate (32 kHz). NICAM o peration is not possi­ble in slave mode.

2

S timing diagram is shown in Fig. 4–28 on

An I
page 71.

2.9. ADR Bus Interface

For the ASTRA Digital Radio System (ADR), the
MSP 340 1G, MSP 3411G, and MSP 3451G performs
preprocessing such as carrier selection and filtering.
Via the 3-line ADR-bus, the resulting signals are trans­ferred to the DRP 3510A coprocessor, where the
source decoding is per formed. To be prepared for an
upgrade to ADR with an additional DRP board, the fol­lowing lines of MSP 34x1G should be provided on a
feature connector:

– AUD_CL_OUT
– I2S_DA_IN1 or I2S_DA_IN2
– I2S_DA_OUT
– I2S_WS
– I2S_CL
– ADR_CL, ADR_WS, ADR_DA

For more details, please refer to the DRP 35 10A data
sheet.

2.10. Digital Control I/O Pins and Status Change Indication

S

The static level of the digital input/output pins
D_CTR_I/O_0/1 is switchable between HIGH and
LOW via the I
(see page 41). This enables the control ling of exter nal
hardware switches or other devices via I

2

C-bus by means of the ACB register

2

C-bus.

The digital input/outpu t pins can be set to hig h imped­ance by means of the MODUS register (see page 26).
In this mode, the pi ns can be used as input. The cur­rent state can be read o ut of the STATUS register (see
page 28).

Optionally, the pin D_CTR_I/O_1 can be used as an
interrupt request signa l to the c ontrol ler, indicating any
changes in the read register STATUS. This makes poll­ing unnecessary, I

2

C bus interactions are reduced to a
minimum (see STATUS register on page 28 and
MODUS register on page 26).

2.11. Clock PLL Oscillator and Crystal Specifications

The MSP 34x1G derives all internal system clocks
from the 18.432-MHz oscillator. In NICAM or in I

2

S­Slave mode, the clock is phase-locked to the corre­sponding source. Therefore, it is not possible to use
NICAM and I

2

S-Slave mode at the same time.

For proper performance, the MSP clock oscillator
requires a 18.432-MHz crystal. Note that for the
phase-locked modes (NICAM, I

2

S-Slave), crystals with

tighter tolerance are required.

16 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

3. Control Interface

2

C Bus Interface

3.1. I

The MSP 34x1G is controlled via the I

2

C bus slave

interface.
The IC is selected by transmitting one of the

MSP 34x 1G device addresses. In order to allow up to
three MSP ICs to be connected to a single bus, an
address select pin (ADR_SEL) has been implemented.
With ADR_SEL pulled to high, low, or left open, the
MSP 34x 1G res ponds to different device addresses. A
device address pair is defined as a write address and a
read address (see Table 3–1).

Writing is done by sending the write device address,
followed by the subaddress byte, two address bytes,
and two data bytes.

Reading is done by sending the wr ite device address,
followed by the subaddress byte and two address
bytes. Without sending a stop c ondi tion, r ea din g of t he
addressed data is completed by sending the device
read address and reading two bytes of data.

2

Refer to Section 3.1.3 . for the I
Section 3.4. “Programming T ips” on page 45 for pro­posals of MSP 34x1G I

2

C telegrams. See Table 3–2

C bus protocol and to

for a list of available subaddresses.

response time is about 0.3 ms. If the MSP cannot
accept another byte of data (e.g. while servicing an
internal int err upt), it ho lds th e clock line I2C_CL l ow to
force the transmitter into a wait state. The I
Master must read back the clock line to detect when
the MSP is ready to r ecei ve the next I

2

C transmission.

2

C Bus

The positions within a transmission where this may
happen are indicated by ’Wait’ in Section 3.1.3. The
maximum wait period of the MSP during normal opera­tion mode is less than 1 ms.

3.1.1. Inte rnal Hardware Error Handling

In case of any hardware problems (e.g. interruption of
the power supply of the MSP), the MSP’s wait period is
extended to 1.8 ms. After thi s time perio d elapses, the
MSP releases data and clock lines.

Indication and solving the error status:

To indicate the error status, the remaining acknowl­edge bits of the actual I
Additionally, bit[14] of CONTROL is set to one. The
MSP can then be r eset via the I

2

C-protocol will be left high.

2

C bus by transmitting

the RESET condition to CONTROL.

Indication of reset:

Besides the possibility of hardware reset, the MSP can
also be reset by means of the RE SET bit in the CON­TROL register by the controller via I

Due to the architecture o f the MS P 34x1G, the IC c an­not react immediately to an I

Table 3–1: I

ADR_SEL Low

Mode Write Read Write Read Write Read

MSP device address 80

2

C Bus Device Addresses

2

C bus.

2

C request. The typical

(connected to DVSS)

hex

81

hex

Any reset, even caused by an unstable reset line etc.,
is indicated in bit[15] of CONTROL.

2

A general timing diagram of the I

C bus is shown in

Fig. 4–27 on page 69.

(connected to DVSUP)

84

hex

High

85

hex

88

hex

Left Open

89

Table 3–2: I2C Bus Subaddresses

Name Binary Value H ex Value Mode Function

CONTROL 0000 0000 00 Read/Write Write: Software reset of MSP (see Table 3–3)

Read: Hardware error status of MSP

WR_DEM 0001 0000 10 Write write address demodulator

hex

RD_DEM 0001 0001 11 Write read address demodulator
WR_DSP 0001 0010 12 Write write address DSP
RD_DSP 0001 0011 13 Write read address DSP

Micronas 17

MSP 34x1G PRELIMINARY DATA SHEET

3.1.2. Descrip tio n of CONTROL Register

Table 3–3: CONTROL as a Write Register

Name Subaddress Bit[15] (MSB) Bits[14:0]

CONTROL 00

hex

1 : RESET
0 : normal

0

Table 3–4: CONTROL as a Read Register

Name Subaddress %LW>@06% Bit>@ BitV>@

CONTROL 00

hex

RESET status after last reading of
CONTROL:

0 : no reset occured

Internal hardware status:
0 : no error occured
1 : internal error occured

not of interest

1 : reset occured

Reading of CONTROL will reset the bits[15,14] of CONTROL. After Powe r-on,

bit[15] of CONTROL will be set; it must be

read once to be reset.

3.1.3. Protocol Description

Write to DSP or Demodulator

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK data-byte

high

ACK data-byte

low

ACK P

Read from DSP or Demodulator

Swrite

device

address

Wait

ACK sub-addr ACK addr-byte

high

ACK addr-byte

low

ACK S read

device

address

Wait

ACK data-byte-

high

ACK data-byte

Write to Control Register

Swrite

device

address

Wait

ACK sub-addr ACK data-byte

high

ACK data-byte

low

ACK P

Read from Control Register

Swrite

device

address

Wait

Note: S = I

P = I

ACK 00hex ACK S read

2

C-Bus Start Condition from master

2

C-Bus Stop Condition from master

device

address

Wait

ACK data-byte-

high

ACK data-byte

low

NAK P

ACK = Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller, dark gray)
NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’

or from MSP indicating internal error state

2

Wait = I

C-Clock line is held low, while the MSP is processing the I2C command.

This waiting time is max. 1 ms

NAK P

low

18 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

I2C_DA

1
0

S P

I2C_CL

Fig. 3–1: I2C bus protocol (MSB first; data must be stable while clock is high)

3.1.4. Proposals for General MSP 34x1G

2

I

C Telegrams

3.1.4.1. Symbols

3.2. Start-Up Sequence:
Power-Up and I

After POWER-ON or RE SET (s ee F ig. 4–26), the IC is
in an inactive state. All registers are in the Res et posi-

daw write device address (80
dar read device address (81
< Start Condition

hex

hex

, 85

hex

hex

or 88

or 89

hex

hex

)

)

tion (see Table 3–5 and Table 3–6), the analog outputs
are muted. The controll er has to initialize all register s
for which a non-default setting is necessary.

, 84

> Stop Condition
aa Address Byte
dd Data Byte

3.3. MSP 34x1G Programming Interface

2

C-Controlling

3.1.4.2. Write Telegrams

<daw 00 d0 00> write to CONTROL register
<daw 10 aa aa dd dd> write data into demodulator
<daw 12 aa aa dd dd> write data into DSP

3.1.4.3. Read Telegrams

<daw 00 <dar dd dd> read data from

CONTROL register

<daw 11 aa aa <dar dd dd> read data from demodulator
<daw 13 aa aa <dar dd dd> read data from DSP

3.1.4.4. Examples

<80 00 80 00> RESET MSP statically
<80 00 00 00> Clear RESET
<80 10 00 20 00 03> Set demodulator to stand. 03
<80 11 02 00 <81 dd dd> Read STATUS
<80 12 00 08 01 20> Set loudspeaker channe l

source to NICAM and
Matrix to STEREO

hex

3.3.1. User Registers Overview

The MSP 34x1G is co ntrolled by mean s of use r regis­ters. The complete lis t of all user registers is given in
Table 3–5 and Table 3–6. The registers are partitioned
into the Demodulator section (subaddress 10
writing, 11
ing sections (subaddress 12

for reading) and the Baseband Process -

hex

for writing, 13

hex

hex

hex

for
for

reading).
Write and rea d registers are 16 bit wide, whereby the

MSB is denoted bit[15]. Transmissions via I

2

C bus have
to take place in 16-bit words (two byte transfers, with the
most significant byte transferred first). All write register s,
except the demodulator write registers are readable.

Unused parts of the 16-bit write registers must be zero.

Addresses not given in this table must not be
accessed.

For reasons of software compatibility to the
MSP 34 xx D, a Manual/Compatibility Mode i s available.
More read and wri te registers toge ther with a detailed
description can be found in “Appendix B: Manual/Com­patibility Mode” on page 85.

More examples of typical application protocols are
listed in Section 3.4. “Programming Tips” on page 45.

Micronas 19

MSP 34x1G PRELIMINARY DATA SHEET

Table 3–5: List of MSP 34x1G Write Registers

Write Register Address

(hex)

I2C Subaddress = 10

; Registers are not readable

hex

Bits Description and Adjustable Range Reset See

Page

STANDARD SELECT 00 20 [15:0] Initial Programming of the Demodulator 00 00 24

2

MODUS 00 30 [15:0] Demodulator, Automatic and I

2

I

S CONFIGURATION 00 40 [15:0] Configuration of I2S options 00 00 27

I2C Subaddress = 12

; Registers are all readable by using I2C Subaddress = 13

hex

hex

S options 00 00 26

Volume loudspeaker channel 00 00 [15:8] [+12 dB ... −114 dB, MUTE] MUTE 32
Volume / Mode loudspeaker channel [7:0] 1/8 dB Steps,

Reduce Volume / Tone Control / Compromise /

00

hex

Dynamic

Balance loudspeaker channel [L/R] 00 01 [15:8] [0...100 / 100% and 100 / 0...100%]

[

−127...0 / 0 and 0 / −127...0 dB]

100%/100% 33

Balance mode loudspeaker [7:0] [Linear / logarithmic mode] linear mode
Bass loudspeaker channel 00 02 [15:8] [
Treble loudspeaker channel 00 03 [15:8] [
Loudness loudspeaker channel 00 04 [15:8] [0 dB ...

+20 dB ... −12 dB] 0 dB 34
+15 dB ... −12 dB] 0 dB 35

+17 dB] 0 dB 36

Loudness filter characteristic [7:0] [NORMAL, SUPER_B AS S] NORMAL
Spatial effect strength loudspeaker ch. 00 05 [15:8] [

−100%...OFF...+100%] OFF 37

Spatial effect mode/customize [7:0] [SBE, SBE
Volume headphone channel 00 06 [15:8] [

+12 dB ... −114 dB, MUTE] MUTE 32

Volume / Mode headphone channel [7:0] 1/8 dB Steps, Reduce Volume / Tone Control 00

+PSE] SBE+PSE

hex

Volume SCART1 output channel 00 07 [15:8] [+12 dB ... −114 dB, MUTE] MUTE 40

2

Loudspeaker source select 00 08 [15:8] [FM/AM, NICAM, SCART, I

S1, I2S2] FM/AM 31

Loudspeaker channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31

2

Headphone source select 00 09 [15:8] [FM/AM, NICAM, SCART, I

S1, I2S2] FM/AM 31

Headphone channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31

2

SCART1 source select 00 0A [15:8] [FM/AM, NICAM, SCART, I

S1, I2S2] FM/AM 31

SCART1 channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31

2

S source select 00 0B [15:8] [FM/AM, NICAM, SCART, I2S1, I2S2] FM/AM 31

I

2

S channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31

I
Quasi-peak detector source select 00 0C [15:8] [FM/AM, NICAM, SCART, I

2

S1, I2S2] FM/AM 31
Quasi-peak detector matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31
Prescale SCART input 00 0D [15:8] [00
Prescale FM/AM 00 0E [15:8] [00

hex

hex

... 7F
... 7F

]00

hex

]00

hex

hex

hex

30

29
FM matrix [7:0] [NO_MAT, GSTEREO, KSTEREO] NO_MAT 30
Prescale NICAM 00 10 [15:8] [00

2

Prescale I

S2 00 12 [15:8] [00

hex

hex

... 7F

... 7F
ACB : SCART Switches a. D_CTR_I/O 00 13 [15:0] Bits [15..0] 00
Beeper 00 14 [15:0] [00

2

Prescale I

S1 00 16 [15:8] [00

hex

hex

... 7F

... 7F

] (MSP 3411G, MSP 3451G only) 00

hex

]10

hex

]/[00

hex

hex

... 7F

hex

]10

] 00/00

hex

hex

hex

hex

hex

hex

30
30
41
41
30

20 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

Table 3–5: List of MSP 34x1G Wri te Regi st ers, continued

Write Register Address

(hex)

Bits Description and Adjus table Range Reset See

Page

Mode tone control 00 20 [15:8] [BASS/TREBLE, EQUALIZER] BASS/TREB 34
Equalizer loudspeaker ch. band 1 00 21 [15:8] [
Equalizer loudspeaker ch. band 2 00 22 [15:8] [
Equalizer loudspeaker ch. band 3 00 23 [15:8] [
Equalizer loudspeaker ch. band 4 00 24 [15:8] [
Equalizer loudspeaker ch. band 5 00 25 [15:8] [

+12 dB ... −12 dB] 0 dB 35
+12 dB ... −12 dB] 0 dB 35
+12 dB ... −12 dB] 0 dB 35
+12 dB ... −12 dB] 0 dB 35
+12 dB ... −12 dB] 0 dB 35

Automatic Vo lume Correc tion 00 29 [15:8] [off, on, decay time] off 33
Subwoofer level adjust 00 2C [15:8] [+12 dB ...
Subwoofer corner frequency 00 2D [15:8] [50 Hz ... 400 Hz] 00

−30 dB, mute] 0 dB 38

hex

38
Subwoofer complementary high-pass [7:0] [off, on, MDB to Main] off 38
Balance headphone channel [L/R] 00 30 [15:8] [0...100 / 100% and 100 / 0...100%]

[

−127...0 / 0 and 0 / −127...0 dB]

100%/100% 33

Balance mode headphone [7:0] [Linear mode / logarithmic mode] linear mode
Bass headphone channel 00 31 [15:8] [
Treble headphone channel 00 32 [15:8] [
Loudness headphone channel 00 33 [15:8] [0 dB ...

+20 dB ... −12 dB] 0 dB 34
+15 dB ... −12 dB] 0 dB 35

+17 dB] 0 dB 36

Loudness filter characteristic [7:0] [NORMAL, SUPER_B AS S] NORMAL
Volume SCAR T2 output channel 00 40 [15:8] [

+12 dB ... −114 dB, MUTE] 00

SCART2 source select 00 41 [15:8] [FM, NICAM, SCART, I

hex

2

S1, I2S2] FM 31

40

SCART2 channel matrix [7:0] [SOUNDA, SOUNDB, STEREO, MONO...] SOUNDA 31
Virtual Surround OFF/ON switch 00 48 [15:8] [OFF/ON] 00
Virtual Surround spatial effect strength 00 49 [15:8] [0% - 100%] 00
Virtual Surround 3D effect strength 00 4A [15:8] [0% - 100%] 00
Virtual Surround mode 00 4B [15:0] [PANORAMA/3D-PANORAMA] 00
Noise generator 00 4D [15:0] [OFF/ON, Noise_L, Noise_C, Noise_R, Noise_S] 00

hex

hex

hex

hex

hex

42

42

42

42

43
MDB Effect Strength 00 68 [15:8] [0 dB ... 127 dB, off] off 38
MDB Amplitude Limit 00 69 [15:8] [0 dBFS... -32 dBFS] 0 dBFS 38
MDB Harmonic Content 00 6A [15:8] [0% ... 100%] 0% 39
MDB Low Pass Corner Frequency 00 6B [15:8] [50 Hz ... 300 Hz] 0 Hz 39
MDB High Pass Corner Frequency 00 6C [15:8] [20 Hz ... 300 Hz] 0 Hz 39

Micronas 21

MSP 34x1G PRELIMINARY DATA SHEET

Table 3–6: List of MSP 34x1G Read Registers

Read Register Address

(hex)

I2C Subaddress = 11

; Registers are not writable

hex

Bits Description and Adjustable Range See

Page

STANDARD RESULT 00 7E [15:0] Result of Automatic Standard Detection (see Table 3–8) 28
STATUS 02 00 [15:0] Monitoring of internal settings e.g. Stereo, Mono, Mute etc. . 28

I2C Subaddress = 13

Quasi peak readout left 00 19 [15:0] [00
Quasi peak readout right 00 1A [15:0] [00
MSP hardware version code 00 1E [15:8] [00
MSP major revision code [7:0] [00
MSP product code 00 1F [15:8] [00
MSP ROM version code [7:0] [00

; Registers are not writable

hex

... 7FFF

hex

... 7FFF

hex

... FF

hex

... FF

hex

... FF

hex

... FF

hex

] 16 bit two’s complement 44

hex

] 16 bit two’s complement 44

hex

]44

hex

]44

hex

]44

hex

]44

hex

22 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

3.3.2. Description of User Registers

Table 3–7: Standard Codes for STANDARD SELECT register

MSP Standard Code
(Data in hex)

TV Sound Standard Sound Carrier

Frequencies in MHz

MSP 34x1G Version

Automatic Standard Detection

00 01 Starts Automatic Standard Detection and sets

all

detected standard

Standard Selection

00 02 M-Dual FM-Stereo 4.5/4.724212 3401, -11, -21, -41, -51
00 03 B/G -Dual FM-Stereo
00 04 D/K1-Dual FM-Stereo
00 05 D/K2-Dual FM-Stereo
00 06 D/K -FM-Mono with HDEV3

Standard Detection,

3)

HDEV3

SAT-Mono (i.e. Eutelsat, s. Table 6–18)

1)

2)

2)

3)

, not detectable by Aut om atic

5.5/5.7421875 3401, -11, -51

6.5/6.2578125

6.5/6.7421875

6.5

00 07 D/K3-Dual FM-Stereo 6.5/5.7421875
00 08 B/G -NICAM-FM

1)

5.5/5.85 3411, -51
00 09 L -NICAM-AM 6.5/5.85
00 0A I -NICAM-FM 6.0/6.552
00 0B D/K -NICAM-FM

2)

00 0C D/K -NICAM-FM with HDEV2

4)

, not detectabl e by Autom a ti c

6.5/5.85

6.5/5.85

Standard Detection, for China

00 0D D/K -NICAM-FM with HDEV3

, not detectabl e by Autom a ti c

6.5/5.85

3)

Standard Detection, for China
00 20 BTSC-Stereo 4.5 3421, -41, -51
00 21 BTSC-Mono

+ SAP

00 30 M-EIA-J Japan Stereo 4.5 3421, -41, -51
00 40 FM-Stereo Radio with 75

µs Deemphasis 10.7 3421, -41, -51

00 50 SAT-Mono (s. Table 6–18) 6.5 3401, -11, -51
00 51 SAT-Stereo (s. Table 6–18) 7.02/7.20
00 60 SAT ADR (Astra Digital Radio) 6.12

1)

In case of Automatic Sound Select, the B/G-codes 3

2)

In case of Automatic Sound Select, the D/K-codes 4

3)

HDEV3: Max. FM deviation must not exceed 540 kHz

4)

HDEV2: Max. FM deviation must not exceed 360 kHz

hex

hex

and 8
, 5

hex

are equivalent.

hex

, 7

and B

hex

are equivalent.

hex

Micronas 23

MSP 34x1G PRELIMINARY DATA SHEET

3.3.2.1. STANDARD SELECT Register

The TV sound standar d of the MSP 34x1G demodula­tor is determined by the STANDARD SELECT register.
There are two ways to use the STANDARD SELECT
register:

– Setting up the demodulator for a TV sound standard

by sending the corresponding standard code with a
single I

– Starting the Automatic Standard Detection for ter-

restrial TV standards. This is the most comfortable
way to set up the demodulator. Within 0.5 s, the
detection and setup of the actual TV sound standard
is performed. The detected standard can be read
out of the STANDARD RESULT register by the con­trol processor. This feature is recommended for the
primary setup of a TV set. Outputs should be muted

during Automatic Standard Detection.
The Standard Codes are listed in Table 3–7.
Selecting a TV sound standard via the STANDARD

SELECT register initializes the demodulator. This
includes: AGC-settings and carrier mute, tuning fre­quencies, FIR-filter set tings, demodulation mode ( FM,
AM, NICAM), deemphasis and identification mode.

TV stereo sound standa rds that are unavailable for a
specific MSP version are processed in analog mono
sound of the standard. In that cas e, stereo or bilingual
processing will not be possible.

For a complete setup of the TV sound processing from
analog IF input to the source selection, the transmis­sions as shown in Section 3.5. are necessary.

2

C bus transmission.

3.3.2.2. Refresh of STANDARD SELECT Register

A general refresh o f th e S TANDARD SELECT register
is not allowed. However, the following method
enables watching the MSP 34x1G “alive” status and
detection of accidental resets (only versions B6 and
later):

– After Power-on, bit[15] of CONTROL will be set; it

must be read once to enable the reset-detection
feature.

– Reading of the CONTROL register and checking

the reset indicator bit[15] .

– If bit[15] is “0”, any refresh of the STANDARD

SELECT register is not allowed.

– If bit[15] is “1”, indicating a reset, a refresh of the

STANDARD SELECT register and all other MSPG
registers is required.

3.3.2.3. STANDARD RESULT Register

If Automatic Standard Detection is selected in the
STANDARD SELECT regi ster, status and result o f the
Automatic Standard Detection process can be read out
of the STANDARD RESULT register. The possible
results are based on the mentioned Standard Code
and are listed in Table 3–8.

In cases where n o sound st andard h as been detected
(no standard present, too mu ch noise, strong interfer­ers, etc.) the STANDARD RESULT register contains
00 00
actions (for example set the standard according to a
preference list or by manual input).

. In that case, the controller has to start further

hex

For reasons of software compatibility to the
MSP 34x x D, a Manual/Compatibility mode is available.
A detailed description of this mode can be found on
page 85.

As long as the STANDA RD RESULT register contains
a value greater than 07 FF
Detection is still active. During this period, the MODUS
and STANDARD SELECT register must no t be written.
The STATUS register will be updated when the Auto­matic Standard Detection has finished.

If a present sound s tandard is unavailable fo r a spe­cific MSP-version, it detects and switches to the ana­log mono sound of this standard.

Example:
The MSPs 3421G and 3441G will detect a B/G-NICAM
signal as standa rd 3 a nd will switch to the analog FM­Mono sound.

, the Automatic Standard

hex

24 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

Table 3–8: Results of the Automatic Standard
Detection

Broadcasted Sound
Standard

Automatic Standard
Detection could not

STANDARD RESULT Register

Read 007E

0000

hex

hex

find a sound standard
B/G-FM 0003
B/G-NICAM 0008
I000A
FM-Radio 0040
M-Korea

M-Japan
M-BTSC

L-AM
D/K1
D/K2
D/K3

L-NICAM
D/K-NICAM

0002
0020
0030
0009
0004

0009
000B

hex

hex

hex

hex

(if MODUS[14,13]=00)

hex

(if MODUS[14,13]=01)

hex

(if MODUS[14,13]=10)

hex

(if MODUS[12]=0)

hex

(if MODUS[12]=1)

hex

(if MODUS[12]=0)

hex

(if MODUS[12]=1)

hex

Automatic Standard
Detection still active

>07FF

hex

Micronas 25

MSP 34x1G PRELIMINARY DATA SHEET

3.3.2.4. Write Registers on I2C Subaddress 10
Table 3–9: Write Registers on I2C Subaddress 10

Register

Function Name

Address

00 20

hex

STANDARD SELECTION Register

Defines TV Sound or FM-Radio Standard

00 30

hex

bit[15:0] 00 01

00 02

...
00 60

MODUS Register

start Automatic Standard Detection

hex

Standard Codes (see Table 3–7)

hex
hex

Preference in Automatic Standard Detection:
bit[15] 0 undefined, must be 0
bit[14:13] detected 4.5 MHz carrier is interpreted as:

0 standard M (Korea)
1 standard M (BTSC)
2 standard M (Japan)
3 chroma carrier (M/N standards are ignored)

bit[12] detected 6.5 MHz carrier is interpreted as:

0 standard L (SECAM)
1 standard D/K1, D/K2, D/K3, or D/K NICAM

hex

hex

STANDARD_SEL

MODUS

1)

1)

General MSP 34x1G Options
bit[11:9] 0 undefined, must be 0
bit[8] 0/1 ANA_IN1+/ANA_IN2+; select analog sound IF input pin
bit[7] 0/1 active/tristate state of audio clock output pin

AUD_CL_OUT

bit[6] I

2

S word strobe alignment
0 WS changes at data word boundary
1 WS changes one clock cycle in advance

2

bit[5] 0/1 master/slave mode of I

S interface (must be set to 0

(= Master) in case of NICAM mode)

2

bit[4] 0/1 active/tristate state of I

S output pins

bit[3] state of digital output pins D_CTR_I/O_0 and _1

0 active: D_CTR_I/O_0 and _1 are output pins

(can be set by means of the ACB register.
see also: MODUS[1])

1 tristate: D_CTR_I/O_0 and _1 are input pins

(level can be read out of STATUS[4,3])
bit[2] 0 undefined, must be 0
bit[1] 0/1 disable/enable STATUS change indication by means of

the digital I/O pin D_CTR_I/O_1

Necessary condition: MODUS[3] = 0 (active)
bit[0] 0/1 off/on: Automatic Sound Select

1)

Valid at the next start of Automatic Standard Detection.

26 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

2

Table 3–9: Write Registers on I

C Subaddress 10

, continued

hex

Register
Address

00 40

hex

Function Name

I2S CONFIGURATION Register

I2S_CONFIG
bit[15:1] 0 not used, must be set to “0”
bit[0] I2S_CL frequency and I

2

S data sample length for

master mode
0 2 x 16 bit (1.024 MHz)
1 2 x 32 bit (2.048 MHz)

Micronas 27

MSP 34x1G PRELIMINARY DATA SHEET

3.3.2.5. Read Registers on I2C Subaddress 11

hex

Table 3–10: Read Registers on I2C Subaddress 11

Register

Function Name

Address

00 7E

hex

STANDARD RESULT Register

Readback of the detected TV Sound or FM-Radio Standard
bit[15:0] 00 00

Automatic Standard Detection could not find

hex

a sound standard

00 02

MSP Standard Codes (see Table 3–8)

hex

...

02 00

hex

00 40

>07 FF

STATUS Register

hex

Automatic Standard Detection still active

hex

Contains all user relevant internal information about the status of the MSP
bit[15:10] undefined
bit[8] 0/1 “1” indicates bilingual sound mode or SAP present

(internally evaluated from received analog or digital iden­tification signals)

hex

STANDARD_RES

STATUS

bit[7] 0/1 “1” indicates independent mono sound (only for

NICAM)

bit[6] 0/1 mono/stereo indication

(internally evaluated from received analog or digital iden­tification signals)

bit[5,9] 00 analog sound standard (FM or AM) active

01 this pattern will not occur
10 digital sound (NICAM) available
11 bad reception condition of digital sound (NICAM) due

to:
a. high error rate
b. unimplemented sound code

c. data transmission only
bit[4] 0/1 low/high level of digital I/O pin D_CTR_I/O_1
bit[3] 0/1 low/high level of digital I/O pin D_CTR_I/O_0
bit[2] 0 detected secondary carrier (2nd A2 or SAP sub-carrier)

1 no secondary carrier detected

bit[1] 0 detected primary carrier (Mono or MPX carrier)

1 no primary carrier detected
bit[0] undefined
If STATUS change indication is activated by means of MODUS[1]: Each

change in the STATUS register sets the digital I/O pin D_CTR_I/O_1 to high
level. Reading the STATUS register resets D_CTR_I/O_1.

28 Micronas

PRELIMINARY DATA SHEET MSP 34x1G

3.3.2.6. Write Registers on I2C Subaddress 12

hex

Table 3–11: Write Registers on I2C Subaddress 12

Register

Function Name

Address
PREPROCESSING

00 0E

hex

FM/AM Prescale

bit[15:8] 00

hex

Defines the input prescale gain for the demodulated
... FM or AM signal
7F

hex

00

hex

off (RESET condition)

For all FM modes except satellite FM and AM-mode, the combinations of pres­cale value and FM deviation listed below lead to internal full scale.

FM mode
bit[15:8] 7F

48
30
24
18
13

hex
hex
hex
hex
hex
hex

28 kHz FM deviation

50 kHz FM deviation

75 kHz FM deviation

100 kHz FM deviation

150 kHz FM deviation

180 kHz FM deviation (limit)

hex

PRE_FM

FM high deviation mode (HDEV2, MSP Standard Code = C
bit[15:8] 30

14

hex
hex

150 kHz FM deviation

360 kHz FM deviation (limit)

hex

)

FM very high deviation mode (HDEV3, MSP Standard Code = 6 and D
bit[15:8] 20

1A

hex

hex

450 kHz FM deviation

540 kHz FM deviation (limit)

Satellite FM with adaptive deemphasis
bit[15:8] 10

hex

recommendation

AM mode (MSP Standard Code = 9)
bit[15:8] 7C

hex

recommendation for SIF input levels from

0.1 V

to 0.8 V

pp

pp

(Due to the AGC being switched on, the AM-output level

remains stable and independent of the actual SIF-level in

the mentioned input range)

hex

)

Micronas 29

MSP 34x1G PRELIMINARY DATA SHEET

2

Table 3–11: Write Registers on I

C Subaddress 12

, continued

hex

Register
Address

(continued)

00 0E

hex

00 10

hex

Function Name

FM Matrix Modes

FM_MATRIX

Defines the dematrix function for the demodulated FM signal
bit[7:0] 00

01
02
03

hex
hex
hex
hex

no matrix (used f or b ili ng ua l an d unma t rixed stereo sound)
German stereo (Standard B/G)
Korean stereo (also used for BTSC, EIA-J and FM Radio)
sound A mono (left and right channel contain the mono
sound of the FM/AM mono carrier)

04

hex

sound B mono

In case of Automatic Sound Select = on, the FM Matrix Mode is set auto mat i­cally. Writing to the FM/AM prescale register (00 0E
In order not to disturb th e automatic process, the low par t of any I

high part) is still allowed.

hex

2

C transmis­sion to this reg ister is ignor ed. Therefore, any FM-Matr ix readback values may
differ from data written previously.

In case of Automatic Sound Select = off, the FM Matrix Mode must be set as
shown in Table 6–17 of Appendix B.

To enable a Forced Mono Mode set A2 THRESHOLD as described in
Section 6.3.2.on page 89

NICAM Prescale

PRE_NICAM

00 16
00 12

00 0D

hex
hex

hex

Defines the input prescale value for the digital NICAM signal
bit[15:8] 00

hex

... 7F

prescale gain

hex

examples:
00
20
5A
7F

hex
hex

hex

hex

off
0dB gain
9 dB gain (recommendation)

+12 dB gain (m aximum gai n)

I2S1 Prescale
I2S2 Prescale

Defines the input prescale value for digital I
bit[15:8] 00

hex

... 7F

prescale gain

hex

2

S input signals

examples:
00
10
7F

hex
hex
hex

off
0 dB gain (recommendation)

+18 dB gain (m aximum gai n)

SCART Input Prescale

Defines the input prescale value for the analog SCART input signal
bit[15:8] 00

hex

... 7F

prescale gain

hex

examples:
00
19

hex
hex

off
0dB gain (2 V

input leads to digital full scale)

RMS

Due to the Dolby requirements, this is the maximum

7F

hex

value allowed to prohibit clipping of a 2 V

+14 dB gain (400 mV

input leads to digital full scale)

RMS

RMS

PRE_I2S1
PRE_I2S2

PRE_SCART

input sign al .

30 Micronas