Philips mb2821 DATASHEETS

Philips Semiconductors Advanced BiCMOS Products Product specification
MB2821
Dual 10-bit D-type flip-flop; positive-edge trigger (3-State)
1
August 24, 1993 853-1670 10620

FEATURES

Multiple V
CC
and GND pins minimize
switching noise
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per Machine Model

DESCRIPTION

The MB2821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The MB2821 has two 10-bit, edge triggered registers, with each register coupled to ten 3-State output buffers. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE
)
control gates. Each register is fully edge triggered. The
state of each D input, one set-up time before
the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors.
The active Low Output Enable (nOE
) controls all ten 3-State buffers independent of the register operation. When nOE
is Low, the data in the register appears at the outputs. When nOE
is High, the outputs are in high impedance “off” state, which means they will neither drive nor load the bus.

QUICK REFERENCE DATA

SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay nCP to nQx
CL = 50pF; VCC = 5V 4.6 ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
OUT
Output capacitance VO = 0V or VCC; 3-State 7 pF
I
CCZ
Total supply current Outputs disabled; VCC = 5.5V 120 µA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER
52-pin plastic Quad Flat Pack -40°C to +85°C MB2821BB 1418B

PIN CONFIGURATION LOGIC SYMBOL

Vcc
1Q3
1Q2
1Q1
1Q0
1OE
1CP
1D0
1D1
GND
1D2
1D3
Vcc
Vcc
2Q6
2Q7
GND
2Q8
2Q9
2OE
2CP
2D9
2D8
2D7
2D6
Vcc
19 2220 231716 25 26241514 2118
188
2Q1
1Q9
2Q2
GND
1Q6
2Q4 2Q5
2Q3
1Q5
2Q0
1Q7
1Q4
1 2
3 4
5 6 7 8
9 10 11 12 13
47 4446 434950 41 40425152 4548
1D9
2D2
2D0
GND
1D7
1D6
2D4 2D5
2D3
1D5
2D1
1D8
1D439 38 37 36
35 34 33 32
31 30 29 28 27
MB2821
52–pin PQFP
45 44 42 41 39 38 37 36
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
48 49 50 51 1 2 3 5
46 47
1CP 1OE
35 34
1D8 1D9
1Q8 1Q9
6 7
33 32 31 29 28 27 25 24
2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
8 9 10 11 12 13 15 16
21 20
2CP 2OE
23 22
2D8 2D9
2Q8 2Q9
18 19
È
È
È
È
È
È
Philips Semiconductors Advanced BiCMOS Products Product specification
MB2821
Dual 10-bit D-type flip-flop; positive-edge trigger (3-State)
August 24, 1993
2

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION
45, 44, 42, 41, 39, 38, 37, 36, 35, 34,
33, 32, 31, 29, 28, 27, 25, 24, 23, 22
1D0 – 1D9 2D0 – 2D9
Data inputs
48, 49, 50, 51, 1, 2, 3, 5, 6, 7, 8, 9,
10, 11, 12, 13, 15, 16, 18, 19
1Q0 – 1Q9 2Q0 – 2Q9
Data outputs
47, 20 1OE, 2OE Output enable inputs (active-Low) 46, 21 1CP, 2CP Clock pulse inputs (active rising edge)
4, 17, 30, 43 GND Ground (0V)
14, 26, 40, 52 V
CC
Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

C2
C2
1
45 48 44 49 42 50 41 51 39 1 38 2 37 3 36 5
2D
46
EN
47
35 6 34 7
1
33 8 32 9 31 10 29 11 28 12 27 13 25 15 24 16
2D
21
EN
20
23 18 22 19

FUNCTION TABLE

INPUTS INTERNAL OUTPUTS OPERATING MODE
nOE nCP nDx REGISTER nQ0 – nQ9
L L
↑ ↑
l
h
L H
L
H
Load and read register
L X NC NC Hold
H H
↑ ↑
X
Dn
NC
Dn
Z Z
Disable outputs
H = High voltage level h = High voltage level one set-up time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one set-up time prior to the Low-to-High clock transition NC= No change X = Don’t care Z = High impedance “off” state
= Low to High clock transition
= Not a Low-to-High clock transition
Philips Semiconductors Advanced BiCMOS Products Product specification
MB2821
Dual 10-bit D-type flip-flop; positive-edge trigger (3-State)
August 24, 1993
3

LOGIC DIAGRAM

CP Q
D
nD0
nQ0
nCP
nOE
CP Q
D
nD1
nQ1
CP Q
D
nD2
nQ2
CPQ
D
nD3
nQ3
CP Q
D
nD4
nQ4
CPQ
D
nD5
nQ5
CP Q
D
nD6
nQ6
CPQ
D
nD7
nQ7
CPQ
D
nD8
nQ8
CPQ
D
nD9
nQ9

ABSOLUTE MAXIMUM RATINGS

1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT
MIN MAX
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
t/v Input transition rise or fall rate 0 5 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
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