Philips mb2374 DATASHEETS

ADVANCED BiCMOS PRODUCTS
MB2374
Dual octal D-type flip-flop; positive-edge trigger (3-State)
Product specification August 23, 1993 IC23
Philips Semiconductors
Philips Semiconductors Product specification
È
È

FEA TURES

Two 8-bit positive edge triggered registers
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Multiple V
and GND pins minimize switching noise
CC
3-State output buffers
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model

QUICK REFERENCE DATA

SYMBOL PARAMETER
C
t
PLH
t
PHL
C
OUT
I
CCZ
IN
Propagation delay nCP to nQx
Input capacitance VI = 0V or V Output capacitance VO = 0V or VCC; 3-State 7 pF Total supply current Outputs disabled; VCC = 5.5V 120 µA

DESCRIPTION

The MB2374 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The MB2374 has two 8-bit, edge triggered registers, with each register coupled to eight 3-State output buffers. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE
Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. Each active-Low Output Enable (nOE its register independent of the clock operation.
When nOE register. When nOE High-impedance “OFF” state, which means they will neither drive nor load the bus.
CONDITIONS
T
= 25°C; GND = 0V
amb
CL = 50pF; VCC = 5V
CC
) control gates.
) controls all eight 3-State buffers for
is Low, the stored data appears at the outputs for that
is High, the outputs for that register are in the
TYPICAL UNIT
3.4
3.6
ns
4 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
52–pin plastic Quad Flat Pack –40°C to +85°C MB2374 BB MB2374 BB SOT379-1

PIN CONFIGURATION

1Q3
1Q2
GND
1Q1
52
1
V
CC
1Q4
2
1Q5
3 4
GND
5
1Q6
6
1Q7
7
GND
8
2Q0
9
2Q1
10
GND
11
2Q2
12
2Q3
13
V
CC
2Q4
2Q5
2Q6
GND
1Q0
1OE
GND
47 4446 434950 41 404251 4548
52-pin PQFP
19 2220 231716 25 26241514 2118
2Q7
2OE
GND
1CP
2CP
1D0
2D7
1D1
2D6
GND
GND
1D2
2D5
1D3
39 38 37 36 35 34 33 32
31 30 29 28
27
2D4
V
CC
1D4 1D5 GND 1D6 1D7 GND 2D0
2D1 GND 2D2 2D3
V
CC
SB00062

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION
44, 43, 41, 40, 38, 37, 35, 34, 32, 31, 29, 28,
26, 25, 23, 22
48, 49, 51, 52,
2, 3, 5, 6,
8, 9, 11, 12,
14, 15, 17, 18
47, 19 1OE, 2OE
45, 21 1CP, 2CP
4, 7, 10, 16, 20, 24,
30, 33, 36, 42, 46, 50
1, 13, 27, 39 V
1D0 – 1D7 2D0 – 2D7
1Q0 – 1Q7 2Q0 – 2Q7
Data inputs
Data outputs
Output enable inputs (active-Low)
Clock pulse inputs (active rising edge)
GND Ground (0V)
CC
Positive supply voltage
1993 Aug 23 853–1625 10583
2
Philips Semiconductors Product specification
MB237416-bit D-type flip-flop; positive-edge trigger (3-State)

LOGIC SYMBOL

45 47
21 19
1D0 1D1 1D2 1D3
1CP 1OE
1Q0 1Q1 1Q2
2D0 2D1 2D2 2D3
2CP 2OE
2Q0 2Q1 2Q2

LOGIC DIAGRAM

nD0
44 43 41 40
1Q3
4948
32 31 29 28
2Q3
98
38 37 35 34
1D4 1D5 1D6 1D7
1Q4 1Q5 1Q6651Q7
5251
1211
32
26 25 23 22
2D4 2D5 2D6 2D7
2Q4 2Q5 2Q6
1514
nD1
2Q7
1817
SB00063
nD2
nD3

LOGIC SYMBOL (IEEE/IEC)

47
EN
45
C1
44
1D
43
41
40
38
37
35
34
nD4
48
49
51
52
2
3
5
6
nD5
19
21
32
31
29
28
26
25
23
22
nD6
EN
C1
1D
nD7
8
9
11
12
14
15
17
18
SB00064
nCP
nOE
D
CP Q
nQ0
D
CP Q
nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
D
CP Q
SB00065
1993 Aug 23
3
Philips Semiconductors Product specification
MB237416-bit D-type flip-flop; positive-edge trigger (3-State)

FUNCTION TABLE

INPUTS INTERNAL OUTPUTS OPERATING MODE
nOE nCP nDx REGISTER nQ0 – nQ7
L L
L X NC NC Hold
H H
H = High voltage level h = High voltage level one set-up time prior to the High-to-Low E transition L = Low voltage level l = Low voltage level one set-up time prior to the High-to-Low E transition NC= No change X = Don’t care Z = High impedance “off” state = Low-to-High clock transition
= Not a Low-to-High clock transition
↑ ↑
↑ ↑
h
X
nDx
l
L
H
NC
nDx
L
H
Z Z
Load and read register
Disable outputs

ABSOLUTE MAXIMUM RATINGS

SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
DC supply voltage –0.5 to +7.0 V DC input diode current VI < 0 –18 mA DC input voltage DC output diode current VO < 0 –50 mA DC output voltage DC output current output in Low state 128 mA Storage temperature range –65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
–1.2 to +7.0 V
output in Off or High state –0.5 to +5.5 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT
MIN MAX
V
CC
V V V I
OH
I
OL
t/v Input transition rise or fall rate 0 10 ns/V
T
amb
DC supply voltage 4.5 5.5 V Input voltage 0 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
High-level output current –32 mA Low-level output current 64 mA
Operating free-air temperature range –40 +85 °C
CC
V
1993 Aug 23
4
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