Philips mb2373 DATASHEETS

Philips Semiconductors Advanced BiCMOS Products Product specification

MB2373Dual octal transparent latch (3-State)

1

August 23, 1993 853-1669 10587

FEATURES

•16-bit transparent latch

•Multiple V

CC

and GND pins minimize

switching noise

•Power-up 3-State

•Live insertion/extraction permitted

•Power-up reset

•3-State output buffers

•Output capability: +64mA/–32mA

•Latch-up protection exceeds 500mA per

JEDEC JC40.2 Std 17

•ESD protection exceeds 2000V per MIL

STD 883 Method 3015 and 200V per Machine Model

DESCRIPTION

The MB2373 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The MB2373 device is a dual octal transparent latch coupled to two sets of eight 3-State output buffers. The two sections of the device are controlled independently by Enable (nE) and Output Enable (nOE

) control

gates. The data on each set of D inputs are

transferred to the latch outputs when the Latch Enable (nE) input is High. The latch remains transparent to the data inputs while nE is High, and stores the data that is present

one setup time before the High-to-Low enable transition.

The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. Each active-Low Output Enable (nOE

) controls eight 3-State buffers independent of the latch operation.

When nOE

is Low, the latched or transparent

data appears at the outputs. When nOE

is High, the outputs are in the High–impedance “OFF” state, which means they will neither drive nor load the bus.

QUICK REFERENCE DATA

SYMBOL PARAMETER

CONDITIONS

T

amb

= 25°C; GND = 0V

TYPICAL UNIT

t

PLH

t

PHL

Propagation delay Dn to Qn

CL = 50pF; VCC = 5V 2.9 ns

C

IN

Input capacitance VI = 0V or V

CC

4 pF

C

OUT

Output capacitance VO = 0V or VCC; 3-State 7 pF

I

CCZ

Total supply current Outputs disabled; VCC = 5.5V 500 nA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER

52–pin plastic Quad Flat Pack –40°C to +85°C MB2373BB 1418B

1Q3

1Q2

GND

1Q1

1Q0

1OE

GND1E1D0

1D1

GND

1D2

1D3

2Q4

2Q5

GND

2Q6

2Q7

2OE

GND

2E

2D7

2D6

GND

2D5

2D4

19 2220 231716 25 26241514 2118

1Q7

2Q1

GND

1Q5

2Q3

V

CC

2Q2

1Q4

2Q0

1Q6

V

CC

1 2 3 4 5 6 7 8

9 10 11 12

13

47 4446 434950 41 40425152 4548

1D7

2D1

GND

1D5

2D3 V

CC

2D2

1D4

2D0

1D6

V

CC

39 38 37 36

35 34 33 32 31 30 29 28

27

MB2373

52–pin PQFP

49

48 1Q0

1Q1 1Q2

52

51

1Q3

44 43 41 40

1D0 1D1 1D2 1D3

45

47

3

2

1Q4 1Q5 1Q6

6

5

1Q7

38 37 35 34

1D4 1D5 1D6 1D7

1E

1OE

9

8

2Q0 2Q1 2Q2

12

11

2Q3

32 31 29 28

2D0

2D21

2D2 2D3

21

19

15

14

2Q4 2Q5 2Q6

18

17

2Q7

26 25 23 22

2D4 2D5 2D6 2D7

2E

2OE

LOGIC SYMBOL

PIN CONFIGURATION

È

Philips Semiconductors Advanced BiCMOS Products Product specification

MB2373Dual octal transparent latch (3-State)

August 23, 1993

2

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

44, 43, 41, 40,38, 37, 35, 34, 32, 31, 29, 28, 26, 25, 23, 22

1D0 – 1D7 2D0 – 2D7

Data inputs

48, 49, 51, 52, 2, 3, 5, 6,

8, 9, 11, 12, 14, 15, 17, 18

1Q0 – 1Q7 2Q0 – 2Q7

Data outputs

47, 19 1OE, 2OE Output enable inputs (active–Low) 45, 21 1E, 2E Enable inputs (active–High)

4, 7, 10, 16, 20, 24, 30,

33, 36, 42, 46, 50

GND Ground (0V)

1, 13, 27, 39 V

CC

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

47

44

48

43

49

41

51

40

52

EN

45

C1

38

2

37

3

35

5

34

6

1D

19

32

8

31

9

29

11

28

12

EN

21

C1

26

14

25

15

23

17

22

18

1D

LOGIC DIAGRAM

E Q

D

nD0

nQ0

E Q

D

nD1

E Q

D

nD2

E Q

D

nD3

E Q

D

nD4

E Q

D

nD5

E Q

D

nD6

E Q

D

nD7

nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7

nE

nOE

Philips Semiconductors Advanced BiCMOS Products Product specification

MB2373Dual octal transparent latch (3-State)

August 23, 1993

3

FUNCTION TABLE

INPUTS INTERNAL OUTPUTS OPERATING MODE

nOE nE nDx

REGISTER nQ0 – nQ7

L L

H H

L

H

L

H

L

H

Enable and read register

L L

↓ ↓

i

h

L

H

L

H

Latch and read register

L L X NC NC Hold H

H

L

H

X

Dn

NC

Dn

Z Z

Disable outputs

H = High voltage level h = High voltage level one set-up time prior to the High-to-Low E transition L = Low voltage level l = Low voltage level one set-up time prior to the High-to-Low E transition NC= No change X = Don’t care Z = High impedance “off” state ↓ = High-to-Low E transition

ABSOLUTE MAXIMUM RATINGS

1, 2

SYMBOL

PARAMETER CONDITIONS RATING UNIT

V

CC

DC supply voltage –0.5 to +7.0 V

I

IK

DC input diode current VI < 0 –18 mA

V

I

DC input voltage

3

–1.2 to +7.0 V

I

OK

DC output diode current VO < 0 –50 mA

V

OUT

DC output voltage

3

output in Off or High state –0.5 to +5.5 V

I

OUT

DC output current output in Low state 128 mA

T

stg

Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

Philips Semiconductors Advanced BiCMOS Products Product specification

MB2373Dual octal transparent latch (3-State)

August 23, 1993

4

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

MIN MAX

V

CC

DC supply voltage 4.5 5.5 V

V

I

Input voltage 0 V

CC

V

IH

High-level input voltage 2.0 V

V

IL

Low-level Input voltage 0.8 V

I

OH

High-level output current –32 mA

I

OL

Low-level output current 64 mA

∆t/∆v Input transition rise or fall rate 0 10 ns/V

T

amb

Operating free-air temperature range –40 +85 °C

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL PARAMETER TEST CONDITIONS T

amb

= +25°C

T

amb

= –40°C

to +85°C

UNIT

MIN TYP MAX MIN MAX

V

IK

Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V

VCC = 4.5V; IOH = –3mA; VI = VIL or V

IH

2.5 2.9 2.5 V

V

OH

High-level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V

IH

3.0 3.4 3.0 V

VCC = 4.5V; IOH = –32mA; VI = VIL or V

IH

2.0 2.4 2.0 V

V

OL

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

IH

0.42 0.55 0.55 V

V

RST

Power-up output voltage

3

VCC = 5.5V; IO = 1mA; VI = GND or V

CC

0.13 0.55 0.55 V

I

Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA

I

OFF

Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA

I

PU/PD

Power-up/down 3-State output current

4

VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V

OE

= GND

±5.0 ±50 ±50 µA

I

OZH

3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V

IH

5.0 50 50 µA

I

OZL

3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V

IH

–5.0 –50 –50 µA

I

O

Output current

1

VCC = 5.5V; VO = 2.5V –50 –70 –180 –50 –180 mA

I

CEX

Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V

CC

5.0 50 50 µA

I

CCH

VCC = 5.5V; Outputs High, VI = GND or V

CC

120 250 250 µA

I

CCL

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

CC

44 60 60 mA

I

CCZ

VCC = 5.5V; Outputs 3-State; V

I

= GND or V

CC

120 250 250 µA

∆I

CC

Additional supply current per input pin

2

VCC = 5.5V; one input at 3.4V, other inputs at V

CC

or GND

0.5 1.5 1.5 mA

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.

4. This parameter is valid for any V

CC

between 0V and 2.1V with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a

transition time of up to 100µsec is permitted.