Philips MB2052BB Datasheet
Philips Semiconductors Advanced BiCMOS Products Product specification
MB2052Dual octal registered transceiver (3-State)
1
August 23, 1993 853-1712 10586
FEATURES
•Two 8-bit registered transceivers
•Live insertion/extraction permitted
•Power-up 3-State
•Power-up reset
•Multiple V
CC
and GND pins minimize
switching noise
•Independent registers for A and B buses
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
•ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per
Machine Model
DESCRIPTION
The MB2052 high-performance BiCMOS
device combines low static and dynamic
power dissipation with high speed and high
output drive.
The MB2052 is a dual octal registered
transceiver. Two 8-bit registers store data
flowing in both directions between two
bidirectional buses. Data applied to the inputs
is entered and stored on the rising edge of
the Clock (nCPXX) provided that the Clock
Enable (nCEXX
) is Low. The data is then
present at the 3-State output buffers, but is
only accessible when the Output Enable
(nOEXX
) is Low. Data flow from A inputs to B
outputs is the same as for B inputs to A
outputs.
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
nCPBA to nAx or
nCPAB to nBx
CL = 50pF; VCC = 5V 5.7 ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
I/O
I/O capacitance VO = 0V or VCC; 3-State 7 pF
I
CCZ
Total supply current Outputs disabled; VCC = 5.5V 120 nA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER
52-pin plastic Quad Flat Pack –40°C to +85°C MB2052BB 1418B
PIN CONFIGURATION LOGIC SYMBOL
46 4350 405152 48
1A6
2A1
1A7
2A2
GND
1A4
2A4
2A5
2A3
1A3
2A0
1A5
1A2
10
11
12
13
1
2
3
4
5
6
7
8
9
191715 20 2316 2614 2118
1B7
2B2
2B0
GND
1B5
1B4
2B4
2B5
2B3
1B3
2B1
1B6
1B239
38
37
36
35
34
33
32
31
30
29
28
27
Vcc
1A1
1A0
1CEAB
1CPAB
1OEAB
1OEBA
1CPBA
1CEBA
GND
1B0
1B1
Vcc
Vcc
2A6
2A7
GND
2CEAB
2CPAB
2OEAB
2OEBA
2CPBA
2CEBA
2B7
2B6
Vcc
22 2524
47 4449 414245
MB2052
52-pin PQFP
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
48
49
1CPAB
1CEAB
45
44
1CPBA
1CEBA
50 51 1 2 3 5 6 7
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
42 41 39 38 37 36 35 34
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
19
18
2CPAB
2CEAB
22
23
2CPBA
2CEBA
8 9 10 11 12 13 15 16
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
33 32 31 29 28 27 25 24
461OEBA
471OEAB
212OEBA
202OEAB
È
È
È
Philips Semiconductors Advanced BiCMOS Products Product specification
MB2052Dual octal registered transceiver (3-State)
August 23, 1993
2
LOGIC SYMBOL (IEEE/IEC)
33
32
31
29
28
27
25
24
8
9
10
11
12
13
15
16
22
19
20
21
23
18
C6
C5
C6
C5
47
46
44
49
50
51
1
2
3
5
6
7
42
41
39
38
37
36
35
34
1, 4, 5
45
2, 3, 6
48
EN4
EN3
EN2
EN1
1, 4, 52, 3, 6
EN4
EN3
EN2
EN1
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
48, 45
19, 22
1CPAB / 1CPBA
2CPAB / 2CPBA
Clock input A to B / Clock input B to A
49, 44
18, 23
1CEAB / 1CEBA
2CEAB / 2CEBA
Clock enable input A to B / Clock enable input B to A
50, 51, 1, 2, 3, 5, 6, 7
8, 9, 10, 11, 12, 13, 15, 16
1A0 – 1A7
2A0 – 2A7
Data inputs/outputs (A side)
42, 41, 39, 38, 37, 36, 35, 34
33, 32, 31, 29, 28, 27, 25, 24
1B0 – 1B7
2B0 – 2B7
Data inputs/outputs (B side)
47, 46
20, 21
1OEAB / 1OEBA
2OEAB / 2OEBA
Output enable inputs
4, 17, 30, 43 GND Ground (0V)
14, 26, 40, 52 V
CC
Positive supply voltage
FUNCTION TABLE for Register nAx or nBx
INPUTS INTERNAL OPERATING
nAx or nBx nCPXX nCEXX Q MODE
X X H NC Hold data
L
H
↑
↑
L
L
L
H
Load data
H =High voltage level
L =Low voltage level
↑ =Low-to-High transition
X = Don’t care
XX=AB or BA
NC=No change
Philips Semiconductors Advanced BiCMOS Products Product specification
MB2052Dual octal registered transceiver (3-State)
August 23, 1993
3
FUNCTION TABLE for Output Enable
INPUTS INTERNAL nAx or nBx OPERATING
nOEXX Q OUTPUTS MODE
H X Z Disable outputs
L
L
L
H
L
H
Enable outputs
H =High voltage level
L =Low voltage level
X = Don’t care
XX=AB or BA
Z =High impedance ”off” state
LOGIC DIAGRAM
nCEAB
CE
Q
CP
D
CE
Q
CP
D
DETAIL A
DETAIL A X 7
nCPAB
nOEAB
nA0
nA2
nCPBA
nOEBA
nB0
nA3
nA4
nA5
nA6
nA7
nCEBA
nB1
nB2
nB3
nB4
nB5
nB6
nB7
nA1
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