INTEGRATED CIRCUITS
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LM139/239/239A/339/339A/LM2901/MC
3302
Quad voltage comparator
Product specification |
1995 Nov 27 |
IC11 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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Quad voltage comparator
LM139/239/239A/339/339A
/LM2901/MC3302
DESCRIPTION
The LM139 series consists of four independent precision voltage comparators, with an offset voltage specification as low as 2.0mV max for each comparator, which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also have a unique characteristic in that the input common±mode voltage range includes ground, even though they are operated from a single power supply voltage.
The LM139 series was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, the LM139 series will directly interface with MOS logic where their low power drain is a distinct advantage over standard comparators.
FEATURES
•Wide single supply voltage range 2.0VDC to 36VDC or dual supplies ±1.0VDC to ±18VDC
•Very low supply current drain (0.8mA) independent of supply voltage (1.0mW/comparator at 5.0VDC)
•Low input biasing current 25nA
•Low input offset current ±5nA and offset voltage
•Input common±mode voltage range includes ground
•Differential input voltage range equal to the power supply voltage
•Low output 250mV at 4mA saturation voltage
•Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic systems
APPLICATIONS
•A/D converters
•Wide range VCO
•MOS clock generator
•High voltage logic gate
•Multivibrators
PIN CONFIGURATION
D, F, N Packages
OUTPUT 2 |
1 |
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14 |
OUTPUT 3 |
OUTPUT 1 |
2 |
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13 |
OUTPUT 4 |
V+ |
3 |
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12 |
GND |
1 |
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4 |
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INPUT 1 ± |
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INPUT 4 + |
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4 |
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11 |
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INPUT 1 + |
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INPUT 4 ± |
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5 |
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10 |
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INPUT 1 ± |
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INPUT 3 + |
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6 |
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2 3 |
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9 |
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INPUT 1 + |
7 |
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8 |
INPUT 3 ± |
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TOP VIEW
SL00070
Figure 1. Pin Configuration
EQUIVALENT CIRCUIT
V +
+INPUT
±INPUT
3.5μA |
100μA |
3.5μA |
100μA |
Q2 |
Q3 |
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Q1 |
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Q4 |
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OUTPUT |
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Q8 |
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Q7 |
Q5 |
Q6 |
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(1 Comparator Only) |
SL00071 |
Figure 2. Equivalent Circuit
ORDERING INFORMATION
DESCRIPTION |
TEMPERATURE RANGE |
ORDER CODE |
DWG # |
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14±Pin Ceramic Dual In-Line Package (Cerdip) |
±55 to +125°C |
LM139F |
0581B |
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14±Pin Plastic Dual In-Line Package (DIP) |
±25°C to +85°C |
LM239AN |
SOT27-1 |
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14±Pin Plastic Dual In-Line Package (DIP) |
±25°C to +85°C |
LM239N |
SOT27-1 |
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14±Pin Plastic Small Outline (SO) Package |
±25°C to +85°C |
LM239D |
SOT108-1 |
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14±Pin Plastic Dual In-Line Package (DIP) |
±40°C to +125°C |
LM2901N |
SOT27-1 |
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14±Pin Plastic Small Outline (SO) Package |
±40°C to +125°C |
LM2901D |
SOT108-1 |
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14±Pin Plastic Dual In-Line Package (DIP) |
0 to +70°C |
LM339AN |
SOT27-1 |
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14±Pin Plastic Small Outline (SO) Package |
0 to +70°C |
LM339D |
SOT108-1 |
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14±Pin Plastic Dual In-Line Package (DIP) |
0 to +70°C |
LM339N |
SOT27-1 |
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14±Pin Plastic Small Outline (SO) Package |
±40°C to +85°C |
MC3302D |
SOT108-1 |
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14±Pin Ceramic Dual In-Line Package (Cerdip) |
±40°C to +85°C |
MC3302F |
0581B |
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14±Pin Plastic Dual In-Line Package (DIP) |
±40°C to +85°C |
MC3302N |
SOT27-1 |
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14±Pin Plastic Dual In-Line Package (DIP) |
±55 to +125°C |
LM139N |
SOT27-1 |
1995 Nov 27 |
2 |
853-0930 16050 |
Philips Semiconductors |
Product specification |
|
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Quad voltage comparator
LM139/239/239A/339/339A/
LM2901/MC3302
ABSOLUTE MAXIMUM RATINGS
SYMBOL |
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PARAMETER |
RATING |
UNIT |
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VCC |
VCC supply voltage |
36 or ±18 |
VDC |
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VDIFF |
Differential input voltage |
36 |
VDC |
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VIN |
Input voltage |
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±0.3 to +36 |
VDC |
PD |
Maximum power dissipation, |
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1 |
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T =25°C (still±air) |
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A |
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F package |
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1190 |
mW |
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N package |
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1420 |
mW |
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D package |
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1040 |
mW |
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Output short±circuit to ground2 |
Continuous |
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I |
Input current (V |
<±0.3V )3 |
50 |
mA |
IN |
IN |
DC |
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TA |
Operating temperature range |
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LM139 |
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±55 to +125 |
°C |
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LM239/239A |
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±25 to +85 |
°C |
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LM339/339A |
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0 to +70 |
°C |
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LM2901 |
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±40 to +125 |
°C |
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MC3302 |
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±40 to +85 |
°C |
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TSTG |
Storage temperature range |
±65 to +150 |
°C |
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TSOLD |
Lead soldering temperature (10sec max) |
300 |
°C |
NOTES:
1.Derate above 25°C, at the following rates:
F Package at 9.5mW/°C
N Package at 11.4mW/°C
D Package at 8.3mW/°C
2.Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately 20mA independent of the magnitude of V+.
3.This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector±base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This is not destructive and normal output states will reestablish when the input voltage, which was negative, again returns to a value greater than ±0.3VDC.
1995 Nov 27 |
3 |