January 1995 2
Philips Semiconductors Product specification
1-to-64 bit variable length shift register
HEF4557B
LSI
DESCRIPTION
The HEF4557B is a static clocked serial shift register
whose length may be programmed to be any number of
bits between 1 and 64. The number of bits selected is
equal to the sum of the subscripts of the enabled length
control inputs (L
1
, L
2
, L
4
, L
8
, L
16
and L
32
) plus one. Serial
data may be selected from the D
A
or D
B
data inputs with
the A/B select input. This feature is useful for recirculation
purposes. Information on D
A
or D
B
is shifted into the first
register position and all the data in the register is shifted
one position to the right on the LOW to HIGH transition of
CP
0
while CP
1
is LOW or on the HIGH to LOW transition
of CP
1
while CP
0
is HIGH. A HIGH on master reset (MR)
resets the register and forces O to LOW and O to HIGH,
independent of the other inputs.
Fig.1 Functional diagram.
PINNING
D
A
, D
B
data inputs
A/
B select data input
CP
0
clock input
CP
1
clock enable input
MR asynchronous master reset
L
1
to L
32
bit-length control inputs
O,
O buffered outputs
Fig.2 Pinning diagram.
FAMILY DATA, I
DD
LIMITS category LSI
See Family Specifications
HEF4557BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4557BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4557BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America