INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4043B MSI
Quadruple R/S latch with 3-state outputs
Product specification |
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January 1995 |
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File under Integrated Circuits, IC04 |
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Philips Semiconductors |
Product specification |
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Quadruple R/S latch with 3-state outputs
HEF4043B
MSI
DESCRIPTION
The HEF4043B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO). Each latch has an active HIGH set input (S0 to S3), an active HIGH reset input (R0 to R3) and an active HIGH 3-state output (O0 to O3).
When EO is HIGH, the state of the latch output (On) can be determined from the function table below. When EO is LOW, the latch outputs are in the high impedance OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common busing of the outputs.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
HEF4043BP(N): 16-lead DIL; plastic (SOT38-1) HEF4043BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4043BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
PINNING |
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EO |
common output enable input |
S0 to S3 |
set inputs (active HIGH) |
R0 to R3 |
reset inputs (active HIGH) |
O0 to O3 |
3-state buffered latch outputs |
FUNCTION TABLE
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INPUTS |
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OUTPUT |
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On |
EO |
Sn |
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Rn |
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L |
X |
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X |
Z |
H |
L |
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H |
L |
H |
H |
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X |
H |
H |
L |
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L |
latched |
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Notes
1.H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial
Z = high impedance state
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995 |
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