Philips HEF4043BT, HEF4043BPB, HEF4043BP, HEF4043BDB, HEF4043BD Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4043B MSI
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Quadruple R/S latch with 3-state outputs
HEF4043B
MSI
DESCRIPTION
The HEF4043B is a quadruple R/S latch with 3-state outputs with a common output enable input (EO). Each latch has an active HIGH set input (S0 to S3), an active HIGH reset input (R0to R3) and an active HIGH 3-state output (O0to O3).
When EO is HIGH, the state of the latch output (On) can be determined from the function table below. When EO is LOW, the latch outputs are in the high impedance OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common busing of the outputs.
Fig.1 Functional diagram.
PINNING
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance state
FAMILY DATA, IDDLIMITS category MSI
See Family Specifications
HEF4043BP(N): 16-lead DIL; plastic (SOT38-1) HEF4043BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4043BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America
EO common output enable input S
0
to S
3
set inputs (active HIGH)
R
0
to R
3
reset inputs (active HIGH)
O
0
to O
3
3-state buffered latch outputs
INPUTS OUTPUT
O
n
EO S
n
R
n
LX X Z HL H L HH X H H L L latched
Fig.2 Pinning diagram.
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