Philips HEF4040BU, HEF4040BT, HEF4040BPB, HEF4040BP, HEF4040BDB Datasheet

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC

∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC

HEF4040B MSI

12-stage binary counter

Product specification			January 1995
File under Integrated Circuits, IC04

Philips Semiconductors	Product specification

12-stage binary counter

HEF4040B

MSI

DESCRIPTION

The HEF4040B is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (O0 to O11).

The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

HEF4040BP(N): 16-lead DIL; plastic

(SOT38-1)

PINNING
			clock input (HIGH to LOW edge-triggered)
	CP
	MR		master reset input (active HIGH)
	O0 to O11		parallel outputs

APPLICATION INFORMATION

Some examples of applications for the HEF4040B are:

∙Frequency dividing circuits

∙Time delay circuits

∙Control counters

FAMILY DATA, IDD LIMITS category MSI

See Family Specifications

HEF4040BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF4040BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

January 1995

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