Philips HEF40374BU, HEF40374BT, HEF40374BPB, HEF40374BP, HEF40374BDB Datasheet

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DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF40374B MSI
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Octal D-type flip-flop with 3-state outputs
HEF40374B
MSI
DESCRIPTION
The HEF40374B is an octal D-type flip-flop with 3-state buffered outputs with a common clock input (CP). The device is used primarily as an 8-bit positive edge-triggered storage register for interfacing with a 3-state bus. Data on the D-inputs is transferred to storage during the LOW-to-HIGH transition of the clock (CP) input. The 3-state output buffers are controlled by an active LOW output enable input (EO). A HIGH on EO forces the eight outputs to a high impedance OFF-state. When EO is LOW, the data in the register appears at the outputs.
The output stages have high current output capability suitable for driving highly capacitive loads. The device features hysteresis on the CP input to improve noise rejection. Schmitt-trigger action in the E input makes the circuit highly tolerant to slower input rise and fall times.
The HEF40374B is pin and functionally compatible with the TTL ‘374’ device. Supply voltage range: 3 to 15 V.
Fig.1 Functional diagram. Fig.2 Pinning diagram.
HEF40374BP(N): 20-lead DIL; plastic (SOT146-1) HEF40374BD(F): 20-lead DIL; ceramic (cerdip)
(SOT152) HEF40374BT(D): 20-lead SO; plastic (SOT163-1) ( ): Package Designator North America
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
D
0
to D
7
data inputs CP clock input EO output enable input (active LOW) O
0
to O
7
3-state buffered outputs
January 1995 3
Philips Semiconductors Product specification
Octal D-type flip-flop with 3-state outputs
HEF40374B
MSI
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Fig.3 Logic diagram.
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