Philips HEF40373BU, HEF40373BT, HEF40373BP, HEF40373BDB Datasheet

DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF40373B MSI
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Octal transparent latch with 3-state outputs
HEF40373B
MSI
DESCRIPTION
The HEF40373B is an 8-bit transparent latch with 3-state buffered outputs. The output stages have high current output capability suitable for driving highly capacitive loads. The latch outputs follow the data inputs when the latch enable (E) is HIGH. When E is LOW, the data that meets the set-up times is latched. The 3-state outputs are controlled by the output enable input EO. A HIGH on
EO causes the outputs to assume a high impedance OFF-state. The device features hysteresis on the E input to improve noise rejection. Schmitt-trigger action in the E input makes the circuit highly tolerant to slower input rise and fall times.
The HEF40373B is pin and functionally compatible with the TTL ‘373’ device. Supply voltage range: 3 to 15 V.
Fig.1 Functional diagram. Fig.2 Pinning diagram.
HEF40373BP(N): 20-lead DIL; plastic
(SOT146-1)
HEF40373BD(F): 20-lead DIL; ceramic (cerdip)
(SOT152)
HEF40373BT(D): 20-lead SO; plastic
(SOT163-1)
( ): Package Designator North America
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
D
0
to D
7
data inputs E latch enable input EO output enable input (active LOW) O
0
to O
7
3-state buffered outputs
January 1995 3
Philips Semiconductors Product specification
Octal transparent latch with 3-state outputs
HEF40373B
MSI
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Fig.3 Logic diagram.
Fig.4 Logic diagram (one latch).
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