Philips hef40373b DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC

•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC

HEF40373B
MSI

Octal transparent latch with 3-state
outputs

Product specification
File under Integrated Circuits, IC04

January 1995

Philips Semiconductors Product specification

Octal transparent latch with 3-state outputs

DESCRIPTION

The HEF40373B is an 8-bit transparent latch with 3-state
buffered outputs. The output stages have high current
output capability suitable for driving highly capacitive
loads. The latch outputs follow the data inputs when the
latch enable (E) is HIGH. When E is LOW, the data that
meets the set-up times is latched. The 3-state outputs are
controlled by the output enable input EO. A HIGH on

EO causes the outputs to assume a high impedance
OFF-state. The device features hysteresis on the E input
to improve noise rejection.
Schmitt-trigger action in the E input makes the circuit
highly tolerant to slower input rise and fall times.

The HEF40373B is pin and functionally compatible with
the TTL ‘373’ device.
Supply voltage range: 3 to 15 V.

HEF40373B

MSI

Fig.1 Functional diagram. Fig.2 Pinning diagram.

HEF40373BP(N): 20-lead DIL; plastic

(SOT146-1)

HEF40373BD(F): 20-lead DIL; ceramic (cerdip)

(SOT152)

HEF40373BT(D): 20-lead SO; plastic

(SOT163-1)

( ): Package Designator North America

January 1995 2

PINNING

D

to D

0

E latch enable input
EO output enable input (active LOW)
O

to O

0

FAMILY DATA, I

See Family Specifications

data inputs

7

3-state buffered outputs

7

LIMITS category MSI

DD

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January 1995 3

Philips Semiconductors Product specification

Octal transparent latch with 3-state outputs

Fig.3 Logic diagram.

Fig.4 Logic diagram (one latch).

HEF40373B

MSI