Philips HEF40194BT, HEF40194BP, HEF40194BD Datasheet
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40194B
MSI
4-bit bidirectional universal shift
register
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors Product specification
4-bit bidirectional universal shift register
DESCRIPTION
The HEF40194B is a 4-bit bidirectional shift register with
two mode control inputs (S0and S1), a clock input (CP), a
serial data shift left input (DSL), a serial data shift right input
(DSR), four parallel data inputs (P0to P3), an overriding
asynchronous master reset input (MR), and four buffered
parallel outputs (O0to O3). When LOW, MR resets all
stages and forces O0to O3 LOW, overriding all other input
conditions. When MR is HIGH, the operation mode is
controlled by S0and S1as shown in the function table.
HEF40194B
MSI
Serial and parallel operation are edge-triggered on the
LOW to HIGH transition of CP. The inputs at which the
data are to be entered and S
set-up time before the LOW to HIGH transition of CP.
, S1must be stable for a
0
Fig.1 Functional diagram.
PINNING
, S
S
0
1
to P
P
0
D
SR
D
SL
mode control inputs
parallel data inputs
3
serial data shift right input
serial data shift left input
CP clock input (LOW to HIGH edge-triggered)
MR master reset input (active LOW)
O
0
to O
buffered parallel outputs
3
Fig.2 Pinning diagram.
HEF40194BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF40194BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF40194BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
FAMILY DATA, I
LIMITS category MSI
DD
See Family Specifications
January 1995 2
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January 1995 3
Philips Semiconductors Product specification
4-bit bidirectional universal shift register
Fig.3 Logic diagram.
HEF40194B
MSI
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