Philips hef40174b DATASHEETS

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC

•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC

HEF40174B
MSI

Hex D-type flip-flop

Product specification
File under Integrated Circuits, IC04

January 1995

Philips Semiconductors Product specification

Hex D-type flip-flop

DESCRIPTION

The HEF40174B is a hex edge-triggered D-type flip-flop
with six data inputs (D0to D5), a clock input (CP), an
overriding asynchronous master reset input (MR), and six

HEF40174B

MSI

buffered outputs (O
transferred to O0to O5on the LOW to HIGH transition of
CP if MR is HIGH. When LOW, MR resets all flip-flops
(O0to O5= LOW) independent of CP and D0to D5.

to O5). Information on D0to D5is

0

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

HEF40174BP(N): 16-lead DIL; plastic

(SOT38-1)

HEF40174BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF40174BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

FAMILY DATA, IDDLIMITS category MSI

See Family Specifications

January 1995 2

PINNING

D

to D5data inputs

0

CP clock input (LOW to HIGH; edge-triggered)
MR master reset input (active LOW)
O

to O5buffered outputs

0

FUNCTION TABLE

INPUTS OUTPUT

CP D

HH H

LH L

X H no change

XXL L

Notes

1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial

= positive-going transition
= negative-going transition

MR O