Philips HEF4016BU, HEF4016BT, HEF4016BPB, HEF4016BP, HEF4016BDB Datasheet
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4016B gates
Quadruple bilateral switches
Product specification |
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January 1995 |
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File under Integrated Circuits, IC04 |
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Philips Semiconductors |
Product specification |
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Quadruple bilateral switches
HEF4016B gates
DESCRIPTION
The HEF4016B has four independent analogue switches (transmission gates). Each switch has two input/output terminals (Y/Z) and an active HIGH enable input (E). When E is connected to VDD a low impedance bidirectional path between Y and Z is established (ON condition). When E is connected to VSS the switch is disabled and a high
Fig.1 Functional diagram.
impedance between Y and Z is established (OFF condition). Current through a switch will not cause additional VDD current provided the voltage at the terminals of the switch is maintained within the supply voltage range; VDD ³ (VY, VZ) ³ VSS. Inputs Y and Z are electrically equivalent terminals.
Fig.2 Pinning diagram.
PINNING |
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E0 to E3 |
enable inputs |
Y0 to Y3 |
input/output terminals |
Z0 to Z3 |
input/output terminals |
APPLICATION INFORMATION
Some examples of applications for the HEF4016B are:
·Signal gating
·Modulation
·Demodulation
·Chopper
HEF4016BP(N): 14-lead DIL; plastic (SOT27-1)
HEF4016BD(F): 14-lead DIL; ceramic (cerdip) (SOT73)
HEF4016BT(D): 14-lead SO; plastic (SOT108-1)
( ): Package Designator North America
Fig.3 Schematic diagram (one switch).
January 1995 |
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Philips Semiconductors |
Product specification |
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Quadruple bilateral switches
HEF4016B gates
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Power dissipation per switch P max. 100 mW For other RATINGS see Family Specifications
DC CHARACTERISTICS
Tamb = 25 °C; VSS = 0 V (unless otherwise specified)
PARAMETER |
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VDD |
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SYMBOL |
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TYP. |
MAX. |
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UNIT |
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CONDITIONS |
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V |
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5 |
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8000 |
− |
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Ω |
En at VIH; Vis = 0 to VDD; see Fig.4 |
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ON resistance |
10 |
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RON |
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230 |
690 |
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Ω |
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15 |
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115 |
350 |
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Ω |
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5 |
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140 |
425 |
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Ω |
En at VIH; Vis = VSS; see Fig.4 |
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ON resistance |
10 |
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RON |
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65 |
195 |
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Ω |
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15 |
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50 |
145 |
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Ω |
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5 |
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170 |
515 |
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Ω |
En at VIH; Vis = VDD; see Fig.4 |
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ON resistance |
10 |
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RON |
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95 |
285 |
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Ω |
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15 |
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75 |
220 |
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Ω |
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‘ ’ ON resistance |
5 |
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200 |
− |
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Ω |
En at VIH; Vis = 0 to VDD; see Fig.4 |
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between any two |
10 |
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RON |
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15 |
− |
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Ω |
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channels |
15 |
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10 |
− |
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Ω |
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VDD |
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Tamb (°C) |
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−40 |
+ 25 |
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+ 85 |
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PARAMETER |
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V |
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SYMBOL |
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UNIT |
CONDITION |
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MIN. MAX. MIN. MAX. MIN. MAX. |
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Quiescent |
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5 |
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− |
1,0 |
− |
1,0 |
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− |
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7,5 |
μA |
VSS = 0; all valid |
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device |
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10 |
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IDD |
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− |
2,0 |
− |
2,0 |
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− |
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15,0 |
μA |
input combinations; |
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current |
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15 |
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− |
4,0 |
− |
4,0 |
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− |
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30,0 |
μA |
VI = VSS or VDD |
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Input leakage |
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15 |
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± IIN |
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− |
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− |
− |
300 |
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− |
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1000 |
nA |
En at VSS or VDD |
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current at En |
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OFF-state leakage |
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5 |
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− |
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− |
− |
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− |
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− |
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− |
nA |
En at VIL; |
current, any |
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10 |
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IOZ |
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− |
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− |
− |
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− |
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− |
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− |
nA |
Vis = VSS or VDD; |
channel OFF |
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15 |
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− |
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− |
− |
200 |
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− |
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− |
nA |
Vos = VDD or VSS |
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En input |
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5 |
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− |
1,5 |
− |
1,5 |
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− |
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1,5 |
V |
switch OFF; see |
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voltage LOW |
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10 |
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VIL |
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− |
3,0 |
− |
3,0 |
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− |
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3,0 |
V |
Fig.9 for IOZ |
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15 |
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− |
4,0 |
− |
4,0 |
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− |
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4,0 |
V |
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En input |
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5 |
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3,5 |
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− |
3,5 |
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− |
3,5 |
− |
V |
low-impedance |
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voltage HIGH |
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10 |
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VIH |
7,0 |
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− |
7,0 |
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− |
7,0 |
− |
V |
between Y and Z (ON |
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15 |
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11,0 |
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− |
11,0 |
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− |
11,0 |
− |
V |
condition) |
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see RON switch |
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January 1995 |
3 |
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