Philips HEF4014BU, HEF4014BT, HEF4014BPB, HEF4014BP, HEF4014BDB Datasheet

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

∙The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC

∙The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC

HEF4014B MSI

8-bit static shift register

Product specification			January 1995
File under Integrated Circuits, IC04

Philips Semiconductors	Product specification

8-bit static shift register

HEF4014B

MSI

DESCRIPTION

The HEF4014B is a fully synchronous edge-triggered 8-bit static shift register with eight synchronous parallel inputs (P0 to P7), a synchronous serial data input (DS), a synchronous parallel enable input (PE), a LOW to HIGH edge-triggered clock input (CP) and buffered parallel outputs from the last three stages (O5 to O7).

Operation is synchronous and the device is edge-triggered on the LOW to HIGH transition of CP. Each register stage is of a D-type master-slave flip-flop. When PE is HIGH, data is loaded into the register from P0 to P7 on the LOW to HIGH transition of CP. When PE is LOW, data is shifted to the first position from DS, and all the data in the register is shifted one position to the right on the LOW to HIGH transition of CP. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times

Fig.1 Functional diagram.

HEF4014BP(N):	16-lead DIL; plastic
	(SOT38-1)
HEF4014BD(F):	16-lead DIL; ceramic (cerdip)
	(SOT74)
HEF4014BT(D):	16-lead SO; plastic
	(SOT109-1)

( ): Package Designator North America

FAMILY DATA, IDD LIMITS category MSI

Fig.2 Pinning diagram.

See Family Specifications

January 1995

2