Copyright 2002 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.
! All Functional blocks shaded grey are required for
the"Basic Configuration".
The remainder is required for the "Enhanced Configuration".
RS323
DVI-D
VGA2 VGA1
rms
1.1.3Miscellaneous
VGA1VGA2RC-OUT
Mains voltage: 95 - 264 V
Mains frequency: 50/60 Hz
AC
Ambient temperature: + 5 to + 40 deg. C
Maximum humidity: 90 % R.H.
Power consumption: around 200 W
Standby Power consumption: < 3 W
Weight: 24 kg
Dimensions (WxHxD): 964 x 512 x 89 mm
Technical Specifications, Connections and Chassis Overview
PLASMA DISPLAY PANEL
POWER SUPPLY PANEL
P
SC
VGA
SCAVIO PANEL
VGA CONNECTOR
PANEL
Figure 1-6 PWB Location
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Page 5
Safety Instructions, Warnings and Notes
2.Safety Instructions, Warnings and Notes
EN 5FM232.
2.1Safety Instructions
Safety regulations require that during a repair:
•Connect the set to the mains via an isolation transformer (=
800 VA).
•Do not operate the monitor without the front glass plate.
One function of this glass plate is to absorb IR radiation.
Without this glass plate, the level of radiation could
damage your eyes.
•Replace safety components, indicated by the symbol
only by components identical to the original ones.
Safety regulations require that after a repair, the set must be
returned in its original condition. Pay, in particular, attention to
the following points:
•Route the wire trees correctly and fix them with the
mounted cable clamps.
•Check the insulation of the mains lead for external
damage.
•Check the electrical DC resistance between the mains plug
and the secondary side (only for sets which have a mains
isolated power supply):
1. Unplug the mains cord and connect a wire between the
two pins of the mains plug.
2. Set the mains switch to the 'on' position (keep the
mains cord unplugged!).
3. Measure the resistance value between the pins of the
mains plug and the metal shielding of the tuner or the
aerial connection on the set. The reading should be
between 4.5 MΩ and 12 MΩ.
4. Switch 'off' the set, and remove the wire between the
two pins of the mains plug.
•Check the cabinet for defects, to avoid touching of any
inner parts by the customer.
•Where necessary, measure the voltages in the power
supply section both in normal operation (+) and in standby
(/). These values are indicated by means of the
appropriate symbols.
•The semiconductors indicated in the circuit diagram and in
the parts lists, are interchangeable per position with the
semiconductors in the unit, irrespective of the type
indication on these semiconductors
,
2.2Warnings
•All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD "). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Available ESD protection equipment:
– Complete kit ESD3 (small tablemat, wristband,
connection box, extension cable and earth cable) 4822
310 10671.
– Wristband tester 4822 344 13999.
•Be careful during measurements in the high voltage
section.
•Never replace modules or other components while the unit
is switched 'on'.
•When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.
2.3Notes
•Clean the glass plate in front of the plasma display with a
slightly humid cloth. If, due to circumstances, there is some
dirt between the glass plate and the plasma display, this
must be cleaned by a qualified service engineer (see
chapter 4).
•Measure the direct voltages and oscillograms with regard
to the chassis ground (,), or hot ground (-) as this is
called.
•The direct voltages and oscillograms shown in the
diagrams are indicative. Measure them in the Service
Default Mode (see chapter 5).
Page 6
EN 6FM233.
3.Directions for Use
Directions for Use
Page 7
Directions for Use
EN 7FM233.
Page 8
EN 8FM233.
Directions for Use
Page 9
Directions for Use
EN 9FM233.
Page 10
EN 10FM233.
Directions for Use
Page 11
Directions for Use
EN 11FM233.
Page 12
EN 12FM233.
Directions for Use
Page 13
Directions for Use
EN 13FM233.
Page 14
EN 14FM234.
Mechanical Instructions
4.Mechanical Instructions
Index of this chapter:
•Service Position Monitor
•Rear Cover Removal
•Service Position Panels
•PDP and Glass Plate Replacement
•Re-assembly
Note: Figures below can deviate from the actual situation, due
to different set executions.
4.1Service Position Monitor
Figure 4-1 Service Position
First, put the monitor in its service position. Therefore,
disconnect all cables connected to the monitor and take the
monitor of the wall (or tabletop stand). Then, place the monitor
in the re-inforced transport cushions that function also as
service stand (you can order them separately under code 3122
126 40612). See figure above.
4.2Rear Cover Removal
To be able to access or measure the panels, remove the rear
cover (metal back plate):
Warning: make sure that the mains power is disconnected
before you remove the metal back plate.
1. Remove all fixation screws from the back plate, as
indicated in figure above (five at the top, four at each side,
seven at the bottom, and the two larger ones just below the
‘wall mounting holes’).
2. Remove the metal back plate. Make sure that wires and flat
foils are not damaged during plate removal.
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4.3Service Position Panels
4.3.1SCAVIO Panel
Solder-side SCAVIO
B
CL 16532099_042.eps
Figure 4-2 Service position SCAVIO (1)
To access the panel:
1. Remove the cables from connectors 0320, 0305, 0301,
0319 and 0388 on the SCAVIO panel.
2. Remove the power cable from the mains power inlet to the
power supply (connector 0308).
3. Remove the five screws at the bottom of the SCAVIO panel
cover plate.
4. Hold the SCAVIO panel while removing the top screw, in
order to prevent that it will fall.
5. Take the panel out, and turn it 180 degrees, so that you
face the solder side of the SCAVIO panel.
6. Reconnect all cables. Use a standard power cable to
connect the mains directly to PSU-connector 0308, and
use the 'LED/Switch panel' service kit 3122 785 90410 (as
the original cable is too short).
Caution: When measuring, watch out for the 'hot' left heat sink
of the PSU!
Another way to measure the SCAVIO panel:
1. Remove the five screws at the bottom of the SCAVIO panel
cover plate.
2. Hold the SCAVIO panel while removing the top screw, in
order to prevent that it will fall.
3. Put a piece of paper (or cardboard) in front of the Power
Supply.
4. Take the panel out, and turn it upward [B], so that you face
the solder-side of the SCAVIO panel.
Caution: Make sure that the metal connector plate does not
touch any 'hot' part of the Power Supply (heatsink).
200901
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Mechanical Instructions
EN 15FM234.
Component-side SCAVIO
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Figure 4-3 Service position SCAVIO (2)
To access the other side of the SCAVIO panel:
1. Disconnect all cables going to the SCAVIO panel.
2. Remove all screws at the connectors of the connector
plate, see figure 'Solder-side SCAVIO'.
3. Remove the three fixation screws that connect the SCAVIO
panel to the connector plate, see figure 'Component-side
SCAVIO'.
4. Reconnect the SCAVIO panel, be careful: do not make a
short-circuit!
It is possible to perform most measurements from the
component level side (thus, how the panel is mounted in the
set). However, to reach the copper side of the Power Supply:
1. Unplug the power.
2. Remove all eight fixation screws from the Power Supply:
three at each side and two in the middle.
3. Hinge the Power Supply forward, so that you can reach the
copper side. Use a non-conducting part underneath, to
support the PWB (e.g. a carton box). Caution: make sure
that, when you hinge the Power Supply forward, you do not
damage the cables. Pay special attention to the flat cable
(on connector 0307) and the cable on connector 0306,
because they can be easily damaged by the sharp edge of
the connector plate.
4. To remove the Power Supply, unplug all cables.
5. Remove the Power Supply.
4.3.4Audio Amplifier Panel
The solder-side of this panel is directly accessible. To access
the component-side, or to remove the whole panel, unscrew
the three fixation screws (see figure 'Power Supply Panel'), and
(re)move the panel.
4.3.5LED/Switch Panel and Speakers
Plastic backcover
4.3.2VGA Connector Panel
To remove the VGA Connector Panel:
1. Squeeze the three plastic pins that connect this panel to
the SCAVIO board, while you pull it carefully upwards.
2. Unplug the flat cable.
4.3.3 Power Supply Panel
B
Foam cushion
CL 16532099_045.eps
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CL 16532099_044.eps
Figure 4-4 Service Position Power Supply
270901
Figure 4-5 Service Position LED/Switch Panel and Speakers
To access or replace the LED/Switch panel and/or speakers:
1. Take the monitor from its service stand, and put it (face
down) on a soft surface (blanket or foam cushion), to make
sure that you do not damage the front glass plate.
2. Unscrew all fixation screws of the plastic back cover: four
at the left and right side, three at the bottom and top side.
3. Lift and remove the plastic back cover.
4. You can access now the LED/Switch panel and/or the
speakers.
Page 16
EN 16FM234.
4.3.6LED/Switch panel
To measure the component-side, or to remove the LED/Switch
panel, unscrew one fixation screw (see enlarged part of figure
'LED/Switch Panel and Speakers'), and remove the panel.
4.3.7Loudspeakers
As soon as you have removed the plastic back cover, you must
replace the speaker-box sealing foams (12nc: 3122 358
76221). This, to ensure that the loudspeakers are airtight. Do
not stretch the foam during mounting. Pay special attention to
the corners, to make sure that the foam is not stretched and
that it is pushed in the corners.
4.4PDP and Glass Plate Replacement
Shielding frame
Mechanical Instructions
Front displayFoam cushion
CL 16532099_046.eps
270901
Figure 4-6 Exchange Glass Plate
Exchange the glass plate
1. Take the monitor from its service stand, and put it (face
down) on a soft surface (blanket or foam cushion), to make
sure that you do not damage the front glass plate.
2. Remove the metal back plate as described in paragraph
'Rear Cover Removal'.
3. Unscrew all fixation screws of the plastic back cover: four
at the left and right side, three at the bottom and top side.
4. Lift and remove the plastic back cover.
5. Unscrew two fixation screws of the triangular shaped cable
holder at the left bottom, see figure 'Exchange Glass Plate'.
6. Unscrew all fixation screws of the (metallised) shielding
frame, four at both sides and four at the top and bottom,
see figure 'Exchange Glass Plate'.
7. Unplug the cable of the LED/Switch panel, connector 0320.
8. You can now remove the (metallised) shielding frame,
together with the PDP, Audio panel, Power supply and
SCAVIO panel attached to it, see figure 'Exchange Glass
Plate'. Note: To prevent scratches, make sure to put the
shielding frame together with the PDP on a soft surface.
9. Replace the glass plate.
CL 16532099_047.eps
Figure 4-7 Exchange PDP
To exchange the PDP panel:
1. Take out the SCAVIO panel and Power Supply panel, as
described earlier.
2. Unscrew all fixation screws of the (metallised) shielding
frame (two at the top and two at the bottom, see figure
'Exchange PDP').
3. The shielding frame can now be taken off the PDP.
4. Replace the PDP.
4.5Re-assembly
To re-assemble the whole set, do all processes in reverse
order.
Notes:
•You must replace the speaker-box sealing foam, in case
the plastic rear cover has been (re)moved.
•While re-assembling, make sure all the cables are in their
original position and make sure all the EMC foams are
present to ensure 'EMC tightness'.
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Service Modes, Error Codes and Fault Finding
5.Service Modes, Error Codes and Fault Finding
Index of this chapter:
1. Test points
2. Service Modes
3. Problems and Solving Tips (related to CSM)
4. ComPair
5. Error Codes
6. The Blinking LED Procedure
7. Protections
8. Repair Tips
Normal
operation
Override software
protections
NORMAL OPERATION
(and all other states)
Short SDM pins
(also works from Standby)
"0-6-2-5-9-6-MENU"
EN 17FM235.
RC sequence
Mains ON
5.1Test Points
The chassis is equipped with test points (I- and F-points)
printed on the circuit board assemblies. See test point overview
in chapter 6.
Perform measurements under the following conditions:
•Service Default Mode.
•Video: colour bar signal (via PC or VGA-generator).
•Audio: 1 kHz, 2 V
(via PC or VGA-generator).
PP
5.2Service Modes
Service Default Mode (SDM) and Service Alignment Mode
(SAM) offer several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between a Philips Customer Care Centre (P3C) and a
customer.
There is also the option of using ComPair, a hardware interface
between a computer (see requirements) and the FTV chassis.
It offers the ability of structured trouble shooting, test pattern
generation, error code reading, software version readout and
software upgrading.
Minimum requirements: a Pentium Processor, Windows 9x/NT/
2000/XP, and a CD-ROM drive (see also paragraph 5.4).
5.2.1Service Default Mode (SDM)
Ignore all "Service unfriendly" m odes.
RC button.
"UNDO" ignore all
"Service unfriendly
modes"
Reset to last status
STANDBY
Start blinking LED sequence to s how the
error codes according to the blinking LED
procedure.
Lineair audio and video settings are set to
50% (middle value) except volume (set to
low volume level, 25% of max)
"00" or
"Standby"
Service Default Mode
Display SDM in "top line"
(all other OSD off).
Blinking LED sequence.
RC-code
0-6-2-5-9-6-OSD
or INFO+
RC-code
0-6-2-5-9-6-menu
RC sequence
OFF
Mains OFF
SAM
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260901
Figure 5-1 SDM Flowchart
How to enter SDM
Use one of the following methods:
•Use the standard RC-transmitter and key in the code
0 6 2 5 9 6, directly followed by the MENU button.
•Short jumpers 1 and 2 of connector 0382 on the SCAVIO
panel.
After entering SDM, a blank screen is visible, with SDM in the
upper left side for recognition. The Blinking LED procedure is
started and will indicate any possible errors via the (orange)
front LED.
Purpose
•To create a pre-defined setting to get the same
measurement results as given in this manual.
•To override SW protections (only when SDM is entered via
the 'service pins' on connector 0382).
•To start the blinking LED procedure.
Specifications
•All picture settings at 50% (brightness, contrast, etc.).
•Colour temperature is set to 'normal'.
•Bass, treble and balance at 50%; volume at 25%.
•All service-unfriendly modes (if present) are disabled, like:
•Video blanking,
•Slow de-mute,
•Anti ageing,
•Automatic switch to Standby when no sync signals are
received.
How to navigate
To toggle to the SAM mode, use a standard customer RCtransmitter and key in the code 0 6 2 5 9 6, directly followed by
the OSD (i+) key.
How to exit
Use one of the following methods (the set returns to its last
status):
•Switch the set to STANDBY by pressing the power button
on the remote control transmitter (if you switch the set 'off'
by removing the Mains power, the set will return in SDM,
when the Mains power is re-applied).
•Use the standard RC-transmitter and key in the code 0 0.
5.2.2Service Alignment Mode (SAM)
Purpose
•To perform (software) alignments.
•Easy way to identify the commercial type number of the
set.
•Easy identification of the used software versions.
•To display (or clear) the error code buffer.
•View operational hours.
Specifications
•Operation hours counter.
•Software version reading.
•Error buffer reading and erasing.
•Software alignments.
•Test pattern generation.
Page 18
EN 18FM235.
RC button,
e.g. P+ or P-
STANDBY
Do not store
settings made
during alignments
RC button,
e.g. P+ or P-
"UNDO" ignore
all "Service
unfriendly
modes"
"Standby"
Settings made
during alignments
are stored
STANDBY
NORMAL OPERATION
RC sequence "0-6-2-5-9-6-OSD "(for Europe & A/P)
RC sequence "0-6-2-5-9-6-INFO+" (for USA/LatAm)
Short SAM pins (works also from Standby)
RC sequence
"00"
or
or
Ignore all "Ser vice
unfriendly" mod es
Service Alignment Mode
Display "SAM" top level
menu
Lower menu selection
(with cursor buttons)
RC-code "0-6-2-5-9-6-INFO+"
RC-code "0-6-2-5-9-6-MENU" -
Upper menu selection
(with cursor buttons)
RC-code "0-6-2-5-9-6-OSD"
Service Modes, Error Codes and Fault Finding
Mains ON
OFF
(Settings made
during alignment s
are stored)
Mains OFF
or
SAM submenus
(whitepoints, align-
ments, etc.)
Figure 5-2 SAM Flowchart
How to enter
Use one of the following methods:
•Use a standard RC-transmitter and key in the code
0 6 2 5 9 6 directly followed by the OSD (i+) button.
Note: the OSD (i+) is not available on the original FM23
remote control, therefore use another Philips remote
control (e.g. MG, EMG or A10).
•Short jumpers 3 and 4 of connector 0382 on the SCAVIO
panel.
The following screen is visible:
Service Alignment MenuGeneral
Type nr. - AG Code 32FD9944/01S (example)
SW version OT C AAAABC-X.Y xxxxx
SW version PW AAAABC-X.Y xxxxx
SW version EP LD AAAABC-X.Y xxxxx
Errors 1 xx xx xx xx xx
Errors 2 xx xx xx xx xx
Operational hours xx
Reset error buffer Press OK to reset
Store Press OK to store
CL 16532099_102.pdf
Figure 5-3 SAM Menu 'General'
1. Type Nr. Gives the commercial type number of the
monitor, e.g. 32FD9944/01S.
2. AG Code. Is not implemented.
3. SW Version OTC (AAAABC-X.Y-xxxxx).
Note: You will find details of the latest software versions in
the chapter 'Software Survey' of the 'Product Survey Colour Television' publication, which is published four
times each year.
•A = the chassis name (FM23 for 32" displays or FM24
for 42" displays).
•B = the region (E= Europe, A= Asia Pacific, U= NAFTA,
L= LATAM or G = Global).
•C = the configuration name (B= Basic, E= Enhanced).
•X = the main software version number.
•Y = the sub software version number.
•x = last five digits of 12nc code.
4. SW Version PW (AAAABC-X.Y-xxxxx). See description
above.
5. SW Version EPLD (AAAABC-X.Y-xxxxx). See description
above.
SDM
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260901
6. Errors 1. Gives the last five errors of the error buffer. The
last detected error is displayed at the most left position.
The errors are displayed as 2 digit numbers and separated
by a space. When less than 10 errors occurred, the rest of
the line(s) is empty. In case of no errors the text 'No Errors'
is displayed behind menu item 'Errors 1'. See paragraph
5.5 for a description.
7. Errors 2. Gives the first five errors of the error buffer. The
last detected error is displayed at the most left position.
8. Operational hours. The Operations Hours indicate the
time that the display was active with half an hour resolution.
It represents the system hours (OTC), not the PDP hours.
9. Reset error buffer. Erase the contents of the error buffer.
Press 'OK' on your remote control to activate. The content
of the error buffer is cleared.
10. Store. This will store the performed alignments. Press 'OK'
on your remote control to activate.
Note: if you do not want to store the performed alignments,
leave the SAM mode via code 0 0 on your remote control.
Do not activate the 'store' item.
How to navigate
Use one of the following methods:
•Select the sub-menu's (upper line) with the CURSOR
LEFT/RIGHT keys on the remote control transmitter.
•Select the menu items with the CURSOR UP/DOWN keys.
With the CURSOR LEFT/RIGHT keys it is possible to:
– Activate the selected menu item.
– Change the value of the selected menu item.
•To toggle to the SDM mode, use the standard customer
RC-transmitter and key in the code 0 6 2 5 9 6, directly
followed by the MENU key.
How to exit
Use one of the following methods:
•Switch the set 'off' (with the Mains switch or by pulling the
Mains cord).
Note: new alignment settings are always stored, even
when item 'store' was not activated!
•Switch the set to 'standby' by pressing the power button on
the remote control transmitter.
Note: new alignment settings are always stored, even
when item 'store' was not activated!
•Use the standard RC-transmitter and key in the code 0 0.
Note: new alignment settings are not stored (except when
item 'store' was activated)!
5.2.3Customer Service Mode (CSM)
Purpose
When a customer is having problems with his TV-set, he can
call his dealer or helpdesk. The service technician can than ask
the customer to activate the CSM, in order to identify the status
of the set. Now, the service technician can judge the severness
of the complaint. In many cases, he can advise the customer
how to solve the problem, or he can decide if it is necessary to
visit the customer.
The CSM is a read only mode, therefore modifications in this
mode are not possible.
Page 19
Service Modes, Error Codes and Fault Finding
Normal operati on mode
Key in sequence: 1-2-3-6-5-4 on RC
Store current picture, sound and feature settings for later
retrieval (only store if needed to go back to normal
operation).
Set pre-defined picture, sound and feature settings (to be
able to see and hear if the set is working pr operly and to be
able to read the CSM information).
Ignore service unfriendly options
Volume up/down
Numerical key,
external
If other key
= standby
"Cursor right"
To previous CSM page
Restore picture, sound and
feature settings (that were
stored during entry)
Display CSM information screen
"Cursor left"
Other key,
e.g. "menu"
mains off
Figure 5-4 CSM Flowchart
How to enter
Use the standard customer RC-transmitter and key in the code
1 2 3 6 5 4.
When CSM is entered, the values of brightness, contrast, etc.
are set to 50% (of max. value), and volume is set to 25%, to
ensure that you always have a picture and sound.
After switching 'on' the Customer Service Mode, the following
screen will appear:
3. SW Version PW (AAAABC-X.Y-xxxxx). See description
above.
4. SW Version EPLD (AAAABC-X.Y-xxxxx). See description
above.
5. Code 1. Gives the last five errors of the error buffer. The
last detected error is displayed at the most left position.
The errors are displayed as 2 digit numbers and separated
by a space. When less than 10 errors occurred, the rest of
the line(s) is empty. In case of no errors, the text "No
Errors" is displayed behind menu item "Code 1". See
paragraph 5.5 for a description.
6. Code 2. Gives the first five errors of the error buffer. The
last detected error is displayed at the most left position.
7. Volume. Gives the last volume status for the selected
source, as set by the customer.
8. Brightness. Gives the last brightness status for the
selected source, as set by the customer.
9. Contrast. Gives the last contrast status for the selected
source, as set by the customer.
10. Colour (not present in Basic configuration). Gives the last
colour status for the selected source, as set by the
customer.
11. Tint (only for NTSC Enhanced configuration). Gives the
last tint status for the selected source, as set by the
customer.
12. Sharpness. Gives the last sharpness status for the
selected source, as set by the customer.
13. Source. Gives the selected source, as set by the
customer.
14. AV Mute. Indicates if AV Mute is 'on' or 'off'.
How to navigate
Use one of the following methods:
•Switch to the other CSM page with the CURSOR LEFT/
RIGHT keys on the remote control.
•You can increase/decrease volume with the VOLUME UP/
DOWN keys on the remote control.
•You can switch to another source with the NUM/EXT keys
on the remote control.
How to exit
Use one of the following methods:
•Press the MENU key of the remote control transmitter.
•Switch the set to 'standby' with the Power switch on the
remote control.
•Switch the set 'off' with the Mains power switch.
5.3Problems and Solving Tips (Related to CSM)
5.3.1Picture Problems
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.eps
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Figure 5-5 CSM Menu
1. Type Nr. - AG Code. Gives the commercial type number
of the monitor, e.g. 32FD9944/01S. AG Code is not
implemented.
2. SW Version OTC (AAAABC-X.Y-xxxxx)
Note: You will find details of the latest software versions in
the chapter 'Software Survey' of the 'Product Survey Colour Television' publication, which is published four
times each year.
•A = the chassis name (FM23 for 32" displays or FM24
for 42" displays).
•B = the region (E= Europe, A= Asia Pacific, U= NAFTA,
L= LATAM or G = Global).
•C = the configuration name (B= Basic, E= Enhanced).
Note: Below described problems are all related to the monitor
settings. The procedures to change the value (or status) of the
different settings are described.
Picture too dark or too bright
Increase/decrease the BRIGHTNESS and/or the CONTRAST
value when the picture improves after you have switched on
the Customer Service Mode. The new value is automatically
stored.
White line around picture elements and text
Decrease the SHARPNESS value when the picture improves
after you have switched on the Customer Service Mode. The
new value is automatically stored.
Snowy picture and/or unstable picture
A scrambled or decoded signal is received.
Page 20
EN 20FM235.
Service Modes, Error Codes and Fault Finding
Black and white picture
Increase the COLOUR value when the picture improves after
you have switched on the Customer Service Mode. The new
value is automatically stored.
Menu text not sharp enough
Decrease the CONTRAST value when the picture improves
after you have switched on the Customer Service Mode. The
new value is automatically stored.
5.3.2 Sound Problems
No sound from left or right speaker
Check item 'Volume' in the CSM mode. If value is low, increase
the volume level. The new value is automatically stored.
No sound or sound too loud (after channel change/
switching on)
Increase/decrease the VOLUME level when the volume is OK
after you switched on the CSM. The new value is automatically
stored.
5.4ComPair
5.4.1 Introduction
ComPair (Computer Aided Repair) is a service tool for Philips
Consumer Electronics products. ComPair is a further
development on the European DST (Dealer Service Tool),
which allows faster and more accurate diagnostics. ComPair
has three big advantages:
•ComPair helps you to quickly get an understanding on how
to repair the chassis in a short time by guiding you
systematically through the repair procedures.
•ComPair allows very detailed diagnostics (on I
is therefore capable of accurately indicating problem areas.
You do not have to know anything about I
yourself because ComPair takes care of this.
•ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the
microprocessor is working) and all repair information is
directly available. When ComPair is installed together with
the SearchMan electronic manual of the defective chassis,
schematics and PWBs are only a mouse click away.
5.4.2Specifications
2
C level) and
2
C commands
By a combination of automatic diagnostics and an interactive
question / answer procedure, ComPair will enable you to find
most problems in a fast and effective way.
Beside fault finding, ComPair provides some additional
features like:
•Software upgrading (upload possible to OTC and PW
Scaler).
•Emulation of the (European) Dealer Service Tool (DST).
•If both ComPair and SearchMan (Electronic Service
Manual) are installed, all the schematics and the PWBs of
the set are available by clicking on the appropriate
hyperlink.
Example: Measure the DC-voltage on capacitor C2228
(Schematic/Panel) of the SCAVIO panel. Click on the
'Panel' hyperlink to automatically show the PWB with a
highlighted capacitor C2568. Click on the 'Schematic'
hyperlink to automatically show the position of the
highlighted capacitor.
5.4.3How to Connect
1. First, install the ComPair Browser software on your PC
(read the installation instructions carefully).
2. Connect an RS232 interface cable between a free serial
(COM) port on your PC and the RS232 connector on the
FM23 plasma monitor.
3. Switch the plasma monitor 'off' and 'on' again (with the
Mains switch).
4. Start the ComPair program and follow the instructions.
Note: once the set is in ComPair mode, the front LED will blink
red, at a frequency of 0.3 Hz.
Note: The RS232 cable is not included. It is a standard cable
(9p sub-D male-to-female) that can be obtained by a computer
store. It is supplied however with the ComPair interface (4822
727 21631), necessary for servicing other Philips TVs.
ComPair consists of a Windows based faultfinding program,
and an RS232 cable between PC and the (defective) product.
The ComPair faultfinding program is able to determine the
problem of the defective monitor. ComPair can gather
diagnostic information in two ways:
•Automatic (by communication with the monitor): ComPair
can automatically read out the contents of the entire error
buffer. Diagnosis is done on I2C level. ComPair can send
and receive commands to the micro controller of the
monitor, and so can access the I2C bus of the monitor. In
this way, it is possible for ComPair to communicate (read
and write) to devices on the I2C busses of the FTV monitor.
•Manually (by asking questions to you): Automatic
diagnosis is only possible if the micro controller of the
monitor is working correctly and only to a certain extend.
When this is not the case, ComPair will guide you through
the faultfinding tree by asking you questions (e.g. Does the
screen give a picture? Click on the correct answer: YES /
NO) and showing you examples (e.g. Measure test-point
F7 and click on the correct oscillogram you see on the
oscilloscope). You can answer by clicking on a link (e.g.
text or a waveform picture) that will bring you to the next
step in the faultfinding process.
5.5Error Buffer
The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is written at the left side and all other errors shift one
position to the right.
5.5.1How to Read the Error Buffer
Use one of the following methods:
•On screen via the SAM (only if you have a picture).
Examples:
– Errors: 6 0 0 0 0, error code 6 is the last and only
detected error.
– Errors: 9 6 0 0 0, error code 6 was first detected and
error code 9 is the last detected (newest) error.
•Via the blinking LED procedure (when you have no
picture). See paragraph 5.7.
•Via ComPair.
Page 21
Service Modes, Error Codes and Fault Finding
5.5.2How to Clear the Error Buffer
The error code buffer is cleared in the following cases:
•By activation of the 'Reset error buffer' command in the
SAM menu.
•When you transmit the code 0 6 2 5 9 9 with a standard
remote control transmitter.
20Download comm.Errors during downloading
21CSP comm.CSP time-out error
EN 21FM235.
gr.
30PDPDisplay HW error
40Temperature alarmDetection of over-temperature
70Vs overvoltageOvervoltage on Vs, Va, +3V3, +5V or a combination7341P3
71Vs undervoltageUndervoltage on Vs7308A/BP3
72Va undervoltageUndervoltage on Va7308C/DP3
73+5V undervoltageUndervoltage on +5V7330A/BP3
74+3V3 undervoltageUndervoltage on +3V37330C/DP3
75DC-PROTAudio amplifier protection7362P3
76TEMP-PSUOver-temperature in PSU7366AP3
77Protection with reason unknownNo valid protection can be read, but protection is active (PSU)
78Protection after several retriesPW Scaler will not start comm. with OTC after several retries.
9xOTCInternal OTC error. Replace.7383SC7
Notes:
•In case of non-intermittent faults, clear the error buffer
before you begin the repair. This to ensure that old error
codes are no longer present.
•If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another
error code and not the actual cause (e.g., a fault in the
protection detection circuitry can also lead to a protection).
5.6The Blinking LED Procedure
Via this procedure, you can make the contents of the error
buffer visible via the front LED (orange colour).This is
especially useful when there is no picture. When no errors are
present, the LED will stay green.
When the SDM is entered, or when code 0 6 2 5 0 0 is entered
with the remote control, the LED will blink the contents of the
error-buffer.
Error-codes ≥ 10 are shown as follows:
1. n long blinks of 750 ms, which is/are an indication of the
decimal digit,
2. a pause of 1.5 s,
3. n short blinks (n = 1-9),
4. when all the error-codes are displayed, the sequence
finishes with a LED blink of 3 s,
5. the sequence starts again.
Example of error buffer: 12 9 6 0 0
After entering SDM:
1. 1 long blink of 750 ms followed by a pause of 1.5 s,
2. 2 short blinks followed by a pause of 3 s,
3. 9 short blinks followed by a pause of 3 s,
4. 6 short blinks followed by a pause of 3 s,
5. 1 long blink of 3 s to finish the sequence,
6. the sequence starts again.
Page 22
EN 22FM235.
5.7Protections
You can read the error codes of the error buffer via the service
menu (SAM), the blinking LED procedure, or via ComPair. If a
fault situation is detected an error code will be generated and if
necessary, the set will be put in the protection mode. Blinking
of the red LED at a frequency of 5 Hz indicates the protection
mode.
In some error cases, the microprocessor does not put the set
in the protection mode. The error codes are indicated by an
orange front LED.
To get a quick diagnosis the chassis has three service modes
implemented:
•The Customer Service Mode (CSM): easy way to read out
the status of the set.
•The Service Default Mode (SDM): start-up of the set in a
predefined way.
•The Service Alignment Mode (SAM): adjustment of the set
via a menu and with the help of test patterns.
5.8Repair Tips
Below some failure symptoms are given, followed by a repair
tip.
•Error code indicates an under- or overvoltage
protection (errors 70 - 74). Possible causes:
– Short-circuit present on PSU.
– Short-circuit present in PSU load circuit.
– Converter not functioning (no start-up, or non short-
circuit failure).
•Set starts up, but switches 'off' soon.
1. Check the PSU outputs. If no output at all, verify the
Power Factor Corrector (= PFC or pre-conditioner) e.g.
the relays. When PFC is not switching, the LLC is
actively held off.
2. If PFC works, check VCEGO.
3. If VCEGO is high, check LLC (VS_UNSW).
4. If no VS, check pin 15.
5. If voltage is OK, check pins 12 and 14.
6. If no pulses, check controller pin 10.
7. If pin 10 < 1 V, the IC is probably defect.
•If fuse 1004 (diagram P5) is blown. Check items 7005
and 7006. If one of them is defect, replace both!
•If fuse 1400 (diagram P2) is blown. Check diode bridge
6600, diodes 6606 and 6607 and MOSFET 7610.
•Set does not react on Remote Control Transmitter. If
the monitor is set (by accident or deliberate) in ICONNmode (via SAM - Options), and there is no ICONN-Box
connected, the RC-signal line to the OTC is interrupted.
This can be solved by connecting pin 8 and 9 of the RS232
connector at the rear of the monitor.
Service Modes, Error Codes and Fault Finding
Page 23
Block Diagrams, Testpoint Overviews and Wiring Diagram
6.Block Diagrams, Testpoint Overviews and Wiring Diagram
Block Diagram Video
VIDEO
VGA
VGA
CONNECTOR
037103180318
VGA1-R
1
VGA1-G
2
VGA1-B
3
VGA1-TXD
4
VGA1 IN
15P"D"SHELL
CONNECTOR
5
6
6
1
11
7
2
12
7
8
3
13
9
8
4
14
10
5
15
VGA2
IN/OUT
15P"D"SHELL
CONNECTOR
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RC-OUT
SC6
RS-232
IN/OUT
5
10
4
9
3
8
2
7
1
6
BLOCK DIAGRAM
RS 232 INPUT
CONTROL
RC-VGA1
9
10
VGA1-RXD
11
DCC-SDA-1
12
VGA1-H
13
VGA1-V
14
DCC-SCL-1
ST24FC21
VGA2-R
VGA2-G
VGA2-B
VGA2-TXD
VGA2-RXD
DDC-SDA-2
VGA2-H
VGA2-V
DDC-SCL-2
RXD
TXD
5
DDC
7
NVM
7904
DDC
NVM
7907
ST24FC21
+5V-STBY-SW+5V-STBY-SW
7352
ST3232E
11
14
12
13
6366
PS-232-ACT
SC7
3913
7340 A+B
74HC4052D
1
TXD-OTC
3
5
TXD-PW
12
13
14
10
9
LOGIC
6
15
0372
1
2
3
4
5
6
7
8
9
N.C.
10
11
12
13
14
15
0376
1
2
3
RL_ICN
4
5
GL_ICN
6
LD_ICN
7
IR_TX
8
IR_RX
9
10
11
SEE
6
1
13
9
2
11
6
7900
EBOX-PRESENT
10
7937
7940
7910
VGA1-R
VGA1-G
VGA1-B
VGA1-TXD
VGA1-RXD
9
RC-VGA1
4
VGA1-H
10
VGA1-V
VGA2-R
VGA2-G
VGA2-B
VGA2-TXD
VGA2-RXD
8
VGA2-H
VGA2-V
3
12
5
VGA-OUTN
7915
SELECT-3
SELECT-2
SC8
SC7
TXD-2
RXD-2
RC
RC-CONTR
11
9
10,13
3
5
7310
SC8
2
4
6
12
13
15
8
10
29
17
19
21
27
28
23
25
31
30
32
7303 C+D
7303 A+B
1.4
7315, 7316
7325, 7326
SC6
F303
31
F304
29
F305
27
F308
21
F309
20
18
F306
25
F307
23
4
F311
16
F312
14
F313
12
6
5
F314
10
F315
8
2
3
1
12
VGA2-TXD
8
VGA2-RXD
SELECT-4
26VGA1-RXD
VGA1-TXD
SELECT-1
VGA1-RXD
TXD-OTC
RXD-OTC
TDX-PW
RXD-PW
73237322
RC-OUT
7320
RC-VGA1
7321
VGA
INPUT
SC8
SC8
SC7
SC10
VGA1-R
VGA1-G
VGA1-B
VGA1-TXD
VGA1-RXD
RC-VGA1
VGA1-H
VGA1-V
(EBOX-
PRESENT)
SC7
TV MODE
VGA2-TXD
VGA2-RXD
VGA2-H
VGA2-V
VGA2OUTN
SC6
RC-OUT
6379
6378
SC3
R/Pr/Cr
G/Y/Y
B/Pb/Cb
2fh 1fh 2fh
V
H
VGA2OUTN
SC6
SC10
SC10
VGA1-V
VGA1-H
VGA1-RXD
VIDEO SELECTION
& MATRIX
AV3 (HD)
V-HD-EXT
F072
H-HD-EXT
F075
AV1
7311-A
7311-B
7311-C
VGA1-H
VGA1-V
11
F071
F070
Y-HD
F073
251
SVHS
SC2
VGA1-V
VGA1-H
VGA2-V
VGA2-H
VGA2-V
VGA2-H
VGA2-EN
VGA2-OUT
7370 A+B
O.S.
O.S.
F074
AV2
34
SC11
SYNC
SELECTION
SC11
7060
7065
75
9
R
G
B
Pr
Y
Pb
1Fh
Cr
Y
Cb
CVBS
C
Y
SC3
VGA2-R
VGA2-G
VGA2-B
SC7
VGA2-EN NOT
VGA2-OUTN
SC6
SYNC-ACT
SC7
UART-ACT
SC7
7141
7138
7135
70792Fh
7074
7084
1fh BUFFER
7117
Cr
7113
Ys
7121Y-HD
Cb
F236
F235
VIDEO SELECTION
7007 A+C
74HCT4053T
14
4
6
11-9
7088
7090
RGB
MATRIX
LOGIC
SC5
MATRIX-SEL
8x
8x
H-DEC
V-DEC
clock
PW-SDA
3250
3250
PW-SCL
VGA1-R
VGA2-R
R-2Fh
R-YUV
VGA1-G
VGA2-G
G-2Fh
G-YUV
VGA1-B
VGA2-B
B-2Fh
B-YUV
VGA1-V
VGA2-V
VGA1-H
VGA2-H
SC4
4
15
14
Y-D E C
UV-DEC
F240
F247
1250
VIDCLK
24.576MHz
SC11
V-HD
12,14
H-HD
2
4
1
5
15
11
12
14
2
4
1
5
2
4
1,5
15
11
SC10
SC9
SC9
7146
74HC4052D
LOGIC
7158
74HC4052D
LOGIC
7009
74HC4052D
LOGIC
DVI-D INPUT
DVI-D INPUT SOCKET
7102
CLAMP
7103
CLAMP
7104
CLAMP
7280
SDA 9400
23
22
54
0375
INTERLACER
CLOCK
7145
7148
7151
7154
7157
7160
12
13
5
3
R-2Fh
G-2Fh
B-2Fh
7089
I054
74HCT4053D
R-NTSC
R-ATSC53
I058
I065
G-NTSC
G-ATSC21
I072
I078
B-NTSC
B-ATSC123
I083
VIDE-SELECTION
DECODER
DECODERDE-INTERLACER
7225
SAA7118C
VIDEO
DE-
ADC
CODER
SYNC
CNTRL
P4
ERR
9
10
14
16
17
18
23
24
SYNC
7129
F146
3
7130
F152
13
9
VIDEO-SEL-1
10
VIDEO-SEL-2
7131
F158
3
VIDEO-SEL-1
9
10
VIDEO-SEL-2
F211
3
V-AD C
F210
13
H-ADC
9
SYNC-SEL
VIDEO-SEL-2
7100-B
BLANKING
7100-C
BLANKING
7100-A
BLANKING
SC11
HD-CLAMPN
SC10
SC8
SCL
SDA65
6210
8x8xY-OUT
UV-OUT
61
V OUT-DEINT
60 H OUT-DEINT
62
V PEN
CLKOUT-DEINT
26
F249
PW-SDA
3284
21
3285
20
PW-SCL
10
1
2
6
7
9
DE-
ERR
11
SC8
SC8
EPROM
R-YUV
G-YUV
B-YUV
EN 23FM236.
DDC
SC11
HD-BLANKN
F246
F245
RX2-
RX2+
7215
ST24FC21
RX1-
RX1+
+5V-STBY-SW
RXD-
RXD+
RXC+
RXC-
SC10
SC10
VIDEO SELECTION - ADC
SC4
GBLKSPL
SC10
PW-SDA
PW-SCL
7170
AD9887KS
119R-ADC
110G-ADC
100B-ADC
81V-ADC
82H-ADC
93
GCOAST
94
62
RXO+
63
RXO-
59
RX1+
60
RX1-
56
RX2+
57
RX2-
65
RXC+
66
RXC-
53RTHERMDATACK
ERR
10
3209
92
91
3210
SCALER-PW164-MEMORY
ADC-TMDSPWEPLD
8x
8x
8x
DE
H-SYNC
V-SYNC
Y-H D
H-HD-EXT
2
1
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
8x
V-HD-EXT
75 OHM-ON
SC11
7007-B
74HCT4053D
10 6
SC9
MUXES
7000 - 7002
7006 - 7010
PROCESSING
7025 A-B
LM319D
COMPARATOR
10
5
15
VGA2-EN-NOT
SCALER - CLOCK
GENERATOR
24.576 MHz
SC7
SC7
V-SYNC
H-SYNC
+
-
+
-
SDA-1
SCL-1
+5B
ADC
ADC
ADC
SYNC. PROC
GENERATION
TMDS
RECEIVER
SC2
+
CLOCK
SYNC SELECTION
& SWITCHING
C-SYNC-OUT
SC11
SC11
H-PRESNT
8x
8x
8x
SC10
8x GRE (0-7)
8x GRO (0-7)
8x GGE (0-7)
8x GGO (0-7)
8x GBE (0-7)
8x GBO (0-7)
138
139
140
134
137
7
12
7040
LM 1881M
2
3051
7060
3571
3570
16
SYNC
SLICER
7570
FS6377
5
6
GENERATOR
1
CLOCK
ERR
SC5
SC11
V-SYNC-TTL
V-SYNC-POL-N
H-SYNC-TTL
H-SYNC-POL-N
V-SYNC-CMP
H-SYNC-CMP
C-SYNC-LM
1
V-SYNC-LM
3
VGA2-EN
5
ADVS
ADHS
ADSOG
GCLK
ADDE
F615
F616
15
13
12
10
SC11
SC4
SC7
SC7
SC9
SC7
SC6
SC2
SC8
SC3
F619
F633
F618
CLKOUT-DEINT
8x UV-OUT
VOUT-DEINT
HOUT-DEINT
PW-START
PW-PRESET
SDA-2
SCL-2
PW-SDA
PW-SCL
RXD-PW
TXD-PW
VGA2-OUT
VGA2-EN
VIDEO-SEL-1
VIDEO-SEL-2
SYNC-SEL
SC10
GBLKSPL
GCOAST
8x Y-OUT
VPEN
MCLK
3608
3606
3604
3605
7605
PW164
CONTROL FUNCTIONS
SC8
SDA1
SC7
SCL1
SC7
SDA1
SCL1
SC7
7574
74LVC125A
5
9
GRAPHICS PORT
SYNC
DECODER
AND
TIMER
YUV
TO
RGB
CLOCK
GEN
MICRO-
PROCESSOR
UART
3541
15
14
3540
PIXEL PROC.
VIDEO
PORT
7540
PCF8574A
3532
3531
32
6
8
1112
8x DRE (0-7)
8x DGE (0-7)
SCALER
SC9
DCK EXT
8x DBG (0-7)
PARITYPARITY-OUT
F637
F639
F634
F638
7630
M29W160DT
DATA
FLASH
ADD
ROM
CNTRL
7628
CY62126
DATA
ADD
SRAM
CNTRL
PW-NVM
SC9
7580
M24C32
SDA
EXP.
ERR
10
I/O
3
9
F566
F565
F563
F564
F569
F567
7530
PCF8591
ADC
ERR
4
5
6
7
9
10
11
12
7563
1
4
2
3
VIDCLK
(24.567 MHz)
VXCA
(18.432 MHz)
MCLK
(120 MHz)
DCKEXT
(36 MHz)
5
SCL
6
SELECT-1
SELECT-2
SELECT-3
SELECT-4
VIDEO-SEL-1
POWER-DOWN
VIDEO-SEL-2
3548
MSP-RESET
0315
1
2
0316
1
2
TEMP3-SENSOR
SC5
SC14
AUDIO
SC10
SC10
NVM
ERR
8
TEMPSENSOR S1
(OPTIONAL)
TEMPSENSOR S2
(OPTIONAL)
P3
SC6
SC6
SC12
SC6 SC3
SC14
SC11
SC3
BACK-END-EPLD
DVS
DHS
DEN
DCLK
FBX MODE
1-2 FH
SYNC
SC5
SC6
SC10
SC8
SC10
SC12
SC10 SC11
SC10 SC11
SC12
V-SYNC-TTL
V-SYNC-POL-N
H-SYNC-TTL
H-SYNC-POL
C-SYNC-LM
V-SYNC-LM
V-SYNC-COMP
H-SYNC-COMP
VGA1-V
VGA1-H
VGA2-V
VGA2-H
SYNC-SEL
VIDEO-SEL-1
VIDEO-SEL-2
PW-SDA
PW-SCL
SDA-1-3V3
3664
SCL-1-3V3
3662
SC12
7656-A+B+C
EP1K30FC256
A
BACK-END-LVDS OUTP
8x R-OUT (0-7)
8x G-OUT (0-7)
8x B-OUT (0-7)
V-SYNC-OUT
H-SYNC-OUT
BLANK-OUT
PARITY-OUT
DCLK
SC10
PWDWN--LVDS
8x R-OUT (0-7)
DIGITAL
CONTRAST
SYNC
DELAY
SYNC
PROC.
B
CONTROLS
E
R
R
1
2
C
& GROUND
7670
DS90CC385M
50-56
2-4
6-8
10-15
16,18-20
22-25
F619
28
F690
27
F692
30
25
31
32
PLASMA
DISPLAY
SUPPLY
LVDS
TTL PARALLEL
TO
LVD S
(LVDS
ENCODER)
SC12
POWER DOWN
SDA-1-3V3
SC12
SCL-1-3V3
SC7
PDP
PANEL
8x G-OUT (0-7)
8x B-OUT (0-7)
V-SYNC-OUT
H-SYNC-OUT
BLANK-OUT
PWRDWN-LVDS
75 OHM-ON
H-PRESENT
HD_BLANKN
HD_CLAMPN
C-SYNC-OUT
TV MODE
V-HD
H-HD
DATA
CNTRL
585
48
47
46
45
42
41
38
37
3837TX CLK OUT-M
TTL
LVD S
3680
3684
PDP-GO
CPU-GO
IRQ-PDP
ERR
30
CL 26532038_001.eps
SC2
SC2
SC3
SC2
SC6
7655
EPC2
PROM
PROG
SOCKET
PDP
INTERFACE
CONNECTOR
TX OUT0-M
TX OUT0-P
TX OUT1-M
TX OUT1-P
TX OUT2-M
TX OUT2-P
TX OUT3-M
TX OUT3-P
TX CLK OUT-P
PDP-GO
CPU-GO
IRQ-PDP
0318
19
17
15
13
11
9
3
1
7
5
4
14
18
8
10
6
150402
Page 24
Block Diagrams, Testpoint Overviews and Wiring Diagram
Block Diagram Audio
EN 24FM236.
AUDIO
AUDIO SOURCE
SC13
SELECT
L
AUDIO
VGA IN
R
L
AUDIO
FLEX
VGA
R
L
AUDIO
DVI-D
R
L
AV1
AUDIO
CVBS
R
L
AV2
AUDIO
YC
R
AV3
L
AUDIO
RGB
YPbPr
R
YCbPr
SC1-L
SC1-R
D-CTR-NIL
D-CTR-ONE
CONTROL
LED
LD
PANEL
7107
RC
RECEIVER
6127
1101
4
ON/OFF
5
SWITCH
6
7714
LM833D
F713
F714
F710
F711
7800 A+B
74HC4053D
2
12
2
6
7734
LM833D
2
A
6
B
7754
LM833D
2
6
10,11
L4
1
R4
7
L5
1
R5
7
L6
1
R6
7
L2
R2
L3
R3
L1
R1
15
14
+8V6
5798
7798
TEA6422D
3
L1
L2
L3
L4
L5
L6
R1
R2
R3
R4
R5
R6
4
5
6
9
10
11
25
24
23
20
19
18
ERR
1
MATRIX
SWITCH
28SDA-AUDIO
27
12 PRE-OUT1-L
13
A
B
ANTI PLOP
7805
7807
7806
SC14
SC8
0320
1
2
3
4
5
6
7
8
9
10
7808
CONTROL
FUNCTIONS 2
LD_ICN
GL_ICN
RL_ICN
ICON_NOT
IR_TX
IR_RX
ICON_NOT
+8V6
+5V-STBY-SW
+9V-STBY-SW
+9V-STBY
SC7
12
13
SC7
7555
74HC4053D
2
1
12
13
5
3
7550
74HC4053D
2
1
7718
+9V-STBY
POWER-OK
SC8
RS232 INPUT
SC6
0376
1
2
RS-232
3
IN/OUT
4
5
10
4
5
9
3
8
6
2
7
1
6
7
8
9
10
11
6103
2
1
GREEN
4
RED
7120
2
7103
3
7105
LIGHT-SENSOR-IN
7
1
2
3
7801
7802
BLOCK DIAGRAM
RXD
TXD
RL_ICN
GL_ICN
LD_ICN
IR_TX
IR_RX
GREEN-LED
RC-IN
+8V6
+5V-STBY-SW
+9V-STBY-SW
+9V-STBY
7803
SEE
VIDEO
N.C.
RED-LED
AUDIO-ENABLE
0320
1
2
3
4
5
6
7
8
9
10
SC14
3795
SCL-AUDIO
3794
PRE-OUT1-R
SC15
AUDIO
DELAY LINE
15
14
4
15
14
AUDIO-PROCESSOR
3
2
I2SDATA-IN1
17
21
I2SDATA-IN2
40
41
B
7879
TC74HC590AF
GREEN_LED
RED_LED
RC
RC
SC6
SEE
BLOCK DIAGRAM
VIDEO
7812
MSP3415G
DEMO-
DULATOR
PRE-
SCALE
F872
SC7
DAC
DAC
7874
TC74HC590AF
SC6
SC6
7517
ADM 810
RESET
ERR
2
I2S-DATA-OUT
I2S-CLOCK
DACM-L
DAC
DACM-R
DSP
DIGITAL
SOUND
PROC.
DAC
7870
TC74HC590AF
7x
CONTROL FUNCTIONS 1
RESET
2
SC13
SERVICE PINS
+5V
OTC-H
7432
7433
RESET
SC7
SC10
SC8
SC8
SC10
SC8
SC12
SC6 RC-CNTL
SC10
SC10
SC8 FAN-SP2
SC8 FAN-SP1
SC6 UART-ACT
SC6
0382
SDM
1
3
5
7
9
VGA1-H
VGA1-V
SDA-AUDIO
SCL-AUDIO
3813
13
12
3812
16
14
I660
27
26
I659
8
9
3130L
R
5 18.432 MHz VXCA
6
4810
4811
A
B
AUDIO DELAY PROC.
A
7880
CY7C199B
7x
RAMCOUNTERCOUNTER"D" F.F."D" F.F.
1415
6MHz
PW_FLASH_RESET
ICONN_NOT
STANDBY
PW-START
POWER-OK
CPU-GO
PDP-GO
IRQ-PDP
PW-RESET
PW-START
SYNC-ACT
GND-LED
RED-LED
RC
LIGHT-SEN-IN
3419
2
3422
4SAM
3421
6CMP
8
10
SERVICE-IN
3380-C
SCL-1
SDA-1
16
17
83
84OTC-V
74
109
120
119
95
96
116
115
93
110
108
95
104
103
99
98
114
113
100
105
106
SC7
7x8x
7383
SAA5801H
7841
LM833D
3
6
7851
LM833D
3
6
7861
TS462CD
2
6
SC9
7881
74HCT573
8x
FRAME
OTC
ERR
91
ERR
92
ERR
93
ERR
94
ERR
95
ERR
96
ERR
97
SDA-1
SCL-1
1
7
1
7
1
7
82
86
85
88
87
89
90
91
92
43
42
40
41
F813
SC13
F816
8x
SC7
AUDIO-ENABLE
F817
7882
74HCT573
3404-C
3404-D
3404-A
3404-B
3402-D
3402-C
3402-B
3402-A
SC7
3464-D
3464-C
3464-A
3464-B
SC6
F812
L-POS
L-NEG
D-CTR-ONE
D-CTR-NIL
SC1-L
SC1-R
17
15
F383
F427
F428
F425
F426
SDA-NVM-1
SCL-NVM-1
RESET
ROM-CS
RAM-CS
ROM-OE
RAM-OE
DATA
ADDRESS
CONTROL
DATA
ADDRESS
CONTROL
RS_232_ACT
R-POS
R-NEG
SDA-1
SCL-1
SDA-2
SCL-2
RXD-OTC
TXD-OTC
0388
7
6
5
4
3
2
1
4884
24 ms MONITOR
4894
40 ms TV
SEE
IIC DIAGRAM
SC10
SC6
7430
MC24C32
5
6
NVM
ERR
7
7510 - 74 LVCOOAD
1
2
9
10
7506
AM29DL164DT
FLASH
7500
MSM51V18165F
DRAM
7
DUAL
BANK
ROM
A2
0388
7435
FILTERS
88
7
6
5
4
3
2
1
+9V-STBY A
I2S-DATA-IN1
I2S-DATA-IN2
26
28
12
L-POS
L-NEG
AUDIO-ENABLE
R-POS
L-NEG
CS
6
OE
11
CS
OE
7515,7516
FLASH
RESET
7225
LM833DT
3
2
5
6
3207
3222
7211
BC857BM
7260-A
LM833DT
3
1
2
3259
F231
3220
1
7238-A
LM833DT
F241
3240
7
F211
TO
0302
P6
POWER
SUPPLY
3
1
2
3234
7260-B
LM833DT
5
7
6
3274
7238-B
LM833DT
5
7
6
3244
SUPPLY & DC PROTECTION
A7
0302
9
8
7
6
5
4
3
2
1
L-HIGH
L-LOW
AU-EN-NOT
R-HIGH
L-HIGH
DC-PROT
+9V-STBY
F258
F235
F273
F245
1730
2.5A
7735,7736
STAB
1740
2.5A
7745,7746
STAB
A3
A4
A5
A6
7302
7402
7502
7602
AUDIO
AMPLL-HIGH
AUDIO
AMPLL-LOW
AUDIO
AMPLR-HIGH
AUDIO
AMPLR-LOW
F730
F735
F740
F745
7315
LM311D
2
3
7415
LM311D
2
3
7515
LM311D
2
3
7615
LM311D
2
3
A3
A4
A5
A6
8
1,4
8
1,4
8
1,4
8
1,4
OUT_PROT
VSDN-POS
VCC-10-POS
VSDN-NEG
VCC-10 -NEG
7
7
7
7
3315
3328
F328
3318
3415
3428
F428
3418
3515
3528
F528
3518
3615
3628
F628
3618
OUT_LH
OUT_LL
OUT_RH
OUT_RL
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC-10-POS
VCC-10-NEG
VCC_10_POS
3749
VCC_10_NEG
F330
F430
F530
F630
3755
3765
2760
3330
7330
2330
2355
7355
3355
3430
7430
2430
2455
7455
3455
3530
7530
2530
2555
7555
3555
3630
7630
2630
2655
7655
3655
37703771 3780
+9V-STBY
+9V-STBY A
6750
2759
6760
7755
3337
3362
3437
3462
3537
3552
3637
3662
7751
7365-2
IRF7343
G
F365
G
7365-1
IRF7343
7465-2
IRF7343
G
F465
G
7465-1
IRF7343
7565-2
IRF7343
G
F565
G
7565-1
IRF7343
7665-2
IRF7345
G
F665
G
7665-1
IRF7345
5753
3751
7761
DC-PROT
5335
D
S
D
S
7340
D
S
D
S
7440
D
S
D
S
7540
D
S
D
S
7640
3781
CL 26532038_002.eps
VSDN-POS
5365
2355
5366
VSDN-NEG
OUT_PROT
A7
5435
VSDN-POS
5465
2465
5460
VSDN-NEG
OUT_PROT
A7
5535
VSDN-POS
5565
2565
5560
VSDN-NEG
OUT_PROT
A7
5335
VSDN-POS
5665
2665
5660
VSDN-NEG
OUT_PROT
A7
DC-PROTECT
7753
BC857BW
3752
150402
OUT_LH
OUT_LL
OUT_RH
OUT_RL
0303
0304
5
L-HIGH
4
3
2
1
L-LOW
R-HIGH
4
3
2
1
R-LOW
Page 25
Block Diagrams, Testpoint Overviews and Wiring Diagram
Block Diagram Power Supply
EN 25FM236.
PRECONDITIONER
P5
MAINS FILTER UNIT
FILTERS-STBY
P2
400V-HOT
LATCH
VRSVRS
6224
STPS20L40CF
2
6225
2
F116
6232
3228
7227
TL431CZ
DC_PROT
- DC_PROT -
+9V_STBY_SW
3358
6364
3364
FAN CONTROL
P4
FAN_SP1
FAN_SP2
+3V3_OVP
FROM
V.S._UNSW
70-90V
POK
VSA-CONTROL
2224
2230
3360
I919
3362
7362
+12V
+12V
+18V
P3
FAN SUPPLY
FAN CONTROL
7230
L4940
3224
3225
POK
DC_PROT1
6362
2701
I704
2707
- +3V3 SUPPLY -
1260
IA5
3261
3260
VS- SWITCHED -
I200
F140
5224
5225
+12V
P4
FAW
P3
+8V6
F144
I700
S
7700
G
7701
7,8
10
6260
FUNCTIE
PSMN035
5V
P3
+9V_STBY_SW
3360
3363
+2.5V
6378
6703
D
S
G
7260
L4973V
CONTROL
D
7050
G
SWITCH ON
LOGIC
SWITCH
LOGIC
SEQUENCE
DISCHARGE
PROTECTIONS
ref
POK
5703
I705
7706
6709
7707
5268
2,3
6267
S
VS
G
I202
7366-C
10
9
+8V6 UNDER
VOLTAGE PROT.
DETECTION
CIRCUIT
7326, 7327
F261
+3V3
+3V3
F120
2021
D
7052
IRFR18N15D
S
VCCVCC
8
D
I709
I261
VB
- VCEGO -- LATCH -
+5V_STBY_SW
3349
3353
+5V_STBY_SW
VCEGO
3350
7352
3354
3341
VCC
6142
BYD33D
VA
I201
+8V6
I370
I371
I909
I910
I911
I912
I913
VCC_GO
7341
3342
0389
0390
12
11
10
7351
3
2
1
3
2
1
0305
TO
0305
9
SC8
CONTROL
1
FUNCTIONS
VCC_PROT 6
+3V3_PROT 7
OVERVOLTAGE
DC_PROT1 11
TEMP_PROT 12
POWER_OK
3344
VS_PROT 4
VA_PROT 5
SWITCH
LATCH
7348
F243
3343
FAN1
(OPTIONAL)
FAN2
(OPTIONAL)
7370
PCF8574AT
9
10
+5V_STBY_SW
6347
3347
6348
T/O
EXP.
ERR
6
- ERROR LOGGING -
3370
14
3371
15
t
3372
STANDBY
- STANDBY -
OVERVOLTAGE
3390
3345
3346
6390
7391
FAN_SP1
FAN_SP2
+5V_STBY_SW
3394
7393
+9V_STBY_SW
+5V_STBY_SW
+3V3_STBY_SW
IAKS
- IAK BUFFER -
7366-B
5
6
3386
SUPPLY_ON
VA
VCC
VS
VCC
VS
VA
VCC
VS
VCC
VS
VAVA
VCC
3241
3240
STBY
P2
+3V3_STBY_SW
1401
T2A
+9V_STBY
+8V6
SCL_1
SDA_1
POWER_OK
TEMP-3
STANDBY
FAN_SP1
FAN_SP2
VA VS
3396
3397
3316
3387
7
VCEGO
VSAGO
CL 26532038_003.eps
0323
NC
NC
10
0333
NC
0342
NC
NC
NC
0352
NC
NC
NC
0392
VS
VA
0306
0319
10
11
12
13
3302
3303
3305
0307
VSK
VAK
IAK
VRS
VRA
11
NC
13
15
20
NC
150402
1
2
3
4
TO
5
CN23
6
PDP
7
8
9
1
2
3
4
TO
5
CN33
6
PDP
7
8
9
1
2
3
TO
4
CN42
5
PDP
6
7
1
2
3
TO
4
CN52
5
PDP
6
7
1
VS-VA
2
ADJ.
1
3
TO
4
CN6
PDP
6
1
F300
2
F301
3
F302
4
F304
5
F305
6
TO
CONTROL
7
SC8
0319
FUNCTIONS 2
8
9
F309
F310
1
I900
2
3
I901
5
I902
7
I903
TO
9
CN7
I904
PDP
I905
I906
LLC-SUPPLY
A
COLD
COLD
HOT
HOT
HOT
P6
5003
400V-HOT
- BIAS-SUPPLY -
3092
25V-HOT
7090 :
7092
PROT
6095
SW25V-HOT
7017
7018
15
SOFT
START
+
CURRENT
PROTECTION
AUX-SUPPLY
P7
1100
TA5
F015
7110
7111
CONTROL
7112
TEA1507
1
I105
VCC
3
CTRL
CONTROL
PROTECTIONS
P3
- TEMP PROTECTION -
+5V_STBY_SW
+5V_STBY_SW
3304
7304
1
TL43IC2
3
2.5V
2
- LLC-CONVERTER -VS-SUPPLY
1004
2A
7093
LM317T
B
7001
MC34067P
3
6
8
7
CONTROL
F001
BIAS
3095
2002
3096
15
VCC
14
OA
12
OB
10
FI
3011
7007
5001
7020
10
11
F003
4
2
7008,
7021, 7022
F004
14
13
HIGH
SIDE
DRIVE
LOW
SIDE
DRIVE
3050
STU16NB501
G
I038
F005
STU16NB501
G
I057
7005
D
S
7006
D
S
- VA-SUPPLY -
5120
G
S
7117
PSMN035
1
61133113
21146111
TCET1102
I920
I107
3118
6120
3116
7120
TEMP_PROT
- VS PROTECTION -
VS_UNSW
3365
70-90V
3300
6365
2.5V
ref
7
6
5
4
7308 A+B
1425
+5V_STBY_SW
CONTROL
CIRCUIT
VS_PROT
3309
6312
1
I914
6313
2
6314
VSAGO
VCC &
DRAIN
3324
I101
8
DRAIN
DRIVER
SENCE
DEMAG
3368
+t
3369
2.5V
CIRCUIT -
ref
D
6
5
2
4
7366 A
3
2
ref
PRECONDITIONER
6600
3
GBU8
F601
1
416
+
-
2605
2
6606
6605
3653
7650
MC33368
LINE
7
ZC
CONTROL
3650
5
MULT
I618
VFB
3651
3
6512
BYG10
6511
BYG10
CONTROL
ENABLE
2
1
3506
I510
DRAIN
SOURCE
3508
MAINS
FILTER
6513
BYG10
A
6510
BYG10
3507
7500
TNY256
I508
4
6503
RS1G
16
+t
5
7-8
3668
GATE
+25V-HOT
I622
VCC
VFB
2666
0308
F500
TCET1102
12
11
3
I629
2
1
2503
7501
F610
236
4
1
3
I504
5600
1246
3641
2640
3666
F404
1400
T6.3A
F407
5500
1
4
2
2505
3663
7660
L7815
3640
7
8
9
3501
7502
TL431
14
7608
2663
6661
6660 2664
BIAS
F609
6665
2662
I625
D
7640
G
BSN304
S
5401
5402
MAINS
FILTER
7460
ACTIVATING
- STANDBY SUPPLY -
6504
F502
RS1G
6505
F503
SB340
3505
1
3
3503
2
3610
3608
7641
ST434NB50
12
1450
43
7540
L7805
INOUT
I607
I406
3611
I407F411
7610
D
G
S
I609
3613
F604
AC3 100-230VAC2
AC5 100-230VAC1
3450
0
+t
+t
12
1460
43
7465
7470
ACTIVATING
DELAY
I517
D
S
G
D
S
G
I516
6611
I608
3451
0
7531
STD16NEO6L
7530
STD16NEO6L
F600
400V-HOT
400V-HOT
2616
SW25V-HOT
3670
3671
3452
0
-t
+9V_STBY_SW
P3
F412
SUPPLY_ON
+9V_STBY
+5V_STBY_SW
+3V3_STBY_SW
6520
+9V_STBY_SW
P3
+25V-HOT
HOT COLD
F293
2292
2294
VSCONTROL
F015
77-100V 9043
+9V_STBY
F294
DC_PROT
VSND_POS
GND_SND
VSND_NEG
PCET1102
B
TCET1102
7003
I083
7002
+5V_STBY_SW
4
3
3
6
4
3
- AUDIO SUPPLY -
6291
D458L20U
5290
1084
4
2
T2A
3
6044
STTH2003L
2
2020
2022
CONTROL
CIRCUIT
1
VB
VS-UNSWITCHED
F016
VS_UNSW 70-90V
7042
+18V
VS
ADJ.
3026
1
2
5002
13
12
14
1
16
3
15
6021
1005
BYU28
11
T5A
10
9
2
6045
1045
BYU28
T5A
7010,7011
1
HOT COLD
VS_UNSW
70-90V
VCC_GD
G
I220
7200
BSN20
1200
T2A
I214
7200
7212
BSN304
I213
D
S
TEA1507
D
G
1
DRAIN
VCC
S
DRIVE
3
CTRL
3202
I208
4
DEMAG
VCC_PROT
SENCE
3214
3146
7140 A+B
7142
IA CURRENT
MEASUREMENT
+8V
I152
VA
2121
IAKS
VRA
VA
ADJ.
3127
VSA_CONTROL
VA_PROT
- VA PROTECTION -- VCC PROTECTION -- +3V3 PROTECTION -
VCC
6321
6322
6324
3320
I915I916
7330 A+B
7
6
2.5V
ref
5
4
1
2
6333
6334
6335
+5V_STBY_SW
3388
7375,7376
VSA-
CONTROL
LOGIC
VA
3311
7308 C+D
11
13
10
3313
2.5V
ref
9
14
8
3317
VSA CONTROL
2x
0302
9
TO
8
0302
7
6
A7
5
SUPPLY
4
DC. PROT.
3
(AUDIO
2
PANEL)
1
DC_PROT
- VCC SUPPLY -
5220
1
3
I236
2
4
7217
8
I216
PSMN070
D
G
6
S
5
3218
GND
6211
2210
7
9
3
+3V3
3332
7330 C+D
11
10
2.5V
ref
9
8
7389
+3V3_OVP
3389
P7
3
14
12
1
3
13
11
1
6230
18
16
124
7220
TCET1102
POK
+3V3_PROT
333833303338
6340
13
I917
6341
14
6342
Page 26
Block Diagrams, Testpoint Overviews and Wiring Diagram
Power Lines Overview
EN 26FM236.
PRECONDITIONER
P5
MAINS FILTER UNIT
FILTERS-STBY
P2
6513
BYG10
BYG10
SC8
0319
1
2
3
4
5
6
7
8
9
10
11
12
13
0305
1
8
9
10
11
12
6600
GBU8
1
MAINS
FILTER
400V-HOT
6510
BYG10
6511
BYG10
6512
3506
+t
CONTROL FUNCTIONS 2
+9V-STBY
+9V-STBY-SW
+8V6
+5V-STBY-SW
+3V3-STBY-SW
POWER O.K.
STAND-BY
VCC
+3V3
3
44,166,14
+
-
2605
2
0308
0308
2
2
1
1
A
STANDBY
SUPPLY
2503
6503
3508
RS1G
1105
500mA
SC7
SC13
OTC
SC7
1100
T1A
1400
T6.3A
+3V3-STBY-SW
5401
5402
5500
4
+9V-STBY
+9V-STBY-SW
+5V-STBY-SW
+5V-POW
PRECONDITIONER
MAINS
FILTER
+8V6
+5V
+3V3
6
7
8
9
+25V-HOT
7460
ACTIVATING
6504
RS1G
6505
SB340
+5V-STBY-SW
+8V6
+5V-STBY-SW
+5V
+5V_STBY_SW
3663
12
1450
43
7540
L7805
INOUT
0320
10
9
8
7
6
2663
AC3 100-200VAC2
AC5 100-200VAC1
3450
0
+t
7465
7470
D
D
LD
0320
10
9
8
7
6
VGASC6
03180318
321
35305530
5541
6611
2616
6661
6660 2664
3451
0
+t
12
3452
0
-t
1460
43
S
7531
STD16NEO6L
G
S
7530
STD16NEO6L
G
LED / SWITCH PANEL
1101
+9V-STBY
+9V-STBY-SW
+5V-STBY-SW
5008
+8V6
VGA CONNECTOR
+5V-STB-SW
6916
5901
+5V REF
+5V_EXP
+25V-HOT
ON/OFF
SWITCH
1
2
3
+5V
6605 6606
+9V_STBY_SW
P3
SUPPLY-ON
+9V_STBY
+5V_STBY_SW
+3V3_STBY_SW
6520
+9V_STBY_SW
4
5
6
400V-HOT
A
SW25V-HOT
HOT
COLD
COLD
SC2
SC3
HOT
+9V_STBY
+5V_STBY_SW
+3V3_STBY_SW
HOT
SYNC SELECTION
+3V3-STBY-SW
+5V
5007
5060
5009
VIDEO SELECTION
&MATRIX
+5V
+8V6
5140
5164
3164
7165
5170
5167
P6
400V-HOT
SW25-HOT
25V-HOT
P3
POK
STANDBY
+5V
+5A
+5B
6-7009
+5M
+5V
+8SW
+8V6
+8AA
+8A
VREF1
VREF2
6166
LLC-SUPPLY
PROTECTION
+9V_STBY_SW
+5V_STBY_SW
+3V3_STBY_SW
POK
P7
6378
CIRCUIT
5003
BIAS
SUPPLY
+9V_STBY
+8V6+8V6
SCL_1
SDA_1
10
+
-
9
7386-C
FAN_SP1
FAN_SP2
1004
T2A
BIAS
POWER_OK
8
STANDBY
SUPPLY_ON
SC4
+5V-STBY-SW
+5V-POW
+3V3
SC5
+8V6
+5V
+3V3
HOT COLD
LCC
2002
SUPPLY
HOT
0319
1
2
3
4
5
6
7
8
9
10
11
12
13
P2
VIDEO SELECTION - ADC
7175
5197
LD1117
1170
500mA
5196
5198
5199
VIDEO
5220
5222
5224
1270
500mA
5221
5223
5228
TO
SC8
COLD
12
14
16
11
10
9
+5V_STBY_SW
+3V3PLL
+3V3
+3V3-AD
+3V3MAIN1
+3V3OUTPUT
+3V3MAIN2
3V3AA
3V3DB
3V3DD
+8V6
+5V
+3V3VID
3V3DA
3V3DC
3V3DE
VS-UNSWITCHED
6044
1005
6021
T5A
1045
6045
T5A
VS_UNSW 70-90V
+5V_STBY_SW
+5V_STBY
+3V3_OVP
VS_UNSW 70-90V
2020
2022
+5V_STBY_SW
VA
VCC
+3V3
VS
8V6
VGA INPUT
SC6
+5V
+8V6
+5V-STBY-SW
+5V
CONTROL FUNCTIONS 1 OTC
SC7
+5V
+8V6
+3V3-STBY-SW
VCC
+3V3
SUPPLY & DC PROTECTION
A7
+9V_STBY
VSND_POS
GND_SND
VSND_NEG
VA
VCC
VS
VCC
VS
VA
VCC
VA
VCC
1401
T2A
NC
NC
NC
NC
NC
NC
NC
NC
NC
+3V3-PLD
+2V5
+2V5PLDA
+2V5PLDB
+2V5PLDC
+3V3PLDA
+3V3PLDB
+3V3PLDC
+3V3PLDD
+3V3PLDE
0302
0323
10
0333
0342
0352
0306
0305
12
11
10
9
8
7
6
5
4
3
2
1
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
3
4
6
9
1
AUDIO SUPPLY
6291
D4S8L20U
5290
1084
4
T2A
3
AUX-SUPPLY
P7
+VB
9043
+18V
77-100V
3146
1110
VA
SUPPLY
T5A
2043
VS_UNSW
1200
VA
VS
8V6
70-90V
+3V3_OVP
+5V_STBY_SW
+18V
+18V
VCC
T2A
SUPPLY
1260
IA5
SC9
+3V3
+3V3-STBY-SW
+5V
+5V-STBY-SW
6302
6353
5300
5302
5350
5352
+5V
+8B
+5V-STBY-SW
+5S
+5R
SC10
+5V
+8V6
+3V3-STBY-SW
5520
5521
5522
5523
5524
+3V3-CNTL-A
+3V3-CNTL-B
+3V3-CNTL-C
+3V3-CNTL-D
+3V3-CNTL-E
1
14
12
13
11
6230
18
16
- +3V3 SUPPLY -
7260
CONTROL
10
SCALER, CLOCK-GENERATOR
1575
500mA
SCALER-PW164 + MEMORY
+3V3
5572
6267
+3V3
+3V3-PW
+3V3-STBY-SW
+5V-OE
+5V-STBY-SW
5630
P3
2121
6224
STPS20L40CF
3
1
6225
3
1
6232
5268
+3V3-PW
+3V3W
+3V3
+2V5
VS_UNSW 70-90V
+VB
P3
VSA_CONTROL
2
2224
2
2225
7230
L4940
+3V32,37,8
2269
5224
5225
POK
1
4
7050
SWITCH ON
2228
+12V
2230
2231
SC11
3
VS SUPPLY
D
S
G
LOGIC
VS
2292
2294
7052
SEQUENCE
DISCHARGE
VA
VCC
+8V6
+3V3
BACK-END-EPLD
+3V3
+8V6
2
2
1
+8V6
VS
2021
SWITCH
LOGIC
3640
7641
5293
5291
5292
6142
P2
P4
1670
500mA
D
DC_PROT
VS
VA
VCC
G
L431
T
+3V3
5642
5643
5644
5645
5646
5647
5648
5649
P3
STBY
+3V3_STBY_SW
VCC
FAN CONTROL
+12V
VCC
S
7640
TO
CN23
PDP
TO
CN33
PDP
TO
CN42
PDP
TO
CN52
PDP
TO
CN6
PDP
TO
SC8
0302
9
8
7
6
5
4
3
2
1
FILTERS
A2
+9V-STBY
VCC-10-POS
VCC-10-NEG
AUDIO AMPLI LEFT HIGH
A3
VCC-10-POS
VCC-10NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI LEFT LOW
A4
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI RIGHT HIGH
A5
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
AUDIO AMPLI LEFT LOW
A6
VCC-10-POS
VCC-10-NEG
VSDN-POS
VSDN-NEG
BACK-END-LVDS
SC12
AUDIO SOURCE SELECT
SC13
+8V6
+9V-STBY
AUDIO-PROCESSOR
SC14
+5V
+8V6
AUDIO-DELAY-LINE
SC15
+5
DC-PROT
5796
3796
5810
3810
5870
5335
5725
5335
5360
5435
5460
5535
5560
5635
5660
1730
2A5
7735,7736
STAB
1740
2A5
7745,7746
STAB
3315
3318
3330
????
3415
3418
3430
3455
3515
3518
3530
3555
3615
3618
3630
3655
+3V3-PW
+3V3-STBY-SW
+8V6
+8V6A
+4V3A
+9V-STBY
+5V
+8V6
+8V6B
+4V3B
+5D
CL 26532038_004.eps
+9V-STBY
VSDN-POS
VCC-10-POS
VSDN-NEG
VCC-10-NEG
8-7315
1-7315
C-7330
C-7335
8-7415
1-7415
C-7430
C-7455
8-7515
1-7515
C-7530
C-7555
8-7615
1-7615
C-7630
C-7655
040402
Page 27
Block Diagrams, Testpoint Overviews and Wiring Diagram
I2C-IC Overview
IIC
CONTROL
SC7
FUNCTIONS 1
86
MASTER
HW IIC
85
7383
SAA5801H
OTC
MAIN-
PROCESSOR
(MASTER)
ERR
91
ERR
92
ERR
93
ERR
94
ERR
95
ERR
96
ERR
97
88
SLAVE
HW IIC
87
91
MASTER
HW IIC
92
74
RESET
108
109
3404-C
3404-D
3404-A
3404-B
3398-C
3402-B
3402-A
3384
3007
ADDRESS
ADDRESS
DATA
34143415
34103413
IIC BUS 4
SDA_NVM_1
SCL_NVM_1
4431
7
PW_RESET
PW_FLASH_RESET
MSM51V18165F
DATA
+5V_STBY_SW
SDA-1
SCL-1
+3V3_CNTR_D
SDA-2
SCL-2
PW_START
+3V3_CNTL_D
3432
34333431
5
7430
M24C32
(NVM)
EEPROM
7500
RAM
7506
FLASH
10
SERVICE
COMPAIR
CONNECTION
3430
6
ERR
7
0382
9
IIC BUS 1
(slow 100KHz)
IIC BUS 2
(slow 100KHz)
SC8
3541
SC10
3608
3606
CONTROL
FUNCTIONS 2
3540
14
15
SLAVE
HW IIC
7540
PCF8574AT
I/O EXP.
ERR
3
PW164
A4
MASTER
SW
D6
IIC
E2
EXT INT
SC9
7571
3532
9
SLAVE
HW IIC
7530
PCF8591
ADC
ERR
MASTER
7605
PW164
CO-
PROCESSOR
FOR
SCALER
AND
OSD
CLOCK
GENERATOR
1
15
3531
10
4
B1
SW
C2
IIC
A1
C4
E3
3
4
3602
3603
GENERATOR
3604
3605
PW_RESET
DATA
ADDRESS
ADDRESS
+5V
1
SLAVE
HW IIC
7570
FS6377
CLOCK
ERR
5
IIC BUS 5
35703571
16
36013600
SC9
DATA
SC14
SCL_SW
SDA_SW
NVM
PW_SDA_NVM
PW_SCL_NVM
4581
CY62126
M29W160DT
AUDIO
PROC.
13
SLAVE
HW IIC
7812
MSP3415G
AUDIO
PROC.
ERR
+3V3_PW
7628
RAM
7630
FLASH
EN 27FM236.
SOURCE
SC13
SELECT
48104811
SCL_AUDIO
SDA_AUDIO
38123813
12
2
IIC BUS 3
(slow 100KHz)
28
SLAVE
HW IIC
7798
TEA6422Q
MATRIX
SWITCH
ERR
1
37943795
27
PW_SDA
PW_SCL
+3V3_PW
3583
3580
35823581
5
ERR
6
8
7580
M24C32
(NVM)
7
EEPROM
6630
3633
SC8
SC4
0375
CONTROL
FUNCTIONS2
VIDEO-SEL.
ADC
92
SLAVE
HW IIC
7170
AD9887KS
ADC +
TMDS REC.
ERR
DVI-D INPUT SOCKET
SCL
6
SDA
7
10
0319
6
7
32103209
91
7215
ST24FC21
DDC
EPROM
PROTECTION
P3
0319
6
7
PCF8574A
74
SLAVE
HW IIC
7370
I/O EXP.
ERR
6
SC5
VCA
VGA1 IN
15P"D"SHELL
CONNECTOR
11
12
13
14
15
VGA2 IN/OUT
15P"D"SHELL
CONNECTOR
11
12
13
14
15
33703371
73
VIDEO-SEL.
DECODER
3250
P10
SLAVE
HW IIC
7225
SAA7118E
VIDEO
DECODER
ERR
VGA
CONNECTOR
0371
6
1
7
12
2
8
3
13
9
4
10
14
5
15
0372
6
1
7
12
2
8
3
13
9
4
10
14
5
15
9
SC12
3251
N9
INTERLACER
DCC-SDA-1
DCC-SCL-1
DCC-SDA-2
DCC-SCL-2
BACK-END
LVDS OUTPUT
SDA-1
SCL-1
7676
BSN20
DS
G
+3V3_STBY_SW
3285
3284
20
21
SLAVE
HW IIC
7280
SDA9400
DE-
ERR
11
7904
ST24FC21
5
DDC
7
NVM
7907
ST24FC21
5
DDC
7
NVM
36853681
7675
BSN20
DS
G
36863682
+3V3_STBY_SW
SDA-1_3V3
SCL-1_3V3
SC11
EP1K30FC256
BACK-END
EPLD
3664
C5
SLAVE
IIC
7656
EPLD
ERR
12
SLAVE
IIC
C6C8
3662
C4
SC12
4680
4684
BACK-END
LVDS OUTPUT
3663 3661
Error DeviceDescriptionItemDiagr.
TEA6422DAudio switch7798SC13
1
MSP3451GSound processor7812SC14
2
PCF8574-SCAVIOI/O expander SCAVIO7540SC8
3
PCF8591AD-DA expander7530SC8
4
FS6377Clock generator7570SC9
5
PCF8574-PSUI/O expander PSU7370P3
6
24C16 OTCNVM OTC7430SC7
7
24C16 PWNVM PW7580SC9
8
SAA7118Video decoder7225SC5
9
AD9887ADC/TMDS receiver7170SC4
10
SDA9400De-interlacer7280SC5
11
EP1K30QCEPLD processor7656SC11
12
Download comm.Errors during downloading
20
CSP comm.CSP time-out error
21
PDPDisplay errorPDP
30
Vs overvoltageOvervoltage on Vs, Va, +3V3,
70
Vs undervoltageUndervoltage on Vs7308A/B P3
71
Va undervoltageUndervoltage on Va7308C/D P3
72
+5V undervoltageUndervoltage on +5V7330A/B P3
73
+3V3 undervoltageUndervoltage on +3V37330C/D P3
74
DC-PROTAudio amplifier protection7362P3
75
TEMP-PSUOver-temperature in PSU7366AP3
76
Protection with
77
reason unknown
Protection after
78
several retries
Temperature alarmDetection of over-temperaturen.a.n.a.
79
OTCStubAbort7383SC7
91
OTCMemoryCorrupt7383SC7
92
OTCOutOfMemory7383SC7
93
OTCStackOverflow7383SC7
94
OTCWatchDogDied7383SC7
95
OTCHwWatchDogDied7383SC7
96
OTCUnknown7383SC7
97
HW = HARDWARE
SW = SOFTWARE
+5V or a combination
Not possible to read out a valid
protection, but protection is
active (from PSU)
PW Scaler will not start comm.
with OTC after several retries.
0301
16
18
7341P3
PLASMA DISPLAY
PDP
PANEL
6
7
SDA-1_3V3
SCL-1_3V3
ERR
30
PW_SDA
PW_SCL
CL 26532038_005.eps
160402
Page 28
Block Diagrams, Testpoint Overviews and Wiring Diagram
Note: The Service Default Mode (SDM) and Service Alignment
Mode (SAM) are described in chapter 5. Menu navigation is
done with the 'CURSOR UP, DOWN, LEFT or RIGHT' keys of
the remote control transmitter.
8.1General Alignment Conditions
Perform all electrical adjustments under the following
conditions:
•Mains voltage and frequency: 220 V
otherwise stated.
•Connect the set to the Mains via an isolation transformer.
•Allow the set to warm up for approximately 20 minutes.
•Measure the voltages and waveforms in relation to chassis
ground (with the exception of the voltages on the primary
side of the power supply). Never use the cooling fins/plates
as ground.
•Test probe: Ri > 10 MΩ, Ci < 2.5 pF.
•Use an isolated trimmer/screwdriver to perform the
alignments.
Use a VGA-generator or a Personal Computer (contact your
National Service Organisation for the necessary test pattern
files) as test pattern generator and connect it to the VGA1 input
of the FM23 plasma monitor. When you use a PC, start
Microsoft PowerPoint (or Paintbrush), and load the mentioned
file. Then display the picture as full screen.
/ 50 Hz unless
AC
8.2Hardware Alignments
After a Power Supply (only valid for version 3, see also table in
paragraph 8.3.6) replacement, you must align both V
voltages. The exact values differ from panel to panel, therefore
a sticker with the correct values is placed on the PDP.
1. Replace the Power Supply panel (see chapter 4).
2. Set the monitor in Service Default Mode (see SM chapter
5.3.1).
3. Allow the set to warm up for 20 minutes.
Use a calibrated volt meter (accuracy = ± 1%) for the following
alignments.
For the correct alignment values, check the sticker in the upper
left corner of the PDP (located just behind the suspension
bracket, see photo below).
and VA
S
8.2.1 V
8.2.2 V
Alignment
S
Measure V
Use potmeter R3026 (see diagram P6) to align this voltage to
the value mentioned on the sticker (mind you: alignment
accuracy = ± 0.5 %).
Alignment
A
Measure V
potmeter R3127 (see diagram P7) to align this voltage to the
value mentioned on the sticker (mind you: alignment accuracy
= ± 0.5 %).
on pin 10 of connector 0323 (diagram P7).
S
on pin 1 of connector 0323 (diagram P7). Use
A
8.3Software Alignments
Enter the Service Alignment Mode (see chapter 5). The SAM
menu will now appear on the screen.
Select one of the following alignment menus via the upper
horizontal bar:
1. General (Gen.)
2. Display (Disp.)
3. Scaler (Scal.)
4. Video 1 (Vid.1)
5. Video 2 (Vid.2)
6. Options (Opt.)
Note: the last three items are not available in the Basic
configuration.
8.3.1General
Table 8-1 SAM Menu 'Gen.’
Service Alignment Menu General
Type nr. - AG Code 32FD9944/01S (example)
SW version OTC AAAABC-X.Y xxxxx
SW version PW AAAABC-X.Y xxxxx
SW version EPLD AAAABC-X.Y xxxxx
Errors 1 xx xx xx xx xx
Errors 2 xx xx xx xx xx
Operational hours xx
Reset error buffer Press OK to reset
Store Press OK to store
Store
Select this item, and press OK, to store the made alignments.
Note: There are several methods to exit the SAM, each with its
own characteristics:
•Switch the set 'off' (with the Mains switch or by pulling the
Mains cord); new alignment settings are always stored,
even when item 'store' was not activated!
•Switch the set to 'standby' by pressing the power button on
the remote control transmitter; new alignment settings are
always stored, even when item 'store' was not activated!
•Use a standard RC-transmitter and key in the code 0 0;
new alignment settings are not stored (except when item
'store' was activated)!
Figure 8-1 V
alignment values (example)
S/VA
Page 86
EN 86FM238.
Alignments
8.3.2Display
Table 8-2 SAM Menu 'Disp.'
Service Alignment Menu Display
Test pattern On / Off
Contrast Adjust ...
Gamma Adjust ...
White point Adjust ...
Compensation fact. 0 <-------|-------> 255
128
Test pattern
Possible to generate an 'even white' test pattern, which is
generated by the PDP. You can use this picture, to check the
plasma display for pixel defects.
Contrast
Not necessary to align, fixed value is 255.
Gamma
Not necessary to align, fixed value is 2.
White point
Not necessary to align, unless stated by the NSO. Fixed value
is 255.
Compensation factor
Not necessary to change. Fixed value is 128. In some cases
however, a new software table must be loaded in the PW
Scaler (via ComPair). The following service scenarios are
possible:
•When a defective glass filter plate is replaced: This
requires a new 'White Point' adjustment (see next
paragraph).
•When a defective PDP is replaced by the same type:
This requires a new 'White Point' adjustment (see next
paragraph).
•When a defective PDP is replaced by another (newer)
type: This requires both a new compensation table upload
(by ComPair), and a new 'White Point' adjustment (see
next paragraph). Note: The loaded software, performs the
settings automatically.
8.3.3Scaler
Table 8-3 SAM Menu 'Scal.'
Service Alignment Menu Scaler
Test pattern On / Off
Color temperature 6500K / 7600K / 10000K
White point Adjust ...
Align ADC Press OK to execute
White Point
Table 8-4 SAM Menu 'Scaler - White Point'
Service Alignment MenuScaler - White point
White point red <-------------|------------> 125
White point green <---------|----------------> 100
White point blue <-----------|--------------> 110
Press OK when done
Method 1 (with colour analyser)
1. Supply, via an external VGA source (e.g. a PC with
1024x768 mode, or a VGA generator), a 'White Drive' test
pattern (ask your NSO). This picture consists of black
picture with in the middle a 100% white square.
2. Set BRIGHTNESS to '53' and CONTRAST to '65' (via the
standard customer menu).
3. Go to the SAM menu.
4. Set COLOR TEMPERATURE to '7600 K'.
5. Measure with a CTV colour analyser (calibrated with the
spectra) on the centre of the white square on the screen.
6. Select 'White point' in the SAM Scaler menu, and press
CURSOR RIGHT.
7. Adjust with the CURSOR UP/DOWN or LEFT/RIGHT
command, the three white points Red, Green and Blue to
'128' (do not go above this value!), and align with one or
two of the drivers to the correct coordinates (see table).
8. Repeat the same measurement for respectively colour
temperature '6500 K' and '10000 K'.
9. Repeat again if necessary.
Table 8-5 White Point XY-coordinates
Colour Temperature xy
5600 K (Cool)313329
7600 K (Normal)299309
10000 K (Warm)280289
Method 2 (without colour analyser)
Without a CTV colour analyser, it is possible to set some
parameters, which are based on average values from
production.
Table 8-6 White point RGB-values
Colour Temperature RGB
5600 K (Cool)120119128
7600 K (Normal)128121121
10000 K (Warm)128120110
Test pattern
This function makes it possible to generate a 'colour bar' test
pattern (generated by the PW Scaler IC). You can use this
picture, to check the video path, starting at the PW Scaler IC to
the plasma display.
Colour temperature
Select the appropriate colour temperature for the alignments
(see also 'White point' adjustment below).
Align ADC
1. Supply, via an external VGA source (e.g. a PC, mode
1024x768), the 'ADC alignment' test pattern (ask your
NSO). This picture consists of a half black and half white
picture: black is 16, and white is 235 on a full scale of 255
(=770 mV).
2. Go to the SAM menu.
3. Select 'Align ADC' in the SAM Scaler menu, and press
CURSOR RIGHT.
4. The alignment is performed automatically.
Page 87
Alignments
EN 87FM238.
8.3.4Video 1 (Enhanced version only)
Table 8-7 SAM Menu 'Vid. 1'
Service Alignment MenuVideo 1
Test pattern On / Off
Brightness0 <-----------|---------- > 255
Contrast0 <-----------|---------- > 255
Sharpness0 <-----------|---------- > 255
Test pattern
This function makes it possible to generate a 'full white' test
pattern (generated by the de-interlacer SDA9400, item 7280).
You can use this picture, to check the video path of the external
inputs AV1, 2 and 3, starting at item 7280 (the proper
functioning of the Digital Video Decoder SAA7118 is not
tested!).
Note: To generate the test pattern, it is necessary to feed a
signal to one of the AV-inputs.
Brightness
This is the setting of IC7225 (SAA7118). Not necessary to
align, fixed value is:
•PAL/SECAM: 132
•NTSC: 139
Contrast
This is the setting of IC7225 (SAA7118). Not necessary to
align, fixed value is:
•PAL/SECAM: 139
•NTSC: 128
Sharpness
Not necessary to align, fixed value is 6.
8.3.5Video 2 (Enhanced version only)
Table 8-8 SAM Menu 'Vid. 2'
Service Alignment Menu Video 2
Lum. delay PAL0 <-----------|---------- > 7
Lum. delay SECAM0 <-----------|---------- > 7
Lum. delay NTSC0 <-----------|---------- > 7
8.3.6Options (Enhanced version only)
Table 8-9 SAM Menu 'Opt.'
Service Alignment Menu Options
control On / Off
V
s/Va
Display size 32" / 42"
Virgin On / Off
ICONN control On / Off
Vs/Va control
When this option is set to 'on', it will enable the 'PDP feedback
loop' for the automatic Vs/Va alignment. See table below for
the correct setting.
Table 8-10 Vs/Va Control options
PSU version 3 PSU v.3 with
precision R's
PDP with
Vs feedback(-52
PDP)
PDP with
Vs/Va
feedback(with
'B' in serial
number)
Display size
Fixed value is 32". This option is only meant for the factory, to
indicate the display size for the software.
Virgin
Normally 'off'. When this option is set to 'on', the display starts
with the language selection menu.
ICONN control
Normally 'off'. Set this option to 'on' in case a so-called
'ICONN'-box (for Hotel TV) is connected to the display.
Caution: When this option is set to 'on', without an ICONNBox connected to the monitor, one cannot control the monitor
anymore (because the RC connection is interrupted).
Feedback loop
'OFF', alignment is necessary.
Feedback loop
'OFF', alignment is necessary.
Feedback loop
'ON', but alignment (check)
is necessary
(see par. 8.2
for values) .
Feedback loop
'ON', no alignment (check)
necessary.
PSU version 4
Feedback loop
'ON', no alignment necessary.
Feedback loop
'ON', no alignment necessary.
With the 'Luminance delays' alignment, you can place the
luminance information on the chrominance information (push
brightness onto the colour). Use a colour bar/grey scale pattern
as test signal.
These values are normally fixed.
Lum. delay PAL
Apply a PAL colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour part and black and
white part of the test pattern are at the same position. Fixed
value is 4.
Lum. delay SECAM
Apply a SECAM colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour part and black and
white part of the test pattern are at the same position. Fixed
value is 4.
Lum. delay NTSC
Apply a NTSC colour bar/grey scale pattern as a test signal.
Adjust value until the transients of the colour and black & white
part of the test area are at the same position. Fixed value is 4.
There are two ways to restore the remote control again:
•connect pin 8 (IR_TX) to pin 9 (IR_RX) on the RS232
connector of the monitor (the easiest way to do this, is to
make a 'dummy' connector with these pins connected, and
plug this into the monitor). or
•Set the set in the Service Alignment Mode (SAM) via
shorting jumpers 1 and 2 of connector 0382 on the
SCAVIO panel.
After this you can enter the appropriate menu to set
‘ICONN control’ to ‘off’ again.
Page 88
EN 88FM239.
Circuit Descriptions and List of Abbreviations
9.Circuit Descriptions and List of Abbreviations
Index of this chapter:
1. General
2. Power Supply unit
3. VGA connector panel
4. SCAVIO panel
5. Audio Amplifier panel
6. LED/Switch panel
7. Plasma Display Panel
8. Abbreviations
9. IC Block diagrams
Notes:
•Figures can deviate slightly from the actual situation, due
to different set executions.
•For a good understanding of the following circuit
descriptions, please use the diagrams in chapter 6 and 7.
Where necessary, you will find a separate drawing for
clarification.
9.1General
The FM23 is the 3rd generation Philips plasma monitors. In
comparison to the FTV1.9DE, it has:
•A power supply that is based on the FTV1.9,
Video
DVI-D
AV3
AV2
AV1
Loop thru of RGB
and H,V signals
from VGA1 only
VGA2
RS232-C
VGA1
D
V
I
Y/G
Pb/B
Pr/R
H,V
1fH YUV
YC
CVBS
V
G
IN
A
OUT
2
RS
Sub-D
232
9 P
C
RC
out
V
G
In
A
1
Audio Processing
L/R VGA in
L/R CVBS
L/R YC
L/R HD
L/R DVI
L/R Flex VGA
(only output in
Basic config.)
! All Functional blocks shaded grey are required for
the"Basic Configuration".
The remainder is required f or the "Enhanced Configuration".
are optional or prepared
*
Y/H/V
YPbPr
Digital Video
Decoder
SAA7118
3D Comb*
NVM
DDC
R
S232C
ICONN
NVM
DDC
+9V_STBY
Sync
decoder
YPbPr
NVM
DDC
enable
audio
RGB
RGB+HV
RS232
Interrupt
gener.
RGB
RGB+HV
RGB+HV
De-interlacer
SDA9400
ST
RS 232
Driver
+5V_Stby_Sw
RS232C
activity int.
Contro l
Audio Switch
TEA6422D
Output
Switch
RGB+HV
H,V
RGB+HV
RS232C/
TTL
RC5 to E-box
switching
TMDS
Video +
Sync
select
2
I
PW/OTC
Switch
4052
IO Exp-
SC1
PCF8574
ADC Exp
PCF8591
H and/or V
from VGA1
UART (Ebox)
RGB+HV
ADC +
TMDS
Decoder
AD9887
C_Bus -3
MSP Reset
MSP Audio Processor
MSP3415G
I2S
Audio D elay
32KSRAM
I2C_Bus 5
(sw bu s to NVM)
RGB+HV
Digital
YUV
Digital
UART
OTC
H,V
VGA1
switch-
VGA1
Switch
4052
CY7C1399
I2SI2S
UART
PW
Interrupt
Gener.
NVM
32Kbit
PW164_10R or 10RK
Sync.
UART
Interrupt
gener.
Per channel
Flash ROM
2Mbyte
PW
PixelWorks
Video Scaling
Co-processor
PW
Reset
Interrupt
OTC
Main Pro cessor
SAA5801H/xx
SAM,
SDM,
RS232c
service
int. pins
+9V_STBY
HP Filter +
Amp
LP Filter +
Amp
+9V_STBY
Audio Amplifier
•A new SCAVIO panel, which takes over the tasks of the
former AVC and LIMESCO panels.
•A new class-D audio amplifier,
•A new, improved 32'' PDP (with new ALiS technology).
It is possible to use this product as stand-alone monitor or, in
combination with the so-called F21RE Receiver box, for TV
applications.
There are two configurations:
•Basic: which has one video input (VGA1) and one video
output (VGA2). The VGA2 video output is directly
connected to the VGA1 video input, without any
processing. The audio output of VGA2 is also directly
connected to the VGA1 audio input.
•Enhanced: which has six video inputs (VGA1, VGA2, DVI-
D, CVBS, YC and HD) and six corresponding audio inputs.
These inputs are internally converted to the appropriate
signals. The VGA2 connection is here bi-directional (FlexVGA).
Note: In all descriptions below, the Enhanced version of the
FM23 is discussed. When there are important differences
between the Basic and Enhanced versions, this is mentioned.
SRAM
128kbyte
2
Mute
Mute
C_Bus -2
I
Tweeter
Low/Mid
video
control
(sw bus to NVM)
Fan Control PW M
Power OK, 5V test,
8V6 test
I2C_Bus 4
EPLD
EP1K30QC
IR RXr
(RC in)
PROM
for EPLD
Power ON
Reset
Flash
ROM
2Mbyte
DRAM
2Mbyte
NVM
32Kbit
generator
I2C_Bus -1
Light
Sensor
LVDS
Encoder
DS90C385
Clock
Red
LED
3v3Stby/
5vStdby
PDP go =>
<= IRQ_PDP
POWER_DOW N =>
PSU
Green
LED
Serial Digital RGB with
clock and Sync information
CPUgo =>
Display
Control
IO expander
PS
U
PCF8574AT
AC/DC, DC/DC converters
Audio supply, 5V,8V6, 3v3, Vs,Va
Protec tion
3v3,5v S tandby PSU
Fan driver
RC / LED / Switch Panel
PDP
MPU
Vs,Va,VccVsago
PSU
ON/OFF switch
(see description)
CL 26532038_006.eps
AC i/p
010502
FAN
*
FAN
2x
2x
Figure 9-1 Control and Data Path
Page 89
Circuit Descriptions and List of Abbreviations
EN 89FM239.
9.1.1 Input/Output
The main inputs are:
•Basic: VGA only,
•Enhanced: VGA, Flex-VGA, DVI-D, HD-RGB+HV, HD-
2fH-YPbPr (sync on Y), 1fH-YCbCr (sync on Y), YC, CVBS
on cinch. Flex-VGA gives the user a choice to configure the
'loop-through VGA output' as an output or as input.
9.1.2Video
This mainly consists of an analogue processing part and a
digital processing part. The video inputs like VGA (Basic
configuration), CVBS, YC, HD-RGB/YUV (1fH and 2fH) and
DVI-D are received and processed.
The VGA signals are first converted to digital signals and then
processed by the PW Scaler.
The YPbPr (2fH) signal is discretely converted to RGB,
whereas the YCbCr (1fH) signal is processed in the SAA7118
Digital Video decoder.
The base-band video inputs (CVBS and YC) are output from
this decoder as digital YUV, which are then further processed
by the Pixel Works Scaler (PW).
The signals on the digital DVI input are first decoded by the
TMDS decoder inside the AD9887 and then processed by the
PW Scaler.
The PW Scaler output is going through an EPLD and then via
an LVDS Encoder to the Fujitsu/Hitachi PDP (Plasma Display
Panel) as differential serial data. This PDP is based on ALiS
(Alternate Lighting of Surface) technology and is an interlaced
display, with separate odd and even fields to be displayed.
9.1.3 Audio
This mainly hosts the audio inputs for the various video inputs.
They go through an I
2
C controlled source selector. The main
audio processing is done by the Micronas MSP3415G version
with built-in UltraBass-II algorithm.
A digital delay line is created using the I
2
S channel and SRAM.
The delay created can be selected between two values, one for
the Receiver box, and one for the Monitor.
The processed audio signals are then differentially transmitted
to the audio amplifier panel. This amplifier drives a tweeter and
a twin-drive woofer (low/mid range). Active filtering is done
prior to the amplifiers.
9.1.4Control
The main controller is the OTC, referred to as the 'main
processor'. This operates in co-ordination with the processor in
the Pixel Works Scaler (PW), referred to as the 'co-processor'.
When the FM23 monitor is connected to an F21RE Receiver
box, the UART commands from the Receiver box will control
the monitor.
In stand-alone mode, the monitor can be controlled via the
Remote Control or via the RS232C port.
DDC1/2B (Digital Data Channel, an I
2
C-based protocol) is
implemented with separate identification NVMs for the two
VGA inputs and the DVI-D input as well. In addition, the
RS232C port can be used for software download to the PW and
the OTC. The target for downloading is controlled via a switch
in the RS232C path; the switch itself is controlled by the OTC.
9.1.5 Power Supply
Connectors
Y/GPb/BPr/R
AV3
H,V
YC
AV2
AV1
CVBS
D
V
DVI-D
I
Loop thru of RG
and H,V signals
from VGA1 only
+5V_STBY_SW
+5V_STB Y_SW
V
B
G
Flex
A
2
NVM
DDC
RS
Sub-D
232
9 P
C
RC
out
V
G
In
A
1
NVM
DDC
Audio processingAudio amplifier
L/R VGA in
L/R CVBS
L/R YC
L/R HD
L/R DVI
L/R Flex VGA
(only output in
Basic config.)
! All Functional blocks shaded grey are required f or
the"Basic Configuration".
The remainder is required for t he "Enhanced Configuration".
are optional or prepared
*
YPbPr
3D Comb*
+5V_STBY_SW
NVM
DDC
+5V
Sync
decode
RGB
Digital Video
DecoderSAA7118
+8V6
Cont rol
+5V
RC5 to RCout
buffer
RC5 to VGA1
buffer
audio
enable
+9V_STBY
+8V6
ST
RS 232
Driver
+5V_STBY_SW
RS232
Interrupt
gener.
+5V_STBY_SW
+5V_STBY_SW
Audio Switch
TEA6422D
OutputSwitch
+5V
+5V
De-interlacer
SDA9400
+8V6
Video
+3V3+3V3+3V3
NVM
ADC +
TMDS
Decoder
AD9887
+3V3
+5V_STBY_SW
+5V_STBY_SW
+5V
CY7C1399
32Kbit
Sync.
Interrupt
Gener.
Per channel
VSND_NEG VSND_POS
Video +
Sync
switching
+8V6
+3V3
PW/OTC
Switch
4052
IO Exp-
SC1
PCF8574
ADC Exp
PCF8591
Temp.Sensor
+8V6
Discrete
electronics
+5V
MSP Audio Processor
MSP3415G
+8V6
Audio Dela y
+5V
32KSRAM
+8V6
Flash ROM
2Mbyte
PW
PixelWorks
PW164_10R or 10RK
Video Scaling
Co-processor
+3V3
OTC
Main Proc essor
SAA5801H/xx
VGA1
Switch
4052
UART
Interrupt
gener.
HP Filter +
Amp
LP Filter +
Amp
SRAM
128kbyte
+2V5+2V5
+5V
service
int. pins
+9V_STBY
Tweeter
Mute
Mute
Low
+9V_STBY
/Mid
Clock
generator
EP1K30FC
converter
EPLD
PROM
for EPLD
+3V3
Power ON
Reset
Flash
ROM
2Mbyte
DRAM
2Mbyte
NVM
32Kbit
+3V3_STBY_SW
+5V_STBY_SW
RC/LED/switch panel
+8V6
IR RXr
Light
(RC in)
Sensor
+8V6
Local
LVDS
Encoder
DS90C385
+9V_STBY_SW
+9V_STB Y
+8V6
PSU
Red
LED
+5V
+3V3
+3V3_STBY_SW
+5V
PSU
AC/DC, DC/DC converters
Audio supply, 5V,8V6, 3v3, Vs,Va
Protect ion
3v3,5v St andby PSU
Fan driver
+5V_STBY_SW
VSND_NEG VSND_POS
Green
LED
PDP
Vpr2
MPU
Vcc
Vs,Va
*
IO expander
AC i/p
ON/OFF switch
(see description)
CL 26532038_007.eps
010502
Figure 9-2 Power Supply Path
Page 90
EN 90FM239.
Circuit Descriptions and List of Abbreviations
The PSU consists of a pre-conditioner part and a DC/DC
converter part. This converter supplies power to the PDP high
voltages, the auxiliary voltages, and the audio amplifier. There
is a separate standby power supply, which supplies the Main
Processor, PDP microcontroller, interrupt generator and some
other circuits.
9.2Power Supply Unit (Diagrams P)
9.2.1 Introduction
PSU
MAINS
IN
MAINS
FILTERS
ON/OFF
SWITCH
SUPPLY_ON
PRECONDITIONER
(PFC)
380V
MAIN
SUPPLY
DISCHARGE
SEQUENCE
and
The mains inlet module will host the inlet and filtering.
There is a functional 'Mains on/off' switch on the LED panel.
This switch is on the secondary side, controlling the relays on
the primary side.
Vs
Va
Vcc
Vrs
Vra
Vsk
Vak
Iak
Vsago
Vcego
Vpr2
+8V6
+5V
VSND_POS
GND_SND
VSND_NEG
+9V_STBY
+9V_STBY_SW
+5V_STBY_SW
+3V3_STBY_SW
POWER OK
STANDBY
SCL_1
SDA_1
+3V3
+5V
+8V6
PDP
AUDIO
AMPLIFIER
SCAVIO
MAINS
POWER
CONTROL
PROTECTION
ON/OFF
CONTROL
STANDBY SUPPLY
MAINS
ISOLATION
Figure 9-3 Power Supply
Temp.
FAN
CONTROL
DC_PROT
FANS
(OPTIONAL)
CL 26532038_008.eps
040402
Page 91
Circuit Descriptions and List of Abbreviations
EN 91FM239.
Table 9-1 I/O Overview Power Supply
NameI/O Value Description
+3V3Out +3.3 VdcTo supply small signal digital circuitry.
+3V3_STBY_SW Out +3.3 VdcTo supply small signal digital circuitry, needing power in standby
+5VOut +5 VdcTo supply small signal digital circuitry.
+5V_STBY_SWOut +5 VdcTo supply small signal digital circuitry, needing power in standby
+8V6Out +8.6 VdcTo supply the small signal analogue circuitry.
+9V_STBYOut +9 VdcSignal to functional ON/OFF switch.
+9V_STBY_SWOut +9 VdcSignal from functional ON/OFF switch.
DC_PROTInH/LSignal from audio amplifier to switch OFF the power supply in case of a safety problem.
FAN_SP_1InH/L (TTL level)PWM signal from uP to control optional fans (group 1).
FAN_SP_2InH/L (TTL level)PWM signal from uP to control optional fans (group 2).
FAN_SUPPLY_1 Out 5 to 13 VdcSupply voltage for optional fans (group 1).
FAN_SUPPLY_2 Out 5 to 13 VdcSupply voltage for optional fans (group 2).
IakOutSignal to measure 'Ia' in PDP (Iak= 1 x Ia).
MainsIn110/240 Vac, 50/60 Hz Mains voltage.
POWER_OKOut H/L (TTL level)Signal to an interrupt pin of the uP, which indicates that the power supply is in regulation.
If an error occurs, signal goes from H to L.
SCL_1InH/LI2C clock line from uP.
SDA_1In/
H/LBi-directional I2C data line from/to uP.
Out
STANDBYInH/L (TTL level)Signal to switch the PSU to standby mode.
VaOut +30 to +70 VdcTo supply the addressing circuitry in the PDP.
VakOutSignal to measure Va in PDP (Vsk= 0.036 x Va).
VccOut +5 VdcTo supply small signal digital circuitry in the PDP.
VcegoInH/L (H= +2 Vdc)Signal to switch the low voltage supplies ON/OFF.
VraInSignal to control Va (Va= 30 + (20 x Vra)).
VrsInSignal to control Vs (Vs= 70 + (10 x Vrs)).
VsOut +70 to +90 VdcTo supply the sustain circuitry in the PDP.
VsagoInH/L (H= +2 Vdc)Signal to switch the high voltage supplies (Vs and Va) ON/OFF.
VskOutSignal to measure Vs in PDP (Vsk= 0.029 x Vs).
VSND_POSOut +14.5 VdcTo supply the audio amplifier panel.
VSND_NEGOut -14.5 VdcTo supply the audio amplifier panel.
The Power Supply Unit (PSU) is designed to provide regulated
output voltages for the plasma display panel (PDP) and the
built-in electronic panels (such as e.g. the SCAVIO and Audio
Amplifier panels).
It will house the Pre-conditioner, DC/DC converters and the
Standby circuitry. In addition, this panel will house the
protection and the (optional) fan drive circuitry.
The Mains inlet is mounted alongside the SCAVIO panel. It
consists of the necessary high and low frequency mains filters.
The mains AC voltage is applied to the input filter and then fed
to the standby supply. This supply is always operational and
delivers the +9V
STBY
voltage.
The task of the main supply is to deliver the supply voltages for
the several electrical circuits in the monitor.
It is switched via two single-pole relays, which are powered
from the +9V
voltage and controlled via the SUPPLY_ON
STBY
signal.
The reason to choose for a separate standby supply instead of
a single flyback supply is the requirement to have a low standby
power consumption.
The PSU consists of the following parts (which are described
separately):
•Mains inlet and filter,
•Standby supply,
•Fan control (optional),
•Pre-conditioner,
•LLC supply,
•Aux. supply,
•Protections.
To understand the descriptions below, see also mentioned
diagrams in Chapter 7.
9.2.2Mains Inlet and Filter (Diagram P2)
Introduction
The mains filter provides common-mode and differential-mode
filtering, to fulfil legal and self-imposed limits. Additional
provisions are mains spikes and lightning protection.
Operation
The mains voltage is provided via mains inlet 0308, after which
it is fused by a T6.3A fuse (item 1400).
The next part, the mains filter, is optional. It consists of an LC
common mode filter section. This filter consists of two
capacitors (items 2402 and 2403) from both phase and neutral
to ground (to reduce the leakage current) and an inductor
(5401). Interferences on one of the phases are shorted to
ground via these capacitors.
Inductor 5401 also provides a differential-mode filtering with
capacitor 2400. Resistor 3401 discharges this capacitor after
the mains is disconnected.
A second common mode filter is made around coil 5402 and
capacitor 2401.
Resistor 3400 is a high energy VDR. The advantage of this
VDR is that it can handle 400 V
without risk of fire. At high
AC
voltage peaks (e.g. lightning surge) on one of the phases, the
resistance of VDR 3400 will be very low, causing fuse 1400 to
interrupt.
At a lightning surge on both phases with respect to chassis
ground, mains filter 5401 will form a high resistance, through
which the voltage will rise very sharply.
To prevent flashovers, a spark-gap/ resistor combination (items
1402 and 3404) is implemented.
The high-ohmic resistors 3402 and 3403 are connected
between neutral and chassis ground. They are required by
safety regulations.
Page 92
EN 92FM239.
Circuit Descriptions and List of Abbreviations
9.2.3Standby Supply (Diagram P2)
Introduction
The standby supply is a separate power supply, meant to
reduce power consumption of the Flat TV monitor in standby
mode. The standby supply operates on the AC voltage from the
input filter part, and has to deliver a stable 9 V voltage.
It has three mains isolated outputs, and one 'hot' output:
•+9VSTBY (called +9VSTBY_SW after the 'on/off' switch
1101), to power the 'on'/'off' relays in the pre-conditioner.
•+5VSTBY_SW (derived from the +9V
STBY
regulator 7540)
•+3V3STBY_SW, to supply the µP of the PDP.
•25V_HOT, to supply the LLC controller.
The standby supply is also connected to the pre-conditioner
output (400V_HOT), in order to deliver a voltage as long as
possible, after switch 'off' and at mains dips.
Operation
The standby supply is always operational when the AC input
voltage is present, so even when the POWER switch is in the
'off' position. After a small rectifier (D6512/6513) and buffer
capacitor (C2503), the DC voltage is applied to an SMPS
(switched mode power supply).
The SMPS itself is build around IC7500, a 'TINYSwitch
TNY256'. This IC contains a control circuitry and a power
MOSFET. It uses a simple 'on/off' control loop to regulate the
output voltage. The generated +9V
voltage, at the
STBY
secondary side, is rectified by D6504 and smoothed by C2508.
The supply for the TNY256 on pin 6 comes via resistor R3506
and L5500.
By using secondary sensing, a very accurate standby voltage
and high efficiency is achieved. The sensing circuit uses a
TL431 as reference voltage/error amplifier. Optocoupler 7501
is used for the mains isolation.
When the output voltage rises, the reference voltage on the
TL431 will exceed 2.5 V and the current through this device and
the optocoupler LED will increase. By this, the optocoupler
transistor will conduct more. When this current (at pin 4 of
IC7500) exceeds 50 µA, the MOSFET is switched 'off', and the
output voltage will drop. When this current drops below 40 µA,
the MOSFET is switched 'on' again.
During the time that the MOSFET is 'on', the IC has no supply
voltage. To overcome this period, the energy stored in the
bypass capacitor C2513 is used. This capacitor is charged
during the time the MOSFET is 'on'.
As the TNY256 is sensitive for transients (mains spikes), a
'peak clamp' circuit (300 V zenerdiodes 6501 and 6502) is used
to limit the voltage to a safe level.
via voltage
9.2.5 Pre-conditioner (Diagram P5)
Warning: the pre-conditioner does not provide mains isolation.
Introduction
The European Law describes a reduction of mains harmonics
for apparatus with a power consumption above 75 W.
Therefore the pre-conditioner is designed. This module serves
as the interface between the mains input and the V
The advantage of a pre-conditioner is (compared to a mains
input filter):
•Reduction of mains harmonics to legal limits.
•Lower mains current for the same output power.
•Power factor close to 1.
•Stable regulated output.
•Small and low weight.
The input voltage of the pre-conditioner is universal, between
95 and 264 V
. The output is 400 VDC (400V_HOT) with a
AC
maximum output power of 300 W. This output voltage is
delivered to the V
supply.
S
Operation
Start-up
The two relays (1450 and 1460, diagram P2) are controlled via
the SUPPLY_ON signal. This signal will become 'high' when
the +9V_STBY_SW, the STANDBY (from the OTC), and the
LATCH signal are 'ok'. It then switches indirect relay 1450 via
transistor 7460 and so enables the use of a small low voltage
switch.
To protect rectifier 6600 and relay 1450, the inrush current is
limited to a maximum of 20 A by charging the capacitor 2605
through two serial PTCs (3450 and 3451) and an NTC (3452).
After approximately 0.5 sec, relay 1460 is activated. This relay
will short the PTCs. The advantage of using an NTC, is the fact
that the resistance varies with the current and hence the mains
voltage. At a high mains voltage, the current is lower for the
same power.
Two clamp diodes 6605 and 6606 charge output capacitors
C2616 to the peak voltage of the mains input. During normal
operation, both diodes are blocked because of the output
voltage of 400 V
, and will only conduct if there is a mains
DC
spike or an output dip.
Capacitor 2616 delivers via R3668 the start-up voltage at pin
16 of IC7650. After the start-up cycle, IC7650 is supplied via
auxiliary winding 1-2. Capacitor C2663 is charged during the
cycle that MOSFET 7610 conducts. While MOSFET 7610 is
switched 'off', this capacitor transfers its energy via D6661 to
the input of stabiliser IC7660. The 15 V output voltage of this IC
is fed via D6665 to V
pin 12 of IC7650.
CC
The slow start function is realised by the circuit consisting of
transistor 7654, D6654, R3654, and C2654.
S/VA
supply.
9.2.4Fan Control (Optional, Diagram P4)
For ceiling mount or portrait-mode use, there is foreseen in four
optional fans, grouped per two. The temperature within the
monitor is measured via a sensor (R3372, KTY81) on the PSU.
This sensor is, via A/D converter (item 7530 on the SCAVIO),
connected to the OTC. According the temperature within the
cabinet, the OTC-software will drive the two PWM outputs of
the OTC. These outputs (FAN_SP_1 and 2) are connected to
the PSU, where for each signal, a corresponding voltage is
generated to supply the fans. These voltages
(FAN_SUPPLY_1 and _2) are proportional to the duty cycle of
the corresponding PWM signals.
The OTC senses the temperature every 5 s. If it has reached
T-alarm, and this value has been measured three times
consequently, the monitor will go into protection, and a errorcode is generated.
Normal Operation
An up-converter circuit is used for the pre-conditioner. The
switching frequency of the converter is chosen much higher
than the mains frequency. It is therefore possible to consider
the supply as constant, during every high frequency period,
and the envelope of all voltage steps during the low frequency
period approximates a half sine wave.
The output voltage of the pre-conditioner equals the input
voltage, when the MOSFET is continuous switched 'off', and
increases while the MOSFET is switched 'on'.
The rectified mains input voltage is connected to pin 5 of
IC7650 via voltage divider R3650 and R3651. This voltage is
proportional with the mains input, and is used to change the
duty cycle of the pulses, which are generated at pin 11.
Because the width of these pulses is not small enough, the
circuit around transistors 7640 and 7641 is added. It decreases
Page 93
Circuit Descriptions and List of Abbreviations
EN 93FM239.
the duration of the square wave by 500 ns (this value is set by
R3640 and C2640).
A demagnetisation winding (pin 1-2 of L5600) detects when
there is no energy in the transformer. This information is fed to
IC7650 pin 7 and this is used to switch 'on' the MOSFET
(7610). In this way, the dissipation is very low, combined with a
low EMI.
The MOSFET 7610 is switched 'off' at high currents, up to 15
A. To reduce dissipation, this is done at high speed for which
'turn off driver' T7608 is used.
The output voltage (400 V) is divided by R3670 and R3671 and
connected to pin 3 of IC7650. A change in the load will adjust
the duty cycle of the gate pulse at pin 11, in order to keep the
output voltage constant. Therefore, there is no need to adjust
the output voltage by means of a potentiometer.
Protections
Current Protection
The current through FET 7610 flows also through the sense
resistors 3614 and 3615. The voltage across these resistors is
fed to pin 6 of IC7650. If the current exceeds its reference level,
the pre-conditioner will switch 'off'. A filter, formed by C2666
and R3666, avoids unnecessary protection triggering due to
spikes.
C2665 and R3665 on pin 13 determine the maximum
oscillating frequency.
the resonance circuit and the MOSFETS, energy is stored into
transformer L5002 and capacitor C2001.
The secondary voltages are rectified and smoothed, these
voltages are, via a voltage divider, fed to the optocoupler that
influences the oscillator frequency of the control IC and
stabilises the secondary voltages. If the current becomes too
high, the supply is switched 'off' via the fault input of the control
IC.
Advantages:
•High efficiency (more then 90%, other supplies 75%).
•Less radiation.
•More cost-effective (two MOSFETS of 400 V are cheaper
than one MOSFET of 600 V).
Disadvantages:
•Very low power stand-by impossible.
•Realisation and stabilisation is more complex.
Operation V
Supply
S
Lr
Cr
Ri
CapacitiveInductive
Z
9.2.6LLC Supply (Diagram P6)
Introduction
supply (70 - 90 V) is based upon the so-called LLC
The V
S
converter technology (also used in the MG3.1 and FTV1.9). It
is used to supply the power of the sustain pulses, which
generate the light in the PDP. The voltage is set by a reference
DC voltage (V
The V
voltage (derived from VS, 30 - 70 V) is used to supply
A
), coming from the PDP.
RS
the power for driving the addressing electrodes of the PDP.
The value of V
is also depending on a reference voltage (VRA)
A
coming from the PDP.
The main supply hosts the following supplies:
•V
supply, via an LLC converter.
S
supply, derived from VS via a down converter.
•V
A
, via a flyback converter.
•V
CC
•3V3, via a down converter.
•Audio amplifier supplies (V
SND_POS
and V
transformer.
+400V-HOT
POWER
BLOCK
S1
7005
3014
6007
3017
6008
Figure 9-4 V
S2
7006
Supply
S
5002
FEEDBACK
7002
VCCVAUX
FASE
7001
14 12
CONTROL-IC
MC34067
DRIVER
5001
FAULT INPUT
10
The start-up voltage for the IC is derived from one phase, the
IC starts to oscillate, and alternately S1 and S2 are driven into
conduction with a dead time in between. This effects that, via
SND_NEG
), via a
6044
SENSING
CL 16532099_109.eps
f
r
CL 16532099_110.eps
f
260901
Figure 9-5 Impedance Characteristic
General
The LLC supply is a serial resonance power supply. The coil,
resistor, and capacitor form a trap at the resonance frequency
f
. The impedance is frequency dependent. The smallest
R
impedance is at the resonance frequency (f
), at the right side
R
of fR is the inductive part, and at the left side the capacitive
part. The supply works in the inductive part, since higher
frequencies causes minor losses.
Stabilisation is realised, by regulating the frequency as function
of the output voltage (V
) and power. The load is
S_UNSW
stabilised by influencing the series-loop. The higher the
frequency, the lower the output power.
The supply voltage of the control IC comes from the 25V_HOT
voltage of the standby supply (via stabiliser 7093), and is lead
to pin 15 of the IC. The IC starts to oscillate. This supply line
has a short-circuit protection via opto-coupler 7003; when the
supply is regulating, the current through the opto-coupler is
amplified and will deliver power to the IC.
Vs
+
7010
Control is done in the usual way by a TL431 at the secondary
side. V
additional TL431 (7011 at schematic P6). V
coming from the display, influences the output of the V
The output voltage of the V
following formula: V
circuitry for V
is mixed into the feedback voltage, using an
RS
supply varies according the
S
= 70 + (10 * VRS). Via this stabilisation
S
, the output voltage is stabilised (if necessary, it
S
, a control signal
RS
supply.
S
is possible to adjust the voltage, via potmeter R3026). The V
is fed via a voltage divider to IC7010 (TL431).
S
If the voltage at pin 3 of IC7010 is higher than 2.5 V, a current
will flow from cathode to anode. This current flows also through
260901
the secondary side of the optocoupler 7002.
The voltage at pin 7 of the MC34067, determines the output
frequency. The higher this voltage, the higher the output
frequency. Thus, if the voltage on pin 7 increases, the
frequency increases and V
decreases.
S
When the output voltage rises, the voltage at the reference
IC7010 also rises, this causes the current through the diode of
the opto-coupler to rise. The transistor of the opto-coupler
Page 94
EN 94FM239.
Circuit Descriptions and List of Abbreviations
conducts more, as a result of which the voltage at pin 7 of the
MC34067 increases.
The output voltage of the error amplifier gets lower, and the
current through R3005 increases.
Accurate Over Voltage Protection is added, using a TL431
(7304) as reference/comparator and an additional optocoupler
(7003) that acts on the fault input pin 10 of the MC34067P (see
also 'Protections Main Supply').
The Controller
V
CC
15
C2005
R3003
Enable /
UVLO Adjust
OSC-CHARGE
OSC-RC
C2004
One-Shot RC
R3004
Oscillator
Control Current
R3005
I
OSO
Error Amp Output
Noninverting Input
Inverting Input
Soft-Start
9
1
2
16
3
6
8
7
11
7.0k
Error Amp
50k7.0k
50k
8.0V
Q1
I
OSC
One±Shot
3.1V
Error Amp
Clamp
9.0
µ
A
VCC UVLO
V
ref
D1
Oscillator
4.9V/3.6V
4.9V/3.6V
Q2
OR3
5.1V
Reference
V
ref
V
UVLO
ref
4.2/4.0V
Steering
Flip-Flop
Q
T
Q
R
R
Q
S
Fault
Latch
CL 16532099_111.eps
Figure 9-6 MC34067
The MC34067P controller, is used for the following reasons:
•Zero voltage switching.
•Variable frequency oscillator (above 1 MHz).
•Precision one shot timer for the dead time.
•5 V reference output.
•Double, high current totem-pole output.
•Soft start.
•Wideband error amplifier.
•Fault input (protection).
The oscillator circuit is build around an internal comparator with
two threshold-voltages: 4.9 and 3.6 V.
C2004 is first charged via transistor Q1. If the voltage across
C2004 is more then 4.9 V, the output of the upper comparator
becomes low, the NOR-port output will be high, and Q1 will be
blocked because the base will be shortened by Q2. C2004 will
be discharged via the resistors R3003 and the oscillator control
current (I
OSC
).
If the voltage across C2004 is below the lower threshold (3.6
V), transistor Q1 is conducting and the capacitor is charged
again. The oscillation frequency is modulated by the oscillator
control current.
The discharge current increases, when pin 3 is loaded even
more; thus the lower the voltage on pin 3, the higher the
oscillator control current and the higher the frequency. The
maximum frequency is reached when the output of the error
amp is minimal (0.1 V). Thus, R3005 determines the maximum
frequency.
The minimum frequency is reached, when I
current is zero:
OSC
C2004 then discharges only via the resistor R3003.
One Shot Timer
The one-shot timer is present, to de-activate both outputs
simultaneously, and to provide a dead time, so that only one
output will be activated.
The one-shot capacitor (C2005) is first charged by Q1. The
one-shot period begins when the oscillator comparator is
switched 'off' by Q1. The one-shot capacitor is discharged via
the parallel resistance (R3004): if this voltage gets lower than
the lower threshold of 3.6 V, the comparator will be high and
controls the flip-flop, which makes one of both outputs high.
MC34067
1.0V
260901
V
ref
5
Output A
14
Power Ground
13
Output B
12
Fault Input
10
If Q1 is re-conducted through the oscillator comparator, the
one-shot capacitor is re-charged.
Fault Detector Input
At pin 10, there is a fault detector input. If this voltage reaches
1 V, the output of the OpAmp goes high, and both drive outputs
are switched 'off'.
In addition, the output of OR3 will be high via the 'fault latch'.
The output of OR3 drives Q1, so both the oscillator and the
one-shot-capacitor remain charged. Via OR3, the soft-start
capacitor is discharged.
Soft-start
Due to the soft-start circuit, the oscillator starts with maximum
frequency. The low voltage on the soft-start capacitor (C2027)
is buffered and keeps the error amplifier output low (I
= max).
-> f
OSC
OSC
= max
The capacitor is charged with a current of 9 µA, the output of
the buffer gets high, and the error amplifier input takes charge
of the oscillator control current.
Driver stage
The two secondary windings of the driver transformer are
wound in opposite directions and control the two switching
MOSFETs. The primary winding of the driver transformer is
alternately controlled by the two totem-pole outputs of the
controller. Cross-conduction of both MOSFETs is prevented by
the dead time.
The gate of each MOSFET is controlled via the resistors 3014/
3017 and via the diodes 6007/6008. The transistors 7007/7008
discharge the gate faster by switching 'off'. The diodes 6017/
6028 at the base-emitter of 7007/7008 prevent the zener effect
of these transistors. The zener diodes at the gate-source of
7005/7006 are for ESD protection. C2011 and C2014, form the
capacity for the series resonant circuit.
MOSFET switching
The total switching time can be distributed over 12 phases with
different current paths. Only four phases are discussed to
simplify the explanation:
Phase 1 (S1 closed, S2 open)
Vi
S1
D1
Lr
S2
D2Cs
Lp
Cr
Br1
CL 16532099_112.eps
+
260901
Figure 9-7 Phase 1 Resonance Supply
The gate of MOSFET 1 is positive, which causes S1 to close.
The input voltage Vi of 400 V
, provides a current flow through
DC
S1 and the series circuit. At the same time, a current flows
through the rectifier diodes in the secondary winding, which will
charge capacitor Cs.
The current through Lr starts negative, but it is increasing to
change polarity.
Capacitor Cr is charged sinusoidal, while the voltage at Lr
drops. This makes the current drop.
Page 95
Circuit Descriptions and List of Abbreviations
EN 95FM239.
Phase 2 (S1 open, S2 open = dead time)
Vi
S1
D1
Lr
2
S2
Cp
D2
Lp
1
Cr
Br1
CL 96532069_168.eps
+
Cs
300999
Figure 9-8 Phase 2 Resonance Supply
Before the current reaches zero, S1 is opened. Now, both
MOSFETs are not conducting. However, the current through
the coils wants to continue. The capacity Cp releases its load
to the series circuit, and the voltage at Cr continues to rise (Cp
is the sum of several parasitic capacities).
1) The voltage at the drain of MOSFET 2 drops, because Cp is
discharged at this moment [1]. This causes a voltage inversion
across Lr and Lp. The secondary winding begins to feed back,
charging capacitor Cs.
2) The voltage becomes negative, and diode D2 starts to
conduct [2]. The secondary bridge remains conducting.
Phase 3 (S1 open, S2 closed)
Phase 4 (S1 open, S2 open = dead time)
Vi
S1
2
S2
1
Cp
D1
Lr
Lp
D2Cs
Cr
Br1
CL 96532069_170.eps
+
300999
Figure 9-10 Phase 4 Resonance Supply
Before the current reaches zero, S2 is opened. Now, both
MOSFETs are not conducting, but the current through the coils
wants to continue. The capacity Cp releases its load to the
series circuit, and the voltage at Cr continues to fall (Cp is the
sum of several parasitic capacities).
1) The voltage at the drain of MOSFET 2 increases, because
Cp is discharged at this moment [1] (Cp was charged to 400 V).
This causes a voltage inversion across Lr and Lp. The
secondary winding begins to feed back, charging capacitor Cs.
2) The voltage becomes higher than 400 V, and diode D1 starts
to conduct [2]. The secondary bridge remains conducting.
Protections MC34067
Vi
S1
D1
Lr
S2
D2
Lp
Cr
Br1
CL 96532069_169.eps
+
Cs
300999
Figure 9-9 Phase 3 Resonance Supply
The gate of MOSFET 2 is becoming high. The current through
D2 is taken over by MOSFET 2. The switching losses are
negligible, because the voltage across the switch is now
approximately 1 V.
The current through Lr starts negative, but is increasing to
change polarity. A current flows through MOSFET 2 and the
series circuit. The bridge remains conducting, but its current
gets zero because of the decreasing voltage across Lp. This is
caused by the discharge of capacitor Cr. The voltage at
capacitor Cr is decreasing sinusoidal and so is the voltage
across Lp and Lr.
Over Current Protection (OCP)
The voltage at R3021 is a criterion for the current, which flows
through the primary winding. Via C2015 and D6010, the
negative information is clamped at -0.6 V. The total amplitude
is rectified via D6009 and C2010, and via R3020 and TS7009
supplied to the fault input (pin 10) of the controller.
When the fault input is higher than 1 V, the protection is
activated.
Over Voltage Protection (OVP)
The voltage at R3010 is the take-over-winding voltage. This
voltage is also supplied to pin 10 of the controller via a voltage
divider R3010/R3011 When the fault input is higher than 1 V,
the protection is activated.
Soft-start Over Current Protection
If short-term over current peaks occur, the frequency is
adapted. The voltage at R3021 is clamped at -0.6 V via C2015
and D6010. The total amplitude is rectified via D6011 and
C2008, and supplied to the 'capacitive' thyristor TS7017/18 via
R3012.
When the voltage at the emitter of TS7017 gets higher than 5
V, the soft-start capacitor C2027 is discharged and the
frequency increases. Because of this, the V
will drop. If this
S
voltage remains 5 V, the supply is interrupted (hick-up).
This circuit is adjusted in such a way, that the voltage does not
drop too much if a flash occurs.
Page 96
EN 96FM239.
Circuit Descriptions and List of Abbreviations
9.2.7 Aux. Supply (Diagram P7)
The Aux. supply part, hosts the supplies, which are derived
supply,
A
supply,
CC
supply:
S
from the V
•V
•V
•3V3 supply,
•Audio supply (V
Supply
V
A
voltage is derived from the VS voltage via the down
The V
A
SND_POS
and V
SND_NEG
).
converter principle. Control IC TEA1507 (item IC7112) and
MOSFET TS7117 are used.
S
L
Vin
Vin
I
T
S
S
closedSopen
I
T
δT
T
D
+
C
I
D
L
D
+
C
V
I
D
OUT =
CL 26532038_009.eps
Figure 9-11 Principle of Down Converter
After closing switch 'S', the linear in time increasing current IT,
will charge capacitor C.
Opening switch 'S' will generate a counter-e.m.f. (= reverse
voltage) in coil L, trying to maintain current I
T
via diode D (this diode is also called 'freewheel diode').
Therefore, after opening 'S', the magnetic energy stored in coil
L will be transferred to electrostatic energy in capacitor C. The
will only supply current during the time that 'S' is closed
V
IN
while a constant current is flowing through R
V
is directly proportional with VIN and the time that 'S' is
OUT
closed and reverse proportional with period time 'T'. Therefore,
by changing the duty cycle, it will be possible to control V
To apply this on the FM23 (diagram P7): replace switch 'S' by
FET TS7117, coil L by L5220, diode D by D6120, C by C2121,
= 77-100V, and V
V
IN
OUT
= VA.
Stabilising is done in the same way as for the V
mixed into the feedback voltage, using an additional TL431
(7011 at schematic P6). Control signal V
display, influences the output of the V
voltage of the V
V
= 30 + (20 * VRA).
A
supply varies according the following formula:
A
, coming from the
RA
supply. The output
A
V
OUT
R
L
V
OUT
R
L
. δT
V
IN
T
280302
. This is possible
.
L
OUT
supply. VRA is
S
Supply
V
CC
This part delivers, besides the V
voltage (+5 V), also a +12
CC
V (for optional Fan control) and derived from that, an +8V6 (for
small signal analogue circuitry).
voltage is derived from the VS voltage via the flyback
The V
CC
converter principle. Control IC TEA1507 (item 7212) and
MOSFET 7212 are used.
+
V
IN
S
Id
-
-
V
IN
S
+
D
-
+
Isec
C
D
+
C
+
+
V
OUT
RL
V
OUT
RL
-
CL 26532039_010.eps
280302
Figure 9-12 Principle of Flyback Converter
After closing switch 'S', the current I
will increase linear in time.
D
The magnetic energy in the primary coil is directly proportional
with the self-inductance of the coil and current I
(thus with the
D
time the switch is closed). The voltage polarity at the secondary
winding is negative (due to different winding direction),
meaning that diode D will block. Capacitor C will discharge via
, V
will decrease.
R
L
OUT
Opening switch 'S' will generate a counter-e.m.f. in the primary
winding, trying to maintain current I
. Through this the polarity
D
of the secondary voltage will inverse. The magnetic energy,
stored in the coil, will now be transformed to the secondary
side. Diode D will now conduct, capacitor C will be charged and
will increase.
U
OUT
To apply this on the FM23 (diagram P7): replace switch 'S' by
FET TS7217, coil L by L5220, diode D by D6224, C by C2224,
= V
V
IN
S_UNSW
, and V
OUT
= VCC.
3V3 Supply
The 3V3 voltage, is directly derived from the LLC supply (+18V
line). Via a fuse (1005/1045), this voltage is rectified by diodes
6021/6045 and smoothed by C2022. Via control IC L4973V
(item 7260), the 3V3 voltage is generated. This IC contains a
complete down converter, with integrated MOSFET.
Audio Supply
This is a 'floating' symmetrical supply (±14.5 V) derived from V
S
via transformer 5290. Because this voltage is tightly coupled to
voltage, this voltage varies considerable, between 11 V
the V
S
(max. load, V
= 70 V) and 20 V (min. load, VS = 90 V).
S
The Audio ground is connected to the normal secondary
ground, with a capacitor (C2290) and a resistor (R3292) in
parallel, to have the possibilities to suppress spurious
oscillations.
.
Page 97
Circuit Descriptions and List of Abbreviations
EN 97FM239.
9.2.8 Power Supply Protections (Diagram P3)
Introduction
1450
1460
Vac_SW
DC_PROT
TEMP. ERROR
(Vs_unsw, Va,+5V,+3V3)
(Vs_unsw, Va,+5V,+3V3)
Vsago
Vs_UNSW OK
MAINS IN
+9V_STBY_SW
STANDBY
LATCH
>
1
OVP
>
1
UVP
&
&
&
LATCH
POWER_OK
SUPPLY
Vs_UNSW
Vac_SW
MAIN
OFFSUPPLY_ON
or
Vs_UNSW
Discharge
SUPPLY
OFF
Va
Figure 9-13 Protections
In general, all efforts need to be taken, to make a safe power
supply. Therefore, all major outputs are monitored with respect
to over- and/or under voltage. All protections are handled by
hardware. The software only monitors the hardware to
generate error codes for service.
2
C, errors of the power supply are transmitted to the µP on
Via I
the SCAVIO panel. If an error occurs, POWER_OK will change
from 'high' to 'low'. The errors are transmitted to the µP, on the
following ports and pin numbers of the I/O expander
PCF8574AT (item 7370):
Table 9-2 IC7370 Inputs
Aux. outputs
+5V / Vcc
Vs
Va
CL16532099_012.eps
180901
V
Protection
A
Detection of over- or under voltage on V
by comparators
A
IC7308-C and -D. If this voltage exceeds certain levels (set via
voltage dividers), the protection will activate the Power OK
(POK, active 'low'), which will shut down the set.
V
Protection
CC
Detection of over- or under voltage on V
(+5 V) by
CC
comparators IC7330-A and -B. If this voltage exceeds certain
levels (set via voltage dividers), the protection will activate the
Power OK (POK, active 'low'), which will shut down the set.
+3V3 Protection
Detection of over- or under voltage on the +3V3 voltage by
comparators IC7330-C and -D. If this voltage exceeds certain
levels (set via voltage dividers), the protection will activate the
Power OK (POK, active 'low'), which will shut down the set.
OVP protection
This line detects, if one of the above mentioned voltage
protections is an over voltage protection. Therefore, this works
in combination with the above mentioned under-/over voltage
protections.
Latch Protection
When an OVP-, DC-, or Temperature protection occurs,
thyristor 6348 is fired and the LATCH signal is made 'low'. This
signal will switch 'off' the main supply and prevents that the
supply is switched 'on' again, as long as the protection is active.
In addition, the V
signal can activate the LATCH signal (via
CEGO
TS7352 and 7348), but this is temporarily. This is done for
correct start-up behaviour.
DC Protection
Detection of a DC voltage on the audio amplifier outputs. If a
DC voltage is detected, TS7362 will activate the Power OK
(POK, active 'low'), which will shut down the set.
Pin NameDescription
4VsDetection of under- or overvoltage on Vs
5VaDetection of under- or overvoltage on Va
6+5VDetection of under- or overvoltage on
+5V
7+3V3Detection of under- or overvoltage on
+3V3
9OVPDetection of overvoltage on Vs, Va, +5V
or +3V3
10SwitchDetection of functional switch
11DC_PROT Detection of DC_PROT going high
12TEMPDetection of over temp. inside power sup-
ply
This POWER_OK signal is connected to an interrupt pin of the
OTC, in order to be read as fast as possible. This is very
important in case of a time limited error like over voltage. After
detection of the error, the control system will log the error in
NVM, and transmit the first occurrence back to the power
supply through the I
2
C bus.
Note: The POK signal is fed to buffer 7366, together with the
'8V6 UNDER VOLTAGE' and 'SWITCH' sensing. The output of
this buffer, the POWER_OK line, will follow the inputs.
Operation
Protection
V
S
Detection of over- or under voltage on V
by comparators
S_UNSW
IC7308-A and -B. If this voltage exceeds certain levels (set via
voltage dividers), the protection will activate the Power OK
(POK, active 'low'), which will shut down the set.
Temp Protection
Detection of the temperature (via PTC 3368) in the power
supply by comparator IC7366-A. If this voltage exceeds a
certain level (set via voltage dividers), the protection will
activate the Power OK (POK), which will shut down the set.
9.3VGA Connector Panel (Diagram VGA)
The Video Graphics Array (VGA) panel serves as an interface
between the peripheral VGA equipment (Receiver box, PC,
etc.) and the SCAVIO panel. Some specifications of this panel:
•Two NVMs are present, which hold identification data for
the DDC line.
•Further, there are buffers present for the incoming and
outgoing sync signals.
•RC_OUT cinch for linking with other equipment.
•Provision to terminate the incoming sync lines with 75 Ω via
the EBOX_PRESENT line.
For a description, see the next SCAVIO chapter.
9.4SCAVIO Panel (Diagrams SC)
The Scaler Control Audio Video Input Output (SCAVIO) panel
contains:
•All the input connectors,
•Analogue and digital video processing,
•Scaler (co-processor)
•Interface to the PDP,
•Audio processing (excluding the audio amplifier),
•OTC (main processor), and
•RS232C in/out.
Page 98
EN 98FM239.
Circuit Descriptions and List of Abbreviations
Note: There are two versions of this panel, a Basic and an
Enhanced version. Therefore, a lot of components are
therefore not mounted for the Basic version.
For the circuit description, we divide the board into the following
parts:
1. Supply
2. Video processing
3. Audio processing
4. Control
9.4.1Supply
See figure 'Power Supply Part' in paragraph 9.1.5.
! All Functional blocks shaded grey are required for
the"Basic Configuration".
The remainder is required for the "Enhanced C onfiguration".
YUV2fH progressive
dig.
I2C BUS 3
MEMORY
76057170
PW164
Pixelworks
7656
RGB
dig.
EPLD
I2C BUS 1
I2C BUS 2
7670
RGB
dig.
LVDS
to OTC (7383)
CL 26532038_011.eps
analogue
processing
path
AV1
CVBS
YC
AV2
0375
DVI-d
HD
AV3
Flex
VGA
2
VGA
1
RS
232
1fH
Figure 9-14 Video path
240402
to PDP
Note: This part also includes the VGA connector panel that is
mounted on top of the SCAVIO panel.
Inputs
There are five video inputs, which are divided in three types:
•VGA (2fH): named VGA1 and VGA2. Both are 15-pole
SUB-D connectors for RGB and HV, and are situated on
the VGA connector panel. For automatic identification by a
PC, each VGA input is foreseen with a DDC NVM IC. VGA2
is set default as loop through of VGA1. In the Enhanced
version, VGA2 can be switched as output, via the control
signals VGA2_OUT and VGA2_EN.
•YPbPr/RGB (combined 2fH and 1fH): named AV3 and
suitable for YCbCr/HD-YPbPr/HD-RGB + HV. These are
cinch inputs. YPbPr and RGB are seen as separate inputs
by the HW and must be properly selected by SW.
•CVBS like (1fH): named AV1 for CVBS and AV2 for Y/C.
These are also cinch inputs.
Video Path
The 1fH signals (including YPbPr) are buffered (item 7113/21/
17) and go directly to a digital video processor, the SAA7118E
(item 7225 on diagram SC5), where they are converted into a
digital signal.
The 2fH signals are also buffered; both YPbPr (item 7074/84/
79) and RGB (item 7141/38/35) buffers get the same input
signals.
When YPbPr signals are connected, the correct input must be
selected, to get a picture with proper colours. Thus, the signals
must pass a video matrix (item 7088/90, see diagram SC3),
where they are converted into RGB. There are two matrices, an
NTSC and an ATSC. With the MATRIX_SEL signal, the correct
matrix is chosen (item 7089). The detection is done automatic,
by an algorithm in the EPLD.
After the matrix, the signals enter a clamp/blanking circuit
(7102/03/04 and 7100), for the removal of the residual sync
signals. The control is done via the lines HD_BLANKN and
HD_CLAMPN coming from the EPLD.
All RGB signals come together at 4-pole switches (item 7146/
58), one for each colour, where they are switched to the AD
converter item 7170 (R_ADC, G_ADC and B_ADC).
This mainly consists of a small analogue processing part and
a bigger digital signal processing part.
The video inputs like CVBS, YC, High Definition RGB, or YUV
(1fH and 2fH), VGA, and DVI-D are received and processed.
The YPbPr (2fH) is discretely converted to RGB, whereas the
YCbCr (1fH) is processed in the SAA7118 Digital Video
decoder. The base-band video inputs (CVBS and YC) are
output from the digital video decoder as digital YUV, which are
then further processed by the PixelWorks Scaler.
The VGA signals are first AD converted and then processed by
the PW Scaler.
The digital input on the DVI is first decoded by the TMDS
decoder inside the AD9887 and then processed by the PW
Scaler.
The PW Scaler output is going through an EPLD and then via
the LVDS transmitter to the PDP (Plasma Display Panel) as
differential serial data. The PDP is based on ALiS (Alternate
Lighting of Surface) technology and is an interlaced display,
with separate ODD and EVEN fields to be displayed.
Analogue Video
This part describes the analogue video and synchronisation
path of all inputs, until it reaches the 'analogue digital
converters' of either the AD9887 (ADC+TMDS Decoder) or the
SAA7118E (Digital Video Decoder).
Also the switching part is described and the necessary control
signals.
In principle, all video control functions are done by the
PixelWorks processor.
Sync Path
All incoming H and V sync signals go to a 4-pole switch (item
7009) where SYNC_SEL and VIDEO_SEL_2 determine, which
signal is available on the ADC.
Before this switch, the VGA sync path is rather straight, only 1
switch (item 7007) is added for the VGA2 sync signals, which
determines if VGA2 sync is input or output (VGA2_OUT).
In the Basic configuration, these switches are omitted, and
replaced by jumpers (4009/4010).
The external sync (AV1 - 3) signals are treated differently. Both
H_HD_EXT and V_HD_EXT go to three circuits:
•A comparator circuitry with an LM319 (item 7025), to
ensure both sync pulses are always positive going (H and
V_SYNC_CMP),
•A level detection circuitry (items 7000 to 7002), to detect if
the sync is of TTL level (H and V_SYNC_TTL),
•A positive/negative going detection circuitry (items 7006 to
7010), to indicate the polarity of the sync in case of TTL
level (H and V_SYNC_POL_N).
All above-mentioned signals go to the EPLD (see diagram
SC11) for further processing.
Processed sync signals H_HD and V_HD coming from the
EPLD, are also switched to the ADC (H_ADC and V_ADC)
along with the proper RGB signals (R_ADC, G_ADC and
B_ADC).
Page 99
Circuit Descriptions and List of Abbreviations
EN 99FM239.
Digital Video
This part describes the digital video path on the SCAVIO panel,
starting at the AD converters in either the AD9887 (item 7170)
or in the SAA7118E (item 7225) and ending at the output for the
PDP.
For both the Basic as the Enhanced version, everything 'after'
the PixelWorks chip, is equal.
For the Basic version, the input for the PixelWorks only
consists of the 'Graphics path'.
For the Enhanced version, it is both the 'Graphics path' as the
'Video path'.
The SCAVIO panel contains the following functions in the video
path:
1. The 'YPbPr to RGB matrix' and '2fH Video+Sync Switch'
are explained above in the 'Analogue Video' part.
2. The 'Digital Video' path containing the Digital Video
Decoder and the De-interlacer.
3. The 'Digital Graphics' path containing the ADC+TMDS
decoder.
4. The 'Scaler' which is the PixelWorks (PW164-10R) plus
Memory.
5. The 'EPLD' for sync decoding and video manipulation.
6. The 'LVDS' encoder.
The Digital 'Graphics Path'
This is a straightforward application of the Analogue Devices
AD9887 (item 7170). Inputs for this device are:
•FTV Receiver box,
•VGA formats (up to SXGA@75 Hz),
•2fH RGB+HV (only in Enhanced version),
•2fH YPbPr, which is converted to RGB by the 'YUV to RGB'
matrix (only in Enhanced version),
•DVI-d (only in Enhanced version).
Analogue input: The AD9887 is meant to sample 'pixel
synchronous'. To achieve this, a (software) driver is running on
the PixelWorks processor (PW). After hooking up a source to
the AD9887, the PW starts counting the number of lines per
field and calculates the H-period time. With these two values, it
determines the exact match or the closest match out of a lookup-table (LUT) with VGA standards. When the correct standard
is determined, the PW will set the AD9887 I
correct value. The AD9887 should now sample with exact the
same frequency as the incoming standard requires. This is
done to get an optimal picture performance.
It also is a 'must' when a computer graphics card is connected,
because there is no, or very little, post anti-aliasing filtering
done on such cards. Therefore, the outputted RGB samples
need to be exactly aligned with the sampling of the AD
converter.
Analogue input signals can go up to SXGA@75 Hz, which
gives a pixel clock of 135 MHz. In fact, it can handle any
standard with a pixel rate up to 140 MHz.
Special modes are made for the F21R E-box, for both PAL and
NTSC. These are invoked when an E-box is connected to the
SCAVIO panel.
Digital input: Via the DVI connector (Enhanced version only)
it is possible to insert TMDS (Transition Minimised Differential
Signalling) data into the SCAVIO panel. DVI is a fairly new
computer graphics standard, which can be seen as the digital
follow-up of the analogue VGA interface. The TMDS signal is
directly fed into the AD9887, where any DVI standard up to
SXGA@60 Hz can be decoded to RGBHV.
The preferred VGA standard for the FM23 is programmed in
the DDC EEPROM (item 7215), which can be read by the PC.
Via an internal switch, it is possible to choose between the
analogue input and the digital input. The output format is for
both inputs the same (8 bit RGB plus HV). The driver
determines whether the AD9887 outputs single or dual pixels.
For lower standards like VGA@60Hz, the interface will be
single pixel, which means that every clock cycle one byte of R,
G, and B data is outputted. Dual pixel means that on every
clock cycle two bytes of R, G, and B data outputted. These two
2
C registers to the
bytes are de-multiplexed, which is done to make the interface
more robust for jitter, set-up, and hold times, and to reduce the
digital data rate over the PCB (reduced EMC).
Digital 'Video Path'
This path is only available in the Enhanced version of the
SCAVIO panel and is used for the following input signals:
•CVBS input,
•Y/C input, and
•1fH YPbPr.
It is a straightforward application of the Philips SAA7118 (item
7225) and the Micronas SDA9400 (item 7280).
The SAA7118 is a PAL/NTSC/SECAM Digital Video Decoder
with adaptive digital comb filter and component video input. It
decodes all input standards to 4:2:2 YCbCr, which then is
processed by the SDA9400.
The SDA9400 is a motion adaptive de-interlacer, which makes
a progressive video signal from the interlaced input.
Depending on the motion in the picture, it will just interleave the
odd and even field (no motion: ABAB) or repeats the same field
twice; this is also known as line doubling (motion: AABB). The
motion detection is pixel based, with a soft-switch between
'motion' and 'no motion'.
After the de-interlacer, the signal is fed as a 4:2:2 YCbCr
progressive scan signal to the video port of the PixelWorks
processor.
The PixelWorks PW164 Scaler
The PixelWorks PW164 Image Processor is a highly integrated
(Ball Grid Array, BGA) chip, which interfaces video inputs and
computer graphics in virtually any format to the PDP.
Computer images from VGA to UXGA resolution input to the
chip can be resized to fit on the PDP. Horizontal and vertical
image scalers, coupled with intelligent frame locking circuitry
create sharp images, centred on the screen and without user
intervention. An embedded DRAM frame buffer and memory
controller perform the frame rate conversion.
Video data from 4:3 aspect ratio NTSC or PAL and 16:9 aspect
ratio sources such as HDTV and DVD are supported. Nonlinear scaling (only with Receiver Box) and separate horizontal
and vertical scalers allow these inputs to be resized optimally
for the native resolution of the PDP.
For more information, see http://www.pixelworksinc.com/
index.phtml
Page 100
EN 100FM239.
Circuit Descriptions and List of Abbreviations
Table 9-3 PixelWorks Scaler: Ports
Pin NameI/ORemark
C2PW_SCL+3V3 outputto I2C devices, Vid-
eo related
B1PW_SDA+3V3 outputto I2C devices, Vid-
eo related
A1PW_SDA_NVM+3V3 outputto I2C device NVM
C4PW_SCL_NVM+3V3 outputto I2C device NVM
B3SCL_2+3V3 outputto I2C device OTC
A2SDA_2+3V3 outputto I2C device OTC
A3VIDEO_SEL_1+3V3 outputto video selection
switches (see truth
table)
C5VIDEO_SEL_2+3V3 outputto video selection
switches (see truth
table)
B4VGA2_OUTN+3V3 outputSelects VGA 2 as
output. (Low =>
Output)
A4VGA2_EN+3V3 outputEnables VGA 2
(High = Enable)
C6SYNCInputIs 'high' if EPLD de-
tects separate sync
signals on YPbPr
B51_2FHInputIs 'high' if sync on
YPbPr is 1fH (from
EPLD)
Table 9-4 PixelWorks Scaler: Video Select
VIDEO_SEL_1 VIDEO_SEL_2 Selected input for
AD9887
00 RGB 2fh
01YPbPr 2fh
10 VGA 1
11 VGA 2
Service remark: Desoldering/soldering of this IC requires very
specialised (BGA) equipment. This can only be done by the
Authorised Service Centres (ASC).
The EPLD
The main reason to add the EPLD is the contrast reserve
function. Other reasons:
•Black and white ADC adjustment. The EPLD provides a
high-resolution measurement of the black and white level,
to adjust the gain and offset of the ADC (AD9887). It is read
2
C.
via I
•LVDS reset. This function resets the LVDS transmitter on
the SCAVIO board, in case the LVDS transmitter starts up
without a clock. This could cause an abnormal picture.
Therefore, as soon as the clock is not fast enough (as
during start-up) the EPLD will keep the LVDS transmitter in
reset.
•Receiver-box mode detection. For loop through mode (a
second FTV monitor connected to the output of the first
monitor), a secondary detection is needed to check the
presence of an Receiver or E-box.
•ATSC sync detection/ decoding. Core for proper sync
decoding for ATSC sources.
•Contrast reserve. This function can increase the gain of
the video signal to a factor of two. It will reduce the gain
again if it sees too many overflows (code 255) in any of the
R, G, or B channels. Adjustable via two parameters: user
contrast and overflow limit. Parameters are I
2
C controlled.
The LVDS transmitter
This DS90C385MTD56 IC from National Semiconductors
converts 28 bits of CMOS/TTL data into four LVDS (Low
Voltage Differential Signalling) data streams. A PLL transmit
clock is transmitted in parallel with the data streams over a fifth
LVDS link. Every cycle of the clock, 28 bits of input data are
sampled and transmitted. At a transmit clock frequency of 36
MHz, 24 bits of RGB data and 3 bits of display control data are
transmitted per LVDS data channel. This IC operates at 3.3 V
For more information, see http://www.national.com/
Picture Mute
In some cases, it is necessary to mute the video output:
•In Monitor mode:
– During switch 'on/off' of the monitor,
– During source change,
– During video or sync loss, or
– By a user action (A/V-mute or mute)
– In audio only mode (when the ICONN-box is
connected).
•In TV mode:
– During switch 'on/off' of the Monitor/Receiver box,
– During source change in the Receiver box,
– During video or sync loss, or
– In audio only mode (Receiver box mutes the picture).
Most of the picture mute controls are done via the PixelWorks
co-processor.
Anti Ageing
In order to prevent visible luminance differences, due to ageing
of the monitor, a special algorithm is implemented. This
algorithm is based on horizontal shifting of the picture in the
monitor. For good understanding some terms will now first be
explained:
•Ageing: The effect that the efficiency of a plasma cell
(pixel) decreases as a function of the total time that it is
illuminated. This effect occurs mostly because of phosphor
ageing. As a result, the cell brightness decreases over
time. An alternative name for ageing is 'burn-in'.
•Picture shifting: Fixed structures, like logo's, OSDs, and
subtitles, will cause burn-in effects. The only way to mask
this to a certain extends, is picture shifting so that the 'burnin' effect is smeared out over a larger area, and makes it
less visible.
Most of the anti-ageing controls are implemented in the
PixelWorks co-processor.
Horizontal
Horizontal anti-ageing steps:
•Step width/height, the step width/height shall be 1
horizontal pixel width (approx. 1 mm).
•Number of steps, the maximum number of steps in
horizontal direction shall be 9.
•Time between steps, the time between the steps shall be
5 minutes.
The effect of H anti-ageing is a horizontal movement
(start at 0):
0 → 1 → 2 → 3 → 4
12 ← 11← 10 ← 9 ← 8 ← 7 ← 6 ← 5 ←→ 13→ 14 → 15
With the following sequence:
0 → 1 → 2 → ...... → 14 → 15 → 0 → 1 → etc.
After every step, the updated value is stored in NVM and gives
an indication about the direction (0...4 and 13...15 to the right
and 5...12 to the left).
The horizontal anti-ageing is a process, which is basically
independent of any other processes that are running in SW.
This means that this process should never be reset in order to
get the best anti-ageing effect. Therefore, the horizontal shift
positions and directions need to be stored in NVM, so that he
anti-ageing process returns to its latest position after the set
has been switched off or to standby. There is only one H and
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