Philips CBT3125 Technical data

CBT3125D

INTEGRATED CIRCUITS

CBT3125

Quadruple FET bus switch

Product data

2001 Dec 12

File under Integrated Circuits Ð ICL03

P s

on o s

Philips Semiconductors	Product data
Quadruple FET bus switch	CBT3125

DESCRIPTION

PIN CONFIGURATION

The CBT3125 quadruple FET bus switch features independent line

switches. Each switch is disabled when the associated Output

VCC

1OE

1

14

Enable (OE) input is HIGH.

1A

2

13

4OE

1B

4A

3

12

FEATURES

4B

2OE

4

11

•Standard '125-type pinout (D, DB, and PW packages)

2A

5

10

3OE

•5 Ω switch connection between two ports

2B

3A

6

9

•TTL-compatible input levels

GND

3B

7

8

•Latch-up testing is done to JESDEC Standard JESD78 which

SA00562

Figure 1. SO14, SSOP14, and TSSOP14

exceeds 500 mA

•ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115, and 1000 V CDM per

JESD22-C101

NC

1

16

VCC

1OE

2

15

4OE

1A

4A

3

14

1B

4B

4

13

2OE

5

12

3OE

2A

3A

6

11

2B

3B

7

10

GND

NC

8

9

SA00563

NC = no internal connection

Figure 2. SSOP(QSOP)16

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DRAWING NUMBER

14-Pin Plastic SO

±40 to +85 °C

CBT3125D

SOT108-1

14-Pin Plastic SSOP

±40 to +85 °C

CBT3125DB

SOT337-1

16-Pin Plastic SSOP(QSOP)

±40 to +85 °C

CBT3125DS

SOT519-1

14-Pin Plastic TSSOP

±40 to +85 °C

CBT3125PW

SOT402-1

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.

2001 Dec 12

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853-2309 27452

Philips Semiconductors	Product data
Quadruple FET bus switch	CBT3125

LOGIC DIAGRAM

2						3			1B
	1A
		1
1OE
						6
5									2B
	2A
		4
2OE
						8
9									3B
	3A
		10
3OE
						11
12									4B
	4A
		13
4OE								SA00564

Pin numbers shown are for 14-pin package-types.

Figure 3. CBT3125 logic diagram (positive logic)

FUNCTION TABLE (each bus switch)

INPUT			FUNCTION
	OE
	L		A = B
	H		disconnect

ABSOLUTE MAXIMUM RATINGS1

Over operating free-air temperature range, unless otherwise noted.

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCC	supply voltage range		±0.5	7	V
VI	input voltage range	see Note 2	±0.5	7	V
	continuous channel current		Ð	128	mA
IK	input clamp current	VI/O < 0	Ð	±50	mA
Tstg	storage temperature range		±65	+150	°C

NOTES:

1.Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3.The package thermal impedance is calculated in accordance with JESD 51-7.

RECOMMENDED OPERATING CONDITIONS1

SYMBOL	PARAMETER	CONDITIONS	MIN.	MAX.	UNIT
VCC	supply voltage		4.5	5.5	V
VIH	high-level control input voltage		2	Ð	V
VIL	low-level control input voltage		Ð	0.8	V
Tamb	operating ambient temperature in free-air		±40	+85	°C

NOTE:

1. All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.

2001 Dec 12

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