Philips buk9575 100a, buk9675 100a DATASHEETS
Philips Semiconductors Product specification
TrenchMOS transistor BUK9575-100A
Logic level FET BUK9675-100A
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT
level field-effectpowertransistorina
plastic envelope available in V
TO220AB and SOT404 . Using I
’trench’ technology which features P
very low on-state resistance. It is T
intended for use in automotive and R
DS
D
tot
j
DS(ON)
general purpose switching resistance V
applications. V
PINNING TO220AB & SOT404 PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V
Drain current (DC) 23 A
Total power dissipation 99 W
Junction temperature 175 ˚C
Drain-source on-state
= 5 V 75 mΩ
GS
= 10 V 55 mΩ
GS
PIN DESCRIPTION
1 gate
mb
tab
d
2 drain
g
s
3 source
tab/mb drain
2
13
SOT404
BUK9675-100A
1
23
TO220AB
BUK9575-100A
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
I
D
I
D
I
DM
P
T
DS
DGR
tot
stg
GS
, T
j
Drain-source voltage - - 100 V
Drain-gate voltage RGS = 20 kΩ - 100 V
Gate-source voltage - - 15 V
Drain current (DC) Tmb = 25 ˚C - 23 A
Drain current (DC) Tmb = 100 ˚C - 16 A
Drain current (pulse peak value) Tmb = 25 ˚C - 91 A
Total power dissipation Tmb = 25 ˚C - 98 W
Storage & operating temperature - - 55 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 1.5 K/W
mounting base
R
th j-a
Thermal resistance junction to in free air 60 - K/W
ambient(TO220AB)
R
th j-a
Thermal resistance junction to Minimum footprint, FR4 50 - K/W
ambient(SOT404) board
October 2000 1 Rev 1.200
Philips Semiconductors Product specification
TrenchMOS transistor BUK9575-100A
Logic level FET BUK9675-100A
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V
voltage Tj = -55˚C 89 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2.0 V
Tj = 175˚C 0.5 - - V
Tj = -55˚C - - 2.3 V
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 0.05 10 µA
= 175˚C - - 500 µA
T
j
Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA
Drain-source on-state VGS = 5 V; ID = 10 A - 60 75 mΩ
resistance T
= 175˚C - - 188 mΩ
j
VGS = 10 V; ID = 10 A - 55 72 mΩ
V
= 4.5 V; ID = 10 A - 61 84 mΩ
GS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
C
C
t
t
t
t
L
iss
oss
rss
d on
r
d off
f
d
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1278 1704 pF
Output capacitance - 129 155 pF
Feedback capacitance - 88 120 pF
Turn-on delay time VDD = 30 V; R
=1.2Ω; - 13 20 ns
load
Turn-on rise time VGS = 5 V; RG = 10 Ω - 120 168 ns
Turn-off delay time - 58 87 ns
Turn-off fall time - 57 86 ns
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
L
d
Internal drain inductance Measured from contact screw on - 3.5 - nH
tab to centre of die(TO220AB)
L
d
Internal drain inductance Measured from upper edge of drain - 2.5 - nH
tab to centre of die(SOT404)
L
s
Internal source inductance Measured from source lead to - 7.5 - nH
source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V
t
rr
Q
SD
rr
Continuous reverse drain - - 23 A
current
Pulsed reverse drain current - - 92 A
Diode forward voltage IF = 10 A; VGS = 0 V - 0.85 1.2 V
IF = 23 A; VGS = 0 V - 1.1 - V
Reverse recovery time IF = 23 A; -dIF/dt = 100 A/µs; - 63 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.22 - µC
October 2000 2 Rev 1.200
Philips Semiconductors Product specification
TrenchMOS transistor BUK9575-100A
Logic level FET BUK9675-100A
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1
W
DSS
Drain-source non-repetitive ID = 14.2 A; VDD ≤ 25 V; - - 100 mJ
unclamped inductive turn-off V
= 5 V; RGS = 50 Ω; Tmb = 25 ˚C
GS
energy
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 5 V
D 25 ˚C
100
RDS(ON)=VDS/ID
ID/A
10
DC
1
1 10 100 1000
VDS/V
tp =
1us
10us
100us
1ms
10ms
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
Zth/(K/W)
10
1
0.5
0.2
0.1
0.05
0.1
0.02
0
0.01
1E-07 1E-05 1E-03 1E-01 1E+01
t/s
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
p
1 For maximum permissible repetitive avalanche current see fig.18.
October 2000 3 Rev 1.200
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