Philips BUK9640-100A, BUK9540-100A Datasheet

Philips Semiconductors Product specification
TrenchMOS transistor BUK9540-100A Logic level FET BUK9640-100A
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT level field-effectpowertransistorina plastic envelope available in V
DS
TO220AB and SOT404 . Using I
D
Drain current (DC) 37 A
trench’ technology which features P
tot
Total power dissipation 138 W
very low on-state resistance. It is T
j
Junction temperature 175 ˚C
intended for use in automotive and R
DS(ON)
Drain-source on-state general purpose switching resistance VGS = 5 V 40 m applications. VGS = 10 V 39 m
PINNING TO220AB & SOT404 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 gate 2 drain 3 source
tab/mb drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage - - 100 V
V
DGR
Drain-gate voltage RGS = 20 k - 100 V
±V
GS
Gate-source voltage - - 10 V
±V
GSM
Non-repetitive gate-source voltage tp≤50µS - 15 V
I
D
Drain current (DC) Tmb = 25 ˚C - 37 A
I
D
Drain current (DC) Tmb = 100 ˚C - 26 A
I
DM
Drain current (pulse peak value) Tmb = 25 ˚C - 149 A
P
tot
Total power dissipation Tmb = 25 ˚C - 138 W
T
stg
, T
j
Storage & operating temperature - - 55 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 1.1 K/W mounting base
R
th j-a
Thermal resistance junction to in free air 60 - K/W ambient(TO220AB)
R
th j-a
Thermal resistance junction to Minimum footprint, FR4 50 - K/W ambient(SOT404) board
123
tab
13
mb
2
SOT404
TO220AB
d
g
s
December 1999 1 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK9540-100A Logic level FET BUK9640-100A
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V voltage Tj = -55˚C 89 - - V
V
GS(TO)
Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2.0 V
Tj = 175˚C 0.5 - - V
Tj = -55˚C - - 2.3 V
I
DSS
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 0.05 10 µA
Tj = 175˚C - - 500 µA
I
GSS
Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA
R
DS(ON)
Drain-source on-state VGS = 5 V; ID = 25 A - 30 40 m resistance Tj = 175˚C - - 100 m
VGS = 10 V; ID = 25 A - 29 39 m VGS = 4.5 V; ID = 25 A - 31 43 m
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
iss
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2304 3072 pF
C
oss
Output capacitance - 222 266 pF
C
rss
Feedback capacitance - 151 207 pF
t
d on
Turn-on delay time VDD = 30 V; R
load
=1.2; - 20 30 ns
t
r
Turn-on rise time VGS = 5 V; RG = 10 - 135 189 ns
t
d off
Turn-off delay time - 125 189 ns
t
f
Turn-off fall time - 90 135 ns
L
d
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
L
d
Internal drain inductance Measured from contact screw on - 3.5 - nH
tab to centre of die(TO220AB)
L
d
Internal drain inductance Measured from upper edge of drain - 2.5 - nH
tab to centre of die(SOT404)
L
s
Internal source inductance Measured from source lead to - 7.5 - nH
source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
Continuous reverse drain - - 37 A current
I
DRM
Pulsed reverse drain current - - 149 A
V
SD
Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V
IF = 37 A; VGS = 0 V - 1.1 - V
t
rr
Reverse recovery time IF = 37 A; -dIF/dt = 100 A/µs; - 60 - ns
Q
rr
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.24 - µC
December 1999 2 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK9540-100A Logic level FET BUK9640-100A
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
1
Drain-source non-repetitive ID = 25 A; VDD 25 V; - - 31 mJ unclamped inductive turn-off VGS = 5 V; RGS = 50 ; Tmb = 25 ˚C energy
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
D 25 ˚C
= f(Tmb)
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
D 25 ˚C
= f(Tmb); conditions: VGS ≥ 5 V
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = tp/T
0 20 40 60 80 100 120 140 160 180
Tmb / C
PD%
Normalised Power Derating
120 110 100
90 80 70 60 50 40 30 20 10
0
1
1
10
100
1000
ID/A
10
100
1000
RDS(ON)=VDS/ID
DC
10us
100us
100ms
10ms
1ms
tp =
VDS/V
1us
0 20 40 60 80 100 120 140 160 180
Tmb / C
ID%
Normalised Current Derating
120 110 100
90 80 70 60 50 40 30 20 10
0
0.001
0.01
0.1
1
10
1E-07 1E-05 1E-03 1E-01 1E+01
t/s
Zth/(K/W)
0
0.02
0.05
0.1
0.2
0.5
1 For maximum permissible repetive avanche current see fig.18.
December 1999 3 Rev 1.000
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