Philips buk9635 100a DATASHEETS
Philips Semiconductors Product specification
TrenchMOS transistor BUK9635-100A
Logic level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT
level field-effectpowertransistorina
plastic envelope suitable for surface V
mounting. Using ’trench’ technology I
thedevice features very low on-state P
resistance. It is intended for use in T
automotive and general purpose R
DS
D
tot
j
DS(ON)
switching applications. resistance VGS = 5 V 35 mΩ
PINNING - SOT404 PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V
Drain current (DC) 40 A
Total power dissipation 150 W
Junction temperature 175 ˚C
Drain-source on-state
V
= 10 V 34 mΩ
GS
PIN DESCRIPTION
mb
d
1 gate
2 drain
(no connection possible)
3 source
mb drain
2
13
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
±V
I
D
I
D
I
DM
P
T
DS
DGR
tot
stg
GS
GSM
, T
j
Drain-source voltage - - 100 V
Drain-gate voltage RGS = 20 kΩ - 100 V
Gate-source voltage - - 10 V
Non Repetive gate-source voltage - - 15 V
Drain current (DC) Tmb = 25 ˚C - 40 A
Drain current (DC) Tmb = 100 ˚C - 29 A
Drain current (pulse peak value) Tmb = 25 ˚C - 133 A
Total power dissipation Tmb = 25 ˚C - 150 W
Storage & operating temperature - - 55 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 1.01 K/W
mounting base
R
th j-a
Thermal resistance junction to Minimum footprint, FR4 50 - K/W
ambient board
August 1999 1 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK9635-100A
Logic level FET
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V
voltage Tj = -55˚C 89 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2 V
Tj = 175˚C 0.5 - - V
Tj = -55˚C - 2.3 V
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 0.05 10 µA
Tj = 175˚C - - 500 µA
Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA
Drain-source on-state VGS = 5 V; ID = 25 A - 26 35 mΩ
resistance Tj = 175˚C - - 95 mΩ
VGS = 10 V; ID = 25 A - 24.1 34 mΩ
VGS = 4.5 V; ID = 25 A - 26.1 38 mΩ
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
C
C
t
t
t
t
L
iss
oss
rss
d on
r
d off
f
d
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2700 3500 pF
Output capacitance - 260 314 pF
Feedback capacitance - 160 220 pF
Turn-on delay time VDD = 30 V; R
=1.2Ω; - 10 15 ns
load
Turn-on rise time VGS = 10 V; RG = 10 Ω - 6287ns
Turn-off delay time - 194 291 ns
Turn-off fall time - 108 162 ns
Internal drain inductance Measured from upper edge of drain - 2.5 - nH
tab to centre of die
L
s
Internal source inductance Measured from source lead - 7.5 - nH
soldering point to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V
t
rr
Q
SD
rr
Continuous reverse drain - - 40 A
current
Pulsed reverse drain current - - 133 A
Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V
IF = 40 A; VGS = 0 V - 1.1 - V
Reverse recovery time IF = 40 A; -dIF/dt = 100 A/µs; - 60 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.3 - µC
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
August 1999 2 Rev 1.000
Drain-source non-repetitive ID = 40 A; VDD ≤ 25 V; - - 125 mJ
unclamped inductive turn-off VGS = 10 V; RGS = 50 Ω; Tmb = 25 ˚C
energy
Philips Semiconductors Product specification
TrenchMOS transistor BUK9635-100A
Logic level FET
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 5 V
D 25 ˚C
Zth/(K/W)
10
D=
1
0.5
0.2
0.1
0.1
0.05
0.02
t
p
0.01
0
0.001
1E-07 1E-05 1E-3 1E-01 1E+01
P
D
t/S
t
p
D =
T
T
t
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
150
ID/A
100
50
0
0246
VDS/V
VGS/V=
8
Fig.5. Typical output characteristics, Tj = 25 ˚C
ID = f(VDS); parameter V
GS
10.0
5.0
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
10
.
1000
ID/A
RDS(ON)=VDS/ID
100
10
1
1 10 100 1000
DC
VDS/V
tp=
1uS
10uS
100uS
1mS
10mS
100mS
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
p
RDS(ON)/mOhm
40
35
VGS/V=
30
3.0
3.2
3.4
3.6
25
4.0
5.0
20
0 10203040506070
ID/A
Fig.6. Typical on-state resistance, Tj = 25 ˚C
R
= f(ID); parameter V
DS(ON)
GS
.
August 1999 3 Rev 1.000
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