Philips buk9524 55a, buk9624 55a DATASHEETS

1. Description

2. Features

BUK9524-55A; BUK9624-55A

TrenchMOS™ logic level FET

Rev. 01 — 29 September 2000 Product speciﬁcation

N-channel enhancement mode ﬁeld-effect powertransistorina plastic package using TrenchMOS™ technology, featuring very low on-state resistance.

Product availability:

BUK9524-55A in SOT78 (TO-220AB) BUK9624-55A in SOT404 (D

■ TrenchMOS™ technology

■ Q101 compliant

■ 175 °C rated

■ Logic level compatible.

2

-PAK).

3. Applications

c

■ Automotive and general purpose power switching:

◆ 12 V and 24 V loads

◆ Motors, lamps and solenoids.

4. Pinning information

Table 1: Pinning - SOT78 and SOT404 simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g) 2 drain (d) 3 source (s) mb mounting base;

connected to drain (d)

MBK106

12mb3

SOT78 (TO-220AB) SOT404 (D

mb

2

13

2

-PAK)

MBK116

g

MBB076

d

s

Philips Semiconductors

BUK9524-55A; BUK9624-55A

TrenchMOS™ logic level FET

5. Quick reference data

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

V I P T R

DS

D

tot j DSon

drain-source voltage (DC) − 55 V drain current (DC) Tmb=25°C; VGS=5V − 46 A total power dissipation Tmb=25°C − 105 W junction temperature − 175 °C drain-source on-state resistance VGS=5V; ID=25A 20 24 mΩ

= 4.5 V; ID=25A − 26 mΩ

V

GS

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V

DS

V

DGR

V

GS

V

GSM

I

D

I

DM

P

tot

T

stg

T

j

Source-drain diode

I

DR

I

DRM

Avalanche ruggedness

W

DSS

drain-source voltage (DC) − 55 V drain-gate voltage (DC) RGS=20kΩ−55 V gate-source voltage (DC) −±10 V non-repetitive gate-source voltage tp≤ 50 µs −±15 V drain current (DC) Tmb=25°C; VGS=5V;

− 46 A

Figure 2 and 3

T

= 100 °C; VGS=5V;Figure 2 − 33 A

mb

peak drain current Tmb=25°C; pulsed; tp≤ 10 µs;

− 188 A

Figure 3

total power dissipation Tmb=25°C; Figure 1 − 105 W storage temperature −55 +175 °C operating junction temperature −55 +175 °C

reverse drain current (DC) Tmb=25°C − 46 A pulsed reverse drain current Tmb=25°C; pulsed; tp≤ 10 µs − 188 A

non-repetitive avalanche energy unclamped inductive load; ID=46A;

≤ 25 V; VGS=5V; RGS=50Ω;

V

DS

starting T

mb

=25°C

− 76 mJ

9397 750 07538

Product speciﬁcation Rev. 01 — 29 September 2000 2 of 15

Philips Semiconductors

BUK9524-55A; BUK9624-55A

TrenchMOS™ logic level FET

120

P

(%)

der

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

P

der

tot

----------------------

P

tot 25 C°()

100%×=

03na19

Tmb (oC)

Fig 1. Normalized total power dissipation as a

function of mounting base temperature.

120

I

der (%)

100

80

60

40

20

0

0 25 50 75 100 125 150 175 200

03aa24

Tmb (oC)

VGS≥ 4.5 V

I

der

D

------------------ -

I

D25C°()

100%×=

Fig 2. Normalized continuous drain current as a

function of mounting base temperature.

1000

I

D

(A)

R

= VDS/ I

100

P

10

1

1 10 100

DSon

δ =

t

p

T

D

t

p

T

D.C.

t

03na08

tp = 10 us

100 us

1 ms 10 ms

100 ms

VDS (V)

Tmb=25°C; IDM single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 07538

Product speciﬁcation Rev. 01 — 29 September 2000 3 of 15

Philips Semiconductors

BUK9524-55A; BUK9624-55A

TrenchMOS™ logic level FET

7. Thermal characteristics

Table 4: Thermal characteristics

Symbol Parameter Conditions Value Unit

R

th(j-a)

R

th(j-mb)

thermal resistance from junction to ambient vertical in still air;

SOT78 60 K/W

lead length ≤ 5 mm; Figure 4

SOT404 50 K/W

thermal resistance from junction to mounting

1.4 K/W

base

7.1 Transient thermal impedance

03na07

t

p

δ =

T

t

p

-1

10

t

T

1

tp(s)

Z

th(j-mb)

(K/W)

10

δ

= 0.5

1

0.2

0.1

-1

10

0.05

0.02

single pulse

-2

10

-6

10

-5

10

-4

10

-3

10

P

-2

Fig 4. Transient thermal impedance from junction to mounting base as a function of

pulse duration.

9397 750 07538

Product speciﬁcation Rev. 01 — 29 September 2000 4 of 15

Philips Semiconductors

BUK9524-55A; BUK9624-55A

TrenchMOS™ logic level FET

8. Characteristics

Table 5: Characteristics

Tj=25°C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown voltage

V

I

DSS

I

GSS

R

GS(th)

DSon

gate-source threshold voltage ID= 1 mA; VDS=VGS;

drain-source leakage current VDS= 55 V; VGS=0V

gate-source leakage current VGS= ±10 V; VDS=0V − 2 100 nA drain-source on-state

resistance

Dynamic characteristics

C C C t

d(on)

t

r

t

d(off)

t

f

L

iss oss rss

d

s

input capacitance VGS=0V; VDS=25V; output capacitance − 239 287 pF reverse transfer capacitance − 162 222 pF turn-on delay time VDD= 30 V; RL= 1.2 Ω; rise time − 104 − ns turn-off delay time − 82.5 − ns fall time − 80 − ns internal drain inductance from drain lead 6mm from

internal source inductance from source lead to source

ID= 0.25 mA; VGS=0V

=25°C55−−V

T

j

= −55 °C50−−V

T

j

Figure 9

=25°C 1 1.5 2 V

T

j

= 175 °C 0.5 −−V

T

j

= −55 °C −−2.3 V

T

j

=25°C − 0.05 10 µA

T

j

= 175 °C −−500 µA

T

j

VGS=5V; ID=25A;

Figure 7 and 8

=25°C − 20 24 mΩ

T

j

= 175 °C −−50 mΩ

T

j

= 4.5 V; ID=25A;

V

GS

=25°C −−26 mΩ

T

j

=10V; ID=25A;

V

GS

=25°C − 19 21.7 mΩ

T

j

− 1361 1815 pF

f = 1 MHz; Figure 12

− 17.5 − ns

=5V; RG=10Ω;

V

GS

− 4.5 − nH

package to centre of die from contact screw on

− 3.5 − nH mounting base to centre of die SOT78

from upper edge of drain

− 2.5 − nH mounting base to centre of die SOT404

− 7.5 − nH bond pad

9397 750 07538

Product speciﬁcation Rev. 01 — 29 September 2000 5 of 15