Philips BUK9505-30A Datasheet

Philips Semiconductors Product specification

TrenchMOS transistor BUK9505-30A
Logic level FET

GENERAL DESCRIPTION QUICK REFERENCE DATA

N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT
level field-effectpowertransistorina
plastic envelope using ’trench’V

DS

Drain-source voltage 30 V

technology which features very low I

D

Drain current (DC) 75 A

on-state resistance. Itis intended for P

tot

Total power dissipation 230 W

use in automotive and general T

j

Junction temperature 175 ˚C

purpose switching applications. R

DS(ON)

Drain-source on-state
resistance VGS = 5 V 5 mΩ

V

GS

= 10 V 4.6 mΩ

PINNING - TO220AB PIN CONFIGURATION SYMBOL

PIN DESCRIPTION

1 gate
2 drain
3 source

tab drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DS

Drain-source voltage - - 30 V

V

DGR

Drain-gate voltage RGS = 20 kΩ -30V

±V

GS

Gate-source voltage - - 10 V

±V

GSM

Non-repetitive gate-source voltage tp≤50µS - 15 V

I

D

Drain current (DC) Tmb = 25 ˚C - 75 A

I

D

Drain current (DC) Tmb = 100 ˚C - 75 A

I

DM

Drain current (pulse peak value) Tmb = 25 ˚C - 400 A

P

tot

Total power dissipation Tmb = 25 ˚C - 230 W

T

stg

, T

j

Storage & operating temperature - - 55 175 ˚C

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R

th j-mb

Thermal resistance junction to - - 0.65 K/W
mounting base

R

th j-a

Thermal resistance junction to in free air 60 - K/W
ambient

d

g

s

123

tab

August 1999 1 Rev 1.100

Philips Semiconductors Product specification

TrenchMOS transistor BUK9505-30A

Logic level FET

STATIC CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 30 - - V
voltage Tj = -55˚C 27 - - V

V

GS(TO)

Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2.0 V

Tj = 175˚C 0.5 - - V

Tj = -55˚C - - 2.3 V

I

DSS

Zero gate voltage drain current VDS = 30 V; VGS = 0 V; - 0.05 10 µA

Tj = 175˚C - - 500 µA

I

GSS

Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA

R

DS(ON)

Drain-source on-state VGS = 5 V; ID = 25 A - 4.3 5 mΩ
resistance Tj = 175˚C - - 9.3 mΩ

VGS = 10 V; ID = 25 A - 3.9 4.6 mΩ
VGS = 4.5 V; ID = 25 A - - 5.4 mΩ

DYNAMIC CHARACTERISTICS

Tmb = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

C

iss

Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 6500 8600 pF

C

oss

Output capacitance - 1500 1800 pF

C

rss

Feedback capacitance - 1000 1350 pF

t

d on

Turn-on delay time VDD = 30 V; R

load

=1.2Ω; - 45 65 ns

t

r

Turn-on rise time VGS = 5 V; RG = 10 Ω - 220 330 ns

t

d off

Turn-off delay time - 435 600 ns

t

f

Turn-off fall time - 320 450 ns

L

d

Internal drain inductance Measured from contact screw on - 3.5 - nH

tab to centre of die

L

d

Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH

from package to centre of die

L

s

Internal source inductance Measured from source lead 6 mm - 7.5 - nH

from package to source bond pad

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

DR

Continuous reverse drain - - 75 A
current

I

DRM

Pulsed reverse drain current - - 240 A

V

SD

Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V

IF = 75 A; VGS = 0 V - 1.1 - V

t

rr

Reverse recovery time IF = 75 A; -dIF/dt = 100 A/µs; - 400 - ns

Q

rr

Reverse recovery charge VGS = -10 V; VR = 30 V - 1.0 - µC

August 1999 2 Rev 1.100

Philips Semiconductors Product specification

TrenchMOS transistor BUK9505-30A

Logic level FET

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

W

DSS

Drain-source non-repetitive ID = 75 A; VDD ≤ 25 V; - - 500 mJ
unclamped inductive turn-off VGS = 5 V; RGS = 50 Ω; Tmb = 25 ˚C
energy

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

D 25 ˚C

= f(Tmb)

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

D 25 ˚C

= f(Tmb); conditions: VGS ≥ 5 V

Fig.3. Safe operating area. Tmb = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

p

Fig.4. Transient thermal impedance.

Z

th j-mb

= f(t); parameter D = tp/T

0 20 40 60 80 100 120 140 160 180

Tmb / C

PD%

Normalised Power Derating

120
110
100

90
80
70
60
50
40
30
20
10

0

1 10 100

1

10

100

1000
ID/A

RDS(ON) = VDS/ID

VDS/V

tp =

100mS

10mS

1mS

100uS

DC

0 20 40 60 80 100 120 140 160 180

Tmb / C

ID%

Normalised Current Derating

120
110
100

90
80
70
60
50
40
30
20
10

0

0.00001 0.001 0.1 10

0.001

0.01

0.1

1

D =

t

p

t

p

T

T

P

t

D

Zth / (K/W)

t/S

D =

0.5

0.2

0.1

0.05

0.02

0

August 1999 3 Rev 1.100