Philips BUK9120-48TC Datasheet
Philips Semiconductors Product specification
PowerMOS transistor BUK9120-48TC
Voltage clamped logic level FET
with temperature sensing diodes
GENERAL DESCRIPTION QUICK REFERENCE DATA
Protected N-channel enhancement SYMBOL PARAMETER MIN. TYP. MAX. UNIT
mode logic level field-effect power
transistor in a plastic envelope V
suitable for surface mounting. Using I
’trench’ technology the device P
featuresverylow on-state resistance T
and has integral zener diodes giving R
(CL)DSR
D
tot
j
DS(ON)
ESD protection up to 2kV and active resistance; VGS = 5 V
drainvoltageclamping.Temperature V
F
sensitive diodes are incorporated for sense diodes
monitoring chip temperature. -S
F
The device is intended for use in coefficient, temperature sense
automotive and general purpose diodes
switching applications.
PINNING - SOT426 PIN CONFIGURATION SYMBOL
Drain-source clamp voltage 40 45 55 V
Drain current (DC) 52 A
Total power dissipation 116 W
Junction temperature 175 ˚C
Drain-source on-state 20 mΩ
Forward voltage,temperature 685 710 735 mV
Negative temperature 1.26 1.4 1.54 mV/K
PIN DESCRIPTION
1 gate
mb
d
T1
2T1
3 (connected to mb)
4T2
5 source
3
12 45
g
T2
s
Fig. 1. Fig. 2.
mb drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
I
D
I
D
I
D
I
DM
P
I
GD
I
GS
V
T
T
DS
DG
GS
tot
TS
stg
j
Drain-source voltage continuous - 40 V
Drain-gate voltage continuous - 38 V
Gate-source voltage - - 10 V
Drain current (DC) Tmb = 25 ˚C - 52 A
Drain current (DC) Tmb = 100 ˚C - 37 A
Drain current (DC) Tmb = 140 ˚C - 25 A
Drain current (pulse peak Tmb = 25 ˚C - 208 A
value)
Total power dissipation Tmb = 25 ˚C - 116 W
Drain-gate clamp current 5ms pulse; ∆ = 0.01 - 50 mA
Gate-source clamp current 5ms pulse; ∆ = 0.01 - 50 mA
Source T1/T2 voltage - - ±100 V
Storage temperature - - 55 175 ˚C
Junction temperature - - 55 175 ˚C
February 1998 1 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor BUK9120-48TC
Voltage clamped logic level FET with temperature sensing diodes
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
C
Electrostatic discharge voltage, Human body model (100pF,1.5KΩ)- 2 kV
pins 1,3,5
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 1.29 K/W
mounting base
R
th j-a
Thermal resistance junction to minimum footprint, - 50 - K/W
ambient FR4 board
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DG
V
GS(TO)
I
DSS
I
DSS
Drain-gate zener voltage 250uA; -55˚C < Tj < 175˚C 38 43 V
Gate threshold voltage VDS = VGS; ID = 1 mA; 1.0 1.5 2.0 V
Tj = 175˚C 0.5 - - V
Tj = -55˚C - - 2.3 V
Zero gate voltage drain current VDS = +35 V; VGS = 0 V; - 0.1 100 µA
Tj =175 ˚C - - 250 µA
Zero gate voltage drain current VDS = +15 V; VGS = 0 V; - 0.004 2 µA
Tj =175 ˚C - - 250 µA
I
GSS
±V
R
V
-S
V
(BR)GSS
DS(ON)
F
F
HYS
Gate source leakage current VGS = ±5 V; VDS = 0 V; - 0.02 1 µA
Tj =175 ˚C - - 10 µA
Gate source breakdown voltage ±1 mA; 10 - - V
Drain-source on-state VGS = 5 V; ID = 20 A - 16 20 mΩ
resistance Tj =175 ˚C - - 42 mΩ
V
Forward voltage, temperature IF = 250 uA; 685 710 735 mV
sense diodes
Negative temperature IF = 250 uA 1.26 1.4 1.54 mV/K
coefficient, temperature sense
diodes from 25 ˚C to 140 ˚C
Forward voltage hysteresis; IF = 125 uA to 250uA 25 50 mV
temperature sense diodes
February 1998 2 Rev 1.100
Philips Semiconductors Product specification
PowerMOS transistor BUK9120-48TC
Voltage clamped logic level FET with temperature sensing diodes
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(CL)DSR
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
s
Drain source clamp voltage RG = 10 kΩ; ID = 10 A; 40 45 55 V
(peak value) -55 < Tj < 175˚C
Forward transconductance VDS = 25 V; ID = 10 A 20 53 - S
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2200 2900 pF
Output capacitance - 400 500 pF
Feedback capacitance - 215 300 pF
Turn-on delay time VDD = 30 V; ID = 25 A; - 12 18 µs
Turn-on rise time VGS = 5 V; RG = 10 kΩ; - 55 80 µs
Turn-off delay time - 60 85 µs
Turn-off fall time - 45 60 µs
Internal drain inductance Measured from upper edge of drain - 2.5 - nH
tab to centre of die
Internal source inductance Measured from source lead - 7.5 - nH
soldering point to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
Continuous reverse drain - - - 52 A
current
I
DRM
V
SD
Pulsed reverse drain current - - - 208 A
Diode forward voltage IF = 20 A ; VGS = 0 V - 0.95 1.2 V
IF = 40 A ; VGS = 0 V - 1 - V
CLAMPED ENERGY LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
W
DSRS
Non-repetitive drain-source Tj = 25˚C prior to clamping; - 450 mJ
clamped inductive turn off ID = 20 A; VDD < 16 V; VGS = 5 V;
energy RG = 10 kΩ; inductive load
February 1998 3 Rev 1.100
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