Philips Semiconductors Product specification
TrenchMOS transistor BUK7540-100A
Standard level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
Standard level field-effect power
transistor in a plastic envelope using V
’trench’ technology which features I
very low on-state resistance. It is P
intended for use in automotive and T
general purpose switching R
DS
D
tot
j
DS(ON)
applications. resistance VGS = 5 V
PINNING - TO220AB PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V
Drain current (DC) 37 A
Total power dissipation 138 W
Junction temperature 175 ˚C
Drain-source on-state 40 mΩ
PIN DESCRIPTION
tab
d
1 gate
2 drain
g
3 source
tab drain
123
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
I
D
I
D
I
DM
P
T
DS
DGR
tot
stg
GS
, T
j
Drain-source voltage - - 100 V
Drain-gate voltage RGS = 20 kΩ - 100 V
Gate-source voltage - - 20 V
Drain current (DC) Tmb = 25 ˚C - 37 A
Drain current (DC) Tmb = 100 ˚C - 26 A
Drain current (pulse peak value) Tmb = 25 ˚C - 149 A
Total power dissipation Tmb = 25 ˚C - 138 W
Storage & operating temperature - - 55 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 1.1 K/W
mounting base
R
th j-a
Thermal resistance junction to in free air 60 - K/W
ambient
December 1999 1 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK7540-100A
Standard level FET
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V
voltage Tj = -55˚C 89 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2 3 4 V
Tj = 175˚C 1 - - V
Tj = -55˚C - - 4.4 V
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 0.05 10 µA
Tj = 175˚C - - 500 µA
Gate source leakage current VGS = ±20 V; VDS = 0 V - 2 100 nA
Drain-source on-state VGS = 10 V; ID = 40 A - 30 40 mΩ
resistance Tj = 175˚C - - 108 mΩ
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
C
C
t
t
t
t
L
iss
oss
rss
d on
r
d off
f
d
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1720 2293 pF
Output capacitance - 216 259 pF
Feedback capacitance - 133 182 pF
Turn-on delay time VDD = 30 V; R
=1.2Ω; - 12 18 ns
load
Turn-on rise time VGS = 5 V; RG = 10 Ω - 5583ns
Turn-off delay time - 48 67 ns
Turn-off fall time - 30 42 ns
Internal drain inductance Measured from contact screw on - 3.5 - nH
tab to centre of die
L
d
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
L
s
Internal source inductance Measured from source lead 6 mm - 7.5 - nH
from package to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
DR
I
DRM
V
t
rr
Q
SD
rr
Continuous reverse drain - - 37 A
current
Pulsed reverse drain current - - 149 A
Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V
IF = 37 A; VGS = 0 V - 1.1 - V
Reverse recovery time IF = 37 A; -dIF/dt = 100 A/µs; - 70 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.24 - µC
December 1999 2 Rev 1.000
Philips Semiconductors Product specification
TrenchMOS transistor BUK7540-100A
Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
1
Drain-source non-repetitive ID = 26 A; VDD ≤ 25 V; - - 31 mJ
unclamped inductive turn-off VGS = 5 V; RGS = 50 Ω; Tmb = 25 ˚C
energy
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); VGS ≥ 10 V
D 25 ˚C
1000
ID/A
RDS(ON)=VDS/ID
100
10
1
1
DC
10
VDS/V
tp =
1us
10us
100us
1ms
10ms
100ms
100
Fig.3. Safe operating area
ID & IDM = f(VDS); IDM single pulse; parameter t
10
Zth/(K/W)
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.001
0
1E-07 1E-05 1E-03 1E-01 1E+01
t/s
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
1000
p
1 For maximum permissible repetive avalanche current see fig.18.
December 1999 3 Rev 1.000