Philips BUK7524-55 Datasheet

Philips Semiconductors Product specification

TrenchMOS transistor BUK7524-55
Standard level FET

GENERAL DESCRIPTION QUICK REFERENCE DATA

N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
standard level field-effect power
transistor in a plastic envelope using V
’trench’ technology. The device I
featuresverylowon-state resistance P
and has integral zener diodes giving T
ESD protection up to 2kV. It is R

DS

D

tot
j

DS(ON)

intended for use in automotive and resistance VGS = 10 V
general purpose switching
applications.

PINNING - TO220AB PIN CONFIGURATION SYMBOL

Drain-source voltage 55 V
Drain current (DC) 45 A
Total power dissipation 103 W
Junction temperature 175 ˚C
Drain-source on-state 24 mΩ

PIN DESCRIPTION

tab

d

1 gate
2 drain
3 source

tab drain

123

g

s

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V
V
±V
I

D

I

D

I

DM

P
T

DS
DGR

tot

stg

GS

, T

j

Drain-source voltage - - 55 V
Drain-gate voltage RGS = 20 kΩ -55V
Gate-source voltage - - 16 V
Drain current (DC) Tmb = 25 ˚C - 45 A
Drain current (DC) Tmb = 100 ˚C - 31 A
Drain current (pulse peak value) Tmb = 25 ˚C - 180 A
Total power dissipation Tmb = 25 ˚C - 103 W
Storage & operating temperature - - 55 175 ˚C

ESD LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

C

Electrostatic discharge capacitor Human body model - 2 kV
voltage, all pins (100 pF, 1.5 kΩ)

THERMAL RESISTANCES

SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT

R

th j-mb

R

th j-a

January 1997 1 Rev 1.000

Thermal resistance junction to - - 1.45 K/W
mounting base
Thermal resistance junction to in free air 60 - K/W
ambient

Philips Semiconductors Product specification

TrenchMOS transistor BUK7524-55

Standard level FET

STATIC CHARACTERISTICS

Tj= 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

(BR)DSS

V

GS(TO)

I

DSS

I

GSS

±V

(BR)GSS

R

DS(ON)

DYNAMIC CHARACTERISTICS

Tmb = 25˚C unless otherwise specified

Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 55 - - V
voltage Tj = -55˚C 50 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V

Tj = 175˚C 1.0 - - V

Tj = -55˚C - - 4.4

Zero gate voltage drain current VDS = 55 V; VGS = 0 V; - 0.05 10 µA

Tj = 175˚C - - 500 µA

Gate source leakage current VGS = ±10 V; VDS = 0 V - 0.02 1 µA

Tj = 175˚C - - 20 µA
Gate source breakdown voltage IG = ±1 mA; 16 - - V
Drain-source on-state VGS = 10 V; ID = 25 A - 19 24 mΩ
resistance Tj = 175˚C - - 50 mΩ

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

g
C

C
C

t
t
t
t

L

fs

iss
oss
rss

d on
r
d off
f

d

Forward transconductance VDS = 25 V; ID = 25 A 4 11 - S
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1100 1500 pF

Output capacitance - 280 340 pF
Feedback capacitance - 130 180 pF

Turn-on delay time VDD = 30 V; ID = 25 A; - 12 18 ns
Turn-on rise time VGS = 10 V; RG = 10 Ω - 1935ns
Turn-off delay time Resistive load - 25 35 ns
Turn-off fall time - 18 25 ns

Internal drain inductance Measured from contact screw on - 3.5 - nH

tab to centre of die

L

d

Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH

from package to centre of die

L

s

Internal source inductance Measured from source lead 6 mm - 7.5 - nH

from package to source bond pad

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tj = 25˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

DR

I

DRM

V

t

rr

Q

SD

rr

Continuous reverse drain - - 45 A
current
Pulsed reverse drain current - - 160 A
Diode forward voltage IF = 25 A; VGS = 0 V - 0.95 1.2 V

IF = 40 A; VGS = 0 V - 1.0 -

Reverse recovery time IF = 40 A; -dIF/dt = 100 A/µs; - 40 - ns
Reverse recovery charge VGS = -10 V; VR = 30 V - 0.07 - µC

January 1997 2 Rev 1.000

Philips Semiconductors Product specification

TrenchMOS transistor BUK7524-55

Standard level FET

AVALANCHE LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

W

DSS

Drain-source non-repetitive ID = 40 A; VDD ≤ 25 V; - - 80 mJ
unclamped inductive turn-off VGS = 10 V; RGS = 50 Ω; Tmb = 25 ˚C
energy

PD%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140 160 180

Normalised Power Derating

Tmb / C

Fig.1. Normalised power dissipation.

PD% = 100⋅PD/P

ID%

120
110
100

90
80
70
60
50
40
30
20
10

0

0 20 40 60 80 100 120 140 160 180

Tmb / C

= f(Tmb)

D 25 ˚C

Normalised Current Derating

Fig.2. Normalised continuous drain current.

ID% = 100⋅ID/I

= f(Tmb); conditions: VGS ≥ 5 V

D 25 ˚C

ID / A

1000

RDS(ON) = VDS / ID

100

10

1

1 10 100 1000

DC

VDS / V

tp = 10 us

100 us

1 ms
10 ms

100 ms

Fig.3. Safe operating area. Tmb = 25 ˚C

ID & IDM = f(VDS); IDM single pulse; parameter t

Transient thermal impedance, Zth (K/W)

10

1

0.5

0.2

0.1

0.1

0.05

0.01

0.001

0.02

0

10us 1ms 0.1s 10s

pulse width, tp (s)

p

t

P

D

D =

T

Fig.4. Transient thermal impedance.

Z

= f(t); parameter D = tp/T

th j-mb

7524-55

p

t
T

t

p

January 1997 3 Rev 1.000