Philips BUK543-100B, BUK543-100A Datasheet
Philips Semiconductors Product Specification
PowerMOS transistor BUK543-100A/B
Logic level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. MAX. UNIT
logic level field-effect power
transistor in a plastic full-pack BUK543 -100A -100B
envelope. V
The device is intended for use in I
Switched Mode Power Supplies P
(SMPS), motor control, welding, R
DS
D
tot
DS(ON)
DC/DC and AC/DC converters, and resistance; VGS = 5 V
in automotive and general purpose
switching applications.
PINNING - SOT186 PIN CONFIGURATION SYMBOL
Drain-source voltage 100 100 V
Drain current (DC) 8.3 7.5 A
Total power dissipation 25 25 W
Drain-source on-state 0.18 0.22 Ω
PIN DESCRIPTION
case
d
1 gate
2 drain
3 source
case isolated
123
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
V
±V
±V
I
D
I
D
I
DM
P
T
T
DS
DGR
GS
GSM
tot
stg
j
Drain-source voltage - - 100 V
Drain-gate voltage RGS = 20 kΩ - 100 V
Gate-source voltage - - 15 V
Non-repetitive gate-source voltage tp ≤ 50 µs - 20 V
-100A -100B
Drain current (DC) Ths = 25 ˚C - 8.3 7.5 A
Drain current (DC) Ths = 100 ˚C - 5.2 4.7 A
Drain current (pulse peak value) Ths = 25 ˚C - 33 30 A
Total power dissipation Ths = 25 ˚C - 25 W
Storage temperature - - 55 150 ˚C
Junction Temperature - - 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-hs
R
th j-a
April 1993 1 Rev 1.100
Thermal resistance junction to with heatsink compound - - 5.0 K/W
heatsink
Thermal resistance junction to - 55 - K/W
ambient
Philips Semiconductors Product Specification
PowerMOS transistor BUK543-100A/B
Logic level FET
STATIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
I
DSS
I
DSS
I
GSS
R
DS(ON)
DYNAMIC CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
g
fs
C
iss
C
oss
C
rss
t
d on
t
r
t
d off
t
f
L
d
L
s
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 100 - - V
voltage
Gate threshold voltage VDS = VGS; ID = 1 mA 1.0 1.5 2.0 V
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj = 25 ˚C - 1 10 µA
Zero gate voltage drain current VDS = 100 V; VGS = 0 V; Tj =125 ˚C - 0.1 1.0 mA
Gate source leakage current VGS = ±15 V; VDS = 0 V - 10 100 nA
Drain-source on-state VGS = 5 V; BUK543-100A - 0.17 0.18 Ω
resistance ID = 5 A BUK543-100B - 0.20 0.22 Ω
Forward transconductance VDS = 25 V; ID = 5 A 6.0 8.0 - S
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 620 825 pF
Output capacitance - 180 250 pF
Feedback capacitance - 90 120 pF
Turn-on delay time VDD = 30 V; ID = 3 A; - 10 20 ns
Turn-on rise time VGS = 5 V; RGS = 50 Ω; - 45 60 ns
Turn-off delay time R
Turn-off fall time - 40 55 ns
= 50 Ω - 90 115 ns
gen
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
Internal source inductance Measured from source lead 6 mm - 7.5 - nH
from package to source bond pad
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
isol
Repetitive peak voltage from all R.H. ≤ 65% ; clean and dustfree - 1500 V
three terminals to external
heatsink
C
isol
Capacitance from T2 to external f = 1 MHz - 12 - pF
heatsink
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
I
V
t
Q
DR
DRM
SD
rr
rr
Continuous reverse drain - - - 8.3 A
current
Pulsed reverse drain current - - - 33 A
Diode forward voltage IF = 8.3 A ; VGS = 0 V - 1.1 1.3 V
Reverse recovery time IF = 8.3 A; -dIF/dt = 100 A/µs; - 80 - ns
Reverse recovery charge VGS = 0 V; VR = 30 V - 0.5 - µC
April 1993 2 Rev 1.100
Philips Semiconductors Product Specification
PowerMOS transistor BUK543-100A/B
Logic level FET
AVALANCHE LIMITING VALUE
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
W
DSS
Drain-source non-repetitive ID = 13 A ; VDD ≤ 50 V ; - - 70 mJ
unclamped inductive turn-off VGS = 5 V ; RGS = 50 Ω
energy
PD%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Normalised Power Derating
with heatsink compound
Ths / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Ths / C
= f(Ths)
D 25 ˚C
Normalised Current Derating
with heatsink compound
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Ths); conditions: VGS ≥ 5 V
D 25 ˚C
ID / A
100
10
RDS(ON) = VDS/ID
1
0.1
1 100
DC
10
VDS / V
A
B
BUK543-100
tp = 10 us
100 us
1 ms
10 ms
100 ms
Fig.3. Safe operating area. Ths = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
1E+01
Zth j-hs / (K/W)
0.5
1E+00
0.2
0.1
0.05
1E-01
0.02
P
D
0
1E-02
1E-07 1E-05 1E-03 1E-01 1E+01
t / s
t
p
T
ZTHX43
p
t
D =
T
t
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-hs
p
April 1993 3 Rev 1.100
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