Philips BUK107-50DL Datasheet

Philips Semiconductors Product specification

PowerMOS transistor BUK107-50DL Logic level TOPFET

DESCRIPTION QUICK REFERENCE DATA

Monolithic overload protected logic SYMBOL PARAMETER MAX. UNIT level power MOSFET in a surface mount plastic envelope, intended as V a general purpose switch for automotive systems and other I applications.

APPLICATIONS

General controller for driving

lamps R

DS(ON)

small motors solenoids

FEATURES FUNCTIONAL BLOCK DIAGRAM

Vertical power DMOS output stage Overload protected up to 85˚C ambient Overload protection by current limiting and overtemperature sensing Latched overload protection reset by input 5 V logic compatible input level Control of power MOSFET and supply of overload protection circuits derived from input Low operating input current permits direct drive by micro-controller ESD protection on all pins Overvoltage clamping for turn off of inductive loads

INPUT

Continuous drain source voltage 50 V Continuous drain current 0.7 A Total power dissipation 1.8 W

Continuous junction temperature 150 ˚C Drain-source on-state resistance 200 mΩ

DRAIN

O/V

CLAMP

RIG

LOGIC AND

PROTECTION

POWER MOSFET

SOURCE

Fig.1. Elements of the TOPFET.

PINNING - SOT223 PIN CONFIGURATION SYMBOL

PIN DESCRIPTION

1 input 2 drain 3 source 4 drain (tab)

March 1997 1 Rev 1.200

TOPFET

Philips Semiconductors Product specification

PowerMOS transistor BUK107-50DL Logic level TOPFET

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V I I I P T T

DS D I IRM

stg

Continuous drain source voltage Continuous drain current

Continuous input current clamping - 3 mA Non-repetitive peak input current tp ≤ 1 ms - 10 mA Total power dissipation T Storage temperature - -55 150 ˚C Continuous junction temperature normal operation

ESD LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

- - 50 V

- - self limiting A

= 25 ˚C - 1.8 W

amb

- 150 ˚C

Electrostatic discharge capacitor Human body model; - 2 kV voltage C = 250 pF; R = 1.5 kΩ

OVERVOLTAGE CLAMPING LIMITING VALUES

At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

DSM

Non-repetitive clamping energy Tb ≤ 25 ˚C; IDM < I

; - 100 mJ

D(lim)

inductive load

DRM

Repetitive clamping energy Tb ≤ 75 ˚C; IDM = 50 mA; - 4 mJ

f = 250 Hz

OVERLOAD PROTECTION LIMITING VALUES

With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads. Overload protection operates by means of drain current limiting and activating the overtemperature protection.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

DDP

Protected drain source supply voltage VIS = 5 V - 35 V

VIS = 4 V - 16 V

OVERLOAD PROTECTION CHARACTERISTICS

TOPFET switches off to protect itself when there is an overload fault condition. It remains latched off until reset by the input.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Overload protection

D(lim)

j(TO)

Drain current limiting VIS = 5 V 0.7 1.1 1.5 A Overtemperature protection only in drain current limiting

Threshold junction temperature VIS = 5 V 100 130 160 ˚C

1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy. 2 Refer to OVERLOAD PROTECTION CHARACTERISTICS. 3 Not in an overload condition with drain current limiting.

March 1997 2 Rev 1.200

Philips Semiconductors Product specification

PowerMOS transistor BUK107-50DL Logic level TOPFET

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Thermal resistance

th j-sp

th j-b

th j-a

STATIC CHARACTERISTICS

Tb = 25 ˚C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Junction to solder point - 12 18 K/W Junction to board

Mounted on any PCB - 40 - K/W

Junction to ambient Mounted on PCB of fig. 19 - - 70 K/W

(CL)DSS

Drain-source clamping voltage VIS = 0 V; ID = 10 mA 50 55 - V Drain-source clamping voltage VIS = 0 V; IDM = 200 mA; - 56 70 V

tp ≤ 300 µs; δ ≤ 0.01 I I I R

DSS DSS DSS

DS(ON)

Off-state drain current VDS = 45 V; VIS = 0 V - 0.5 2 µA Off-state drain current VDS = 50 V; VIS = 0 V - 1 20 µA Off-state drain current VDS = 40 V; VIS = 0 V; Tj = 100 ˚C - 10 100 µA Drain-source on-state VIS = 5 V; IDM = 100 mA; - 150 200 mΩ resistance

tp ≤ 300 µs; δ ≤ 0.01

INPUT CHARACTERISTICS

Tb = 25 ˚C unless otherwise specified. The supply for the logic and overload protection is taken from the input.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V I

IS(TO)

Input threshold voltage VDS = 5 V; ID = 1 mA 1.7 2.2 2.7 V Input supply current normal operation; VIS = 5 V - 330 450 µA

VIS = 4 V - 170 270 µA

ISL

V V R

ISR (CL)IS

Input supply current protection latched; VIS = 5 V - 500 650 µA

VIS = 3.5 V - 250 400 µA

1 2.2 3.5 V

Protection latch reset voltage

Input clamping voltage II = 1.5 mA 6 7.5 - V Input series resistance to gate of power MOSFET - 33 - kΩ

SWITCHING CHARACTERISTICS

= 25 ˚C; resistive load RL = 50 Ω; adjust VDD to obtain ID = 250 mA; refer to test circuit and waveforms

amb

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

d on

d off

1 Temperature measured 1.3 mm from tab. 2 Continuous input voltage. The specified pulse width is for the drain current. 3 The input voltage below which the overload protection circuits will be reset.

Turn-on delay time VIS = 0 V to VIS = 5 V - 8 - µs Rise time - 30 - µs Turn-off delay time VIS = 5 V to VIS = 0 V - 3 - µs Fall time - 6 - µs

March 1997 3 Rev 1.200

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