DISCRETE SEMICONDUCTORS
DATA SH EET
BSP254; BSP254A
P-channel enhancement mode
vertical D-MOS transistor
Product specification
File under Discrete Semiconductors, SC13b
April 1995
Philips Semiconductors Product specification
P-channel enhancement mode vertical
D-MOS transistor
FEATURES
• Direct interface to C-MOS, TTL,
etc.
• High-speed switching
• No secondary breakdown.
DESCRIPTION
P-channel vertical D-MOS transistor
in a TO-92 variant envelope and
intended for use as a line current
interruptor in relay, high-speed and
line transformer drivers.
PINNING - TO-92 variant BSP254
PIN DESCRIPTION
1 gate
2 drain
3 source
PINNING - TO-92 variant BSP254A
PIN DESCRIPTION
1 source
2 gate
3 drain
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
DS
drain-source
voltage
V
GSO
gate-source
voltage
Y
forward transfer
fs
admittance
I
D
R
DS(on)
drain current (DC) −−−0.2 A
drain-source
on-state resistance
P
tot
total power
dissipation
handbook, halfpage
BSP254; BSP254A
−−−250 V
open drain −−±20 V
ID= −200 mA;
VDS= −25V
VGS= −10 V;
ID= −200 mA
T
=25°C −−1W
amb
1
2
3
Fig.1 Simplified outline and symbol.
100 200 − mS
− 10 15 Ω
g
MAM147
d
s
April 1995 2
Philips Semiconductors Product specification
P-channel enhancement mode vertical
BSP254; BSP254A
D-MOS transistor
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
−V
DS
V
GSO
−I
D
−I
DM
P
tot
T
stg
T
j
THERMAL RESISTANCE
R
th j-a
Note
1. Transistor mounted on printed circuit board, maximum lead length 4 mm,
mounting pad for drain lead minimum 10 mm x 10 mm.
drain-source voltage − 250 V
gate-source voltage open drain − 20 V
drain current DC − 0.2 A
drain current peak value − 0.6 A
total power dissipation T
=25°C (note 1) − 1W
amb
storage temperature range −65 +150 °C
junction temperature − 150 °C
SYMBOL PARAMETER MAX. UNIT
from junction to ambient (note 1) 125 K/W
1.2
andbook, halfpage
P
tot
(W)
0.8
0.4
0
0
50 100 200150
T
amb
Fig.2 Power derating curve.
MRC238
(°C)
April 1995 3
Philips Semiconductors Product specification
P-channel enhancement mode vertical
BSP254; BSP254A
D-MOS transistor
CHARACTERISTICS
T
=25°C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
−V
(BR)DSS
−I
DSS
±I
GSS
−V
GS(th)
R
DS(on)
Y
transfer admittance −VDS= 25 V
fs
C
iss
C
oss
C
rss
t
on
t
off
drain-source breakdown voltage −VGS= 0
250 −− V
−ID=10µA
drain-source leakage current −VDS= 200 V
−−1µA
VGS=0
gate-source leakage current ±VGS= 20 V
−−100 nA
VDS=0
gate-source threshold voltage VGS= V
DS
0.8 − 2.8 V
−ID= 1 mA
drain-source on-resistance −VGS= 10 V
− 10 15 Ω
−ID= 200 mA;
100 200 − mS
−ID= 200 mA
input capacitance note 1 − 65 90 pF
output capacitance note 1 − 20 30 pF
feedback capacitance note 1 − 615pF
turn-on time note 2 − 510ns
turn-off time note 2 − 20 30 ns
Notes
1. Measured at f = 1 MHz; −V
= 25 V; VGS=0.
DS
2. −VGS= 0 to 10 V; −ID= 250 mA; −VDD= 50 V.
handbook, halfpage
0 V
−10 V
50 Ω
VDD = −50 V
I
D
MBB689
handbook, halfpage
INPUT
OUTPUT
10 %
t
on
90 %
90 %
10 %
t
off
MBB690
Fig.3 Switching times test circuit.
April 1995 4
Fig.4 Input and output waveforms.